src/mainboard/amd/serengeti_cheetah_fam10/Config.lb

   1 #
   2 # This file is part of the coreboot project.
   3 #
   4 # Copyright (C) 2007 Advanced Micro Devices, Inc.
   5 #
   6 # This program is free software; you can redistribute it and/or modify
   7 # it under the terms of the GNU General Public License as published by
   8 # the Free Software Foundation; version 2 of the License.
   9 #
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See the
  13 # GNU General Public License for more details.
  14 #
  15 # You should have received a copy of the GNU General Public License
  16 # along with this program; if not, write to the Free Software
  17 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18 #
  19
  20 include /config/failovercalculation.lb
  21
  22 arch i386 end
  23
  24 ##
  25 ## Build the objects we have code for in this directory.
  26 ##
  27
  28 driver mainboard.o
  29
  30
  31 #needed by irq_tables and mptable and acpi_tables
  32 object get_bus_conf.o
  33
  34 if HAVE_MP_TABLE
  35         object mptable.o
  36 end
  37
  38 if HAVE_PIRQ_TABLE
  39         object irq_tables.o
  40 end
  41
  42 if HAVE_ACPI_TABLES
  43          object acpi_tables.o
  44          object fadt.o
  45         makerule dsdt.c
  46                 depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
  47                 action  "iasl -p $(CURDIR)/dsdt_lb -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
  48                 action  "mv dsdt_lb.hex dsdt.c"
  49         end
  50          object ./dsdt.o
  51
  52         #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
  53
  54         if ACPI_SSDTX_NUM
  55         makerule ssdt2.c
  56                 depends "$(MAINBOARD)/dx/pci2.asl"
  57                 action  "iasl -p $(CURDIR)/pci2 -tc $(MAINBOARD)/dx/pci2.asl"
  58                 action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
  59                 action  "mv pci2.hex ssdt2.c"
  60         end
  61         object ./ssdt2.o
  62         makerule ssdt3.c
  63                 depends "$(MAINBOARD)/dx/pci3.asl"
  64                 action  "iasl -p $(CURDIR)/pci3 -tc $(MAINBOARD)/dx/pci3.asl"
  65                 action  "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
  66                 action  "mv pci3.hex ssdt3.c"
  67         end
  68         object ./ssdt3.o
  69         makerule ssdt4.c
  70                 depends "$(MAINBOARD)/dx/pci4.asl"
  71                 action  "iasl -p $(CURDIR)/pci4 -tc $(MAINBOARD)/dx/pci4.asl"
  72                 action  "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
  73                 action  "mv pci4.hex ssdt4.c"
  74         end
  75         object ./ssdt4.o
  76         makerule ssdt5.c
  77                 depends "$(MAINBOARD)/dx/pci5.asl"
  78                 action  "iasl -p $(CURDIR)/pci5 -tc $(MAINBOARD)/dx/pci5.asl"
  79                 action  "perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex"
  80                 action  "mv pci5.hex ssdt5.c"
  81         end
  82         object ./ssdt5.o
  83          end
  84 end
  85
  86         if CONFIG_USE_INIT
  87                 # compile cache_as_ram.c to auto.o
  88                 makerule ./cache_as_ram_auto.o
  89                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  90                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  91                 end
  92
  93         else
  94                 #compile cache_as_ram.c to auto.inc
  95                 makerule ./cache_as_ram_auto.inc
  96                         depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  97                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(MAINBOARD)/cache_as_ram_auto.c -o $@"
  98                         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
  99                         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
 100                 end
 101
 102         end
 103
 104 if USE_FAILOVER_IMAGE
 105 else
 106     if CONFIG_AP_CODE_IN_CAR
 107          makerule ./apc_auto.o
 108                  depends "$(MAINBOARD)/apc_auto.c option_table.h"
 109                  action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(MAINBOARD)/apc_auto.c -o $@"
 110          end
 111          ldscript /arch/i386/init/ldscript_apc.lb
 112     end
 113 end
 114
 115 ##
 116 ## Build our 16 bit and 32 bit coreboot entry code
 117 ##
 118
 119 if HAVE_FAILOVER_BOOT
 120     if USE_FAILOVER_IMAGE
 121         mainboardinit cpu/x86/16bit/entry16.inc
 122         ldscript /cpu/x86/16bit/entry16.lds
 123     end
 124 else
 125     if USE_FALLBACK_IMAGE
 126         mainboardinit cpu/x86/16bit/entry16.inc
 127         ldscript /cpu/x86/16bit/entry16.lds
 128     end
 129 end
 130
 131 mainboardinit cpu/x86/32bit/entry32.inc
 132          if CONFIG_USE_INIT
 133                  ldscript /cpu/x86/32bit/entry32.lds
 134          end
 135
 136          if CONFIG_USE_INIT
 137                  ldscript /cpu/amd/car/cache_as_ram.lds
 138          end
 139
 140 ##
 141 ## Build our reset vector (This is where coreboot is entered)
 142 ##
 143 if HAVE_FAILOVER_BOOT
 144     if USE_FAILOVER_IMAGE
 145         mainboardinit cpu/x86/16bit/reset16.inc
 146         ldscript /cpu/x86/16bit/reset16.lds
 147     else
 148         mainboardinit cpu/x86/32bit/reset32.inc
 149         ldscript /cpu/x86/32bit/reset32.lds
 150     end
 151 else
 152     if USE_FALLBACK_IMAGE
 153         mainboardinit cpu/x86/16bit/reset16.inc
 154         ldscript /cpu/x86/16bit/reset16.lds
 155     else
 156         mainboardinit cpu/x86/32bit/reset32.inc
 157         ldscript /cpu/x86/32bit/reset32.lds
 158     end
 159 end
 160
 161
 162 ##
 163 ## Include an id string (For safe flashing)
 164 ##
 165 mainboardinit arch/i386/lib/id.inc
 166 ldscript /arch/i386/lib/id.lds
 167
 168         ##
 169         ## Setup Cache-As-Ram
 170         ##
 171         mainboardinit cpu/amd/car/cache_as_ram.inc
 172
 173 ###
 174 ### This is the early phase of coreboot startup
 175 ### Things are delicate and we test to see if we should
 176 ### failover to another image.
 177 ###
 178 if HAVE_FAILOVER_BOOT
 179     if USE_FAILOVER_IMAGE
 180                 ldscript /arch/i386/lib/failover_failover.lds
 181     end
 182 else
 183     if USE_FALLBACK_IMAGE
 184                 ldscript /arch/i386/lib/failover.lds
 185     end
 186 end
 187
 188 ###
 189 ### O.k. We aren't just an intermediary anymore!
 190 ###
 191
 192 ##
 193 ## Setup RAM
 194 ##
 195         if CONFIG_USE_INIT
 196                 initobject cache_as_ram_auto.o
 197         else
 198                 mainboardinit ./cache_as_ram_auto.inc
 199         end
 200
 201 ##
 202 ## Include the secondary Configuration files
 203 ##
 204 config chip.h
 205
 206 dir /southbridge/amd/amd8151
 207
 208 # sample config for amd/serengeti_cheetah_fam10
 209 chip northbridge/amd/amdfam10/root_complex
 210         device apic_cluster 0 on
 211                 chip cpu/amd/socket_F_1207  #L1 and DDR2
 212                          device apic 0 on end
 213                 end
 214         end
 215         device pci_domain 0 on
 216                 chip northbridge/amd/amdfam10
 217                         device pci 18.0 on #  northbridge
 218                                 #  devices on link 0, link 0 == LDT 0
 219                                 chip southbridge/amd/amd8132
 220                                         # the on/off keyword is mandatory
 221                                         device pci 0.0 on end
 222                                         device pci 0.1 on end
 223                                         device pci 1.0 on end
 224                                         device pci 1.1 on end
 225                                 end
 226                                 chip southbridge/amd/amd8111
 227                                         # this "device pci 0.0" is the parent the next one
 228                                         # PCI bridge
 229                                         device pci 0.0 on
 230                                                 device pci 0.0 on end
 231                                                 device pci 0.1 on end
 232                                                 device pci 0.2 off end
 233                                                 device pci 1.0 off end
 234                                         end
 235                                         device pci 1.0 on
 236                                                 chip superio/winbond/w83627hf
 237                                                         device pnp 2e.0 off #  Floppy
 238                                                                 io 0x60 = 0x3f0
 239                                                                 irq 0x70 = 6
 240                                                                 drq 0x74 = 2
 241                                                         end
 242                                                         device pnp 2e.1 off #  Parallel Port
 243                                                                 io 0x60 = 0x378
 244                                                                 irq 0x70 = 7
 245                                                         end
 246                                                         device pnp 2e.2 on #  Com1
 247                                                                 io 0x60 = 0x3f8
 248                                                                 irq 0x70 = 4
 249                                                         end
 250                                                         device pnp 2e.3 off #  Com2
 251                                                                 io 0x60 = 0x2f8
 252                                                                 irq 0x70 = 3
 253                                                         end
 254                                                         device pnp 2e.5 on #  Keyboard
 255                                                                 io 0x60 = 0x60
 256                                                                 io 0x62 = 0x64
 257                                                                 irq 0x70 = 1
 258                                                                 irq 0x72 = 12
 259                                                         end
 260                                                         device pnp 2e.6 off #  CIR
 261                                                                 io 0x60 = 0x100
 262                                                         end
 263                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 264                                                                 io 0x60 = 0x220
 265                                                                 io 0x62 = 0x300
 266                                                                 irq 0x70 = 9
 267                                                         end
 268                                                         device pnp 2e.8 off end #  GPIO2
 269                                                         device pnp 2e.9 off end #  GPIO3
 270                                                         device pnp 2e.a off end #  ACPI
 271                                                         device pnp 2e.b on #  HW Monitor
 272                                                                 io 0x60 = 0x290
 273                                                                 irq 0x70 = 5
 274                                                         end
 275                                                 end
 276                                         end
 277                                         device pci 1.1 on end
 278                                         device pci 1.2 on end
 279                                         device pci 1.3 on
 280                                                 chip drivers/i2c/i2cmux2 # pca9556 smbus mux
 281                                                 chip drivers/i2c/i2cmux2 # pca9556 smbus mux
 282                                                         device i2c 18 on #0 pca9516 1
 283                                                                 chip drivers/generic/generic #dimm 0-0-0
 284                                                                         device i2c 50 on end
 285                                                                 end
 286                                                                 chip drivers/generic/generic #dimm 0-0-1
 287                                                                         device i2c 51 on end
 288                                                                 end
 289                                                                 chip drivers/generic/generic #dimm 0-1-0
 290                                                                         device i2c 52 on end
 291                                                                 end
 292                                                                 chip drivers/generic/generic #dimm 0-1-1
 293                                                                         device i2c 53 on end
 294                                                                 end
 295                                                         end
 296                                                         device i2c 18 on #1 pca9516 2
 297                                                                 chip drivers/generic/generic #dimm 1-0-0
 298                                                                         device i2c 50 on end
 299                                                                 end
 300                                                                 chip drivers/generic/generic #dimm 1-0-1
 301                                                                         device i2c 51 on end
 302                                                                 end
 303                                                                 chip drivers/generic/generic #dimm 1-1-0
 304                                                                         device i2c 52 on end
 305                                                                 end
 306                                                                 chip drivers/generic/generic #dimm 1-1-1
 307                                                                         device i2c 53 on end
 308                                                                 end
 309                                                         end
 310                                                 end
 311                                                 end
 312                                         end # acpi
 313                                         device pci 1.5 off end
 314                                         device pci 1.6 off end
 315                                         register "ide0_enable" = "1"
 316                                         register "ide1_enable" = "1"
 317                                 end
 318                         end #  device pci 18.0
 319
 320                         device pci 18.0 on end
 321                         device pci 18.0 on end
 322                         device pci 18.1 on end
 323                         device pci 18.2 on end
 324                         device pci 18.3 on end
 325                         device pci 18.4 on end
 326 #                       device pci 00.5 on end
 327                 end
 328         end #pci_domain
 329         #for node 32 to node 63
 330 #       device pci_domain 0 on
 331 #               chip northbridge/amd/amdfam10
 332 #                         device pci 00.0 on end#  northbridge
 333 #                         device pci 00.0 on end
 334 #                         device pci 00.0 on end
 335 #                         device pci 00.0 on end
 336 #                         device pci 00.1 on end
 337 #                         device pci 00.2 on end
 338 #                         device pci 00.3 on end
 339 #                         device pci 00.4 on end
 340 #                        device pci 00.5 on end
 341 #               end
 342 #       end #pci_domain
 343
 344 #         chip drivers/generic/debug
 345 #                device pnp 0.0 off end # chip name
 346 #                 device pnp 0.1 on end # pci_regs_all
 347 #                 device pnp 0.2 off end # mem
 348 #                 device pnp 0.3 off end # cpuid
 349 #                 device pnp 0.4 off end # smbus_regs_all
 350 #                 device pnp 0.5 off end # dual core msr
 351 #                 device pnp 0.6 off end # cache size
 352 #                 device pnp 0.7 off end # tsc
 353 #                 device pnp 0.8 off end # hard reset
 354 #                 device pnp 0.9 off end # mcp55
 355 #                 device pnp 0.a on end # GH ext table
 356 #        end
 357
 358 end
 359
 360