8f707884f2bcd3ce1442b142a26a53217cc0dc15
[coreboot.git] / src / mainboard / amd / serengeti_cheetah / apc_auto.c
1 #define ASSEMBLY 1
2 #define __ROMCC__
3
4 #define RAMINIT_SYSINFO 1
5 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
6
7 #define SET_NB_CFG_54 1 
8
9 //used by raminit
10 #define QRANK_DIMM_SUPPORT 1
11
12 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
13
14 #include <stdint.h>
15 #include <device/pci_def.h>
16 #include <device/pci_ids.h>
17 #include <arch/io.h>
18 #include <device/pnp_def.h>
19 #include <arch/romcc_io.h>
20 #include <cpu/x86/lapic.h>
21 #include "option_table.h"
22 #include "pc80/mc146818rtc_early.c"
23 #include "pc80/serial.c"
24
25 #if CONFIG_USE_INIT == 0
26         #include "lib/memcpy.c"
27  #if CONFIG_USE_PRINTK_IN_CAR == 1
28         #include "lib/uart8250.c"
29         #include "console/vtxprintf.c"
30         #include "arch/i386/lib/printk_init.c"
31  #endif
32 #endif
33
34 #include "arch/i386/lib/console.c"
35
36 #if 0 
37 static void post_code(uint8_t value) {
38 #if 1
39         int i;
40         for(i=0;i<0x80000;i++) {
41                 outb(value, 0x80);
42         }
43 #endif
44 }
45 #endif
46
47 #include <cpu/amd/model_fxx_rev.h>
48 #include "northbridge/amd/amdk8/raminit.h"
49 #include "cpu/amd/model_fxx/apic_timer.c"
50
51 #include "lib/delay.c"
52
53
54 //#include "cpu/x86/lapic/boot_cpu.c"
55 #include "northbridge/amd/amdk8/reset_test.c"
56
57 #include "northbridge/amd/amdk8/debug.c"
58
59 #include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
60
61 #include "northbridge/amd/amdk8/amdk8_f.h"
62
63 #include "cpu/x86/mtrr.h"
64 #include "cpu/amd/mtrr.h"
65 #include "cpu/x86/tsc.h"
66
67 #include "northbridge/amd/amdk8/amdk8_f_pci.c"
68 #include "northbridge/amd/amdk8/raminit_f_dqs.c"
69
70 #include "cpu/amd/dualcore/dualcore.c"
71
72 void hardwaremain(int ret_addr)
73 {
74         struct sys_info *sysinfo = (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
75         struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
76
77         struct node_core_id id;
78
79         id = get_node_core_id_x();
80
81 #if CONFIG_USE_PRINTK_IN_CAR
82         printk_debug("CODE IN CACHE ON NODE: %02x\n");
83 #else
84         print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n");
85 #endif
86
87         train_ram(id.nodeid, sysinfo, sysinfox);
88
89         /*
90                 go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
91         */
92
93         __asm__ volatile (
94                 "movl  %0, %%edi\n\t"
95                 "jmp     *%%edi\n\t"
96                 :: "a"(ret_addr)
97         );
98
99
100
101 }
102 struct eregs {
103         uint32_t eax, ecx, edx, ebx, esp, ebp, esi, edi;
104         uint32_t vector;
105         uint32_t error_code;
106         uint32_t eip;
107         uint32_t cs;
108         uint32_t eflags;
109 };
110
111 void x86_exception(struct eregs *info)
112 {
113         do {
114                 hlt();
115         } while(1);
116 }
117
118