src/mainboard/amd/serengeti_cheetah/ap_romstage.c

   1 #define ASSEMBLY 1
   2 #define __PRE_RAM__
   3
   4 #define RAMINIT_SYSINFO 1
   5 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
   6
   7 #define SET_NB_CFG_54 1
   8
   9 //used by raminit
  10 #define QRANK_DIMM_SUPPORT 1
  11
  12 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
  13
  14 #include <stdint.h>
  15 #include <device/pci_def.h>
  16 #include <device/pci_ids.h>
  17 #include <arch/io.h>
  18 #include <device/pnp_def.h>
  19 #include <arch/romcc_io.h>
  20 #include <cpu/x86/lapic.h>
  21 #include "option_table.h"
  22 #include "pc80/mc146818rtc_early.c"
  23 #include "pc80/serial.c"
  24 #include "./arch/i386/lib/printk_init.c"
  25
  26 #if CONFIG_USE_INIT == 0
  27         #include "lib/memcpy.c"
  28 #endif
  29
  30 #include "arch/i386/lib/console.c"
  31 #include "lib/uart8250.c"
  32 #include "console/vtxprintf.c"
  33
  34 #if 0
  35 static void post_code(uint8_t value) {
  36 #if 1
  37         int i;
  38         for(i=0;i<0x80000;i++) {
  39                 outb(value, 0x80);
  40         }
  41 #endif
  42 }
  43 #endif
  44
  45 #include <cpu/amd/model_fxx_rev.h>
  46 #include "northbridge/amd/amdk8/raminit.h"
  47 #include "cpu/amd/model_fxx/apic_timer.c"
  48
  49 #include "lib/delay.c"
  50
  51
  52 //#include "cpu/x86/lapic/boot_cpu.c"
  53 #include "northbridge/amd/amdk8/reset_test.c"
  54
  55 #include "northbridge/amd/amdk8/debug.c"
  56
  57 #include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
  58
  59 #include "northbridge/amd/amdk8/amdk8_f.h"
  60
  61 #include "cpu/x86/mtrr.h"
  62 #include "cpu/amd/mtrr.h"
  63 #include "cpu/x86/tsc.h"
  64
  65 #include "northbridge/amd/amdk8/amdk8_f_pci.c"
  66 #include "northbridge/amd/amdk8/raminit_f_dqs.c"
  67
  68 static inline unsigned get_nodes(void)
  69 {
  70         return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
  71 }
  72
  73 #include "cpu/amd/dualcore/dualcore.c"
  74
  75 void hardwaremain(int ret_addr)
  76 {
  77         struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
  78         struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
  79
  80         struct node_core_id id;
  81
  82         id = get_node_core_id_x();
  83
  84 #if CONFIG_USE_PRINTK_IN_CAR
  85         printk_debug("CODE IN CACHE ON NODE: %02x\n");
  86 #else
  87         print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n");
  88 #endif
  89
  90         train_ram(id.nodeid, sysinfo, sysinfox);
  91
  92         /*
  93                 go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
  94         */
  95
  96         __asm__ volatile (
  97                 "movl  %0, %%edi\n\t"
  98                 "jmp     *%%edi\n\t"
  99                 :: "a"(ret_addr)
 100         );
 101
 102
 103
 104 }
 105
 106 #include <arch/registers.h>
 107
 108 void x86_exception(struct eregs *info)
 109 {
 110         do {
 111                 hlt();
 112         } while(1);
 113 }
 114
 115