4 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
7 #include <device/pci_def.h>
8 #include <device/pci_ids.h>
10 #include <device/pnp_def.h>
11 #include <arch/romcc_io.h>
12 #include <cpu/x86/lapic.h>
13 #include <pc80/mc146818rtc.h>
14 #include "console/console.c"
15 #include "lib/uart8250.c"
16 #include "console/vtxprintf.c"
18 #include <cpu/amd/model_fxx_rev.h>
19 #include "northbridge/amd/amdk8/raminit.h"
20 #include "cpu/amd/model_fxx/apic_timer.c"
22 #include "lib/delay.c"
24 #include "northbridge/amd/amdk8/reset_test.c"
26 #include "northbridge/amd/amdk8/debug.c"
28 #include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
30 #include "northbridge/amd/amdk8/amdk8_f.h"
32 #include "cpu/x86/mtrr.h"
33 #include "cpu/amd/mtrr.h"
34 #include "cpu/x86/tsc.h"
36 #include "northbridge/amd/amdk8/amdk8_f_pci.c"
37 #include "northbridge/amd/amdk8/raminit_f_dqs.c"
39 static inline unsigned get_nodes(void)
41 return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
44 #include "cpu/amd/dualcore/dualcore.c"
46 void hardwaremain(int ret_addr)
48 struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE +
49 CONFIG_DCACHE_RAM_SIZE -
50 CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
51 struct sys_info *sysinfox = ((CONFIG_RAMTOP) -
52 CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
54 struct node_core_id id;
56 id = get_node_core_id_x();
58 printk(BIOS_DEBUG, "CODE IN CACHE ON NODE: %02x\n", id.nodeid);
60 train_ram(id.nodeid, sysinfo, sysinfox);
63 * go back, but can not use stack any more, because we
64 * only keep ret_addr and can not restore esp, and ebp.
74 #include <arch/registers.h>
76 void x86_exception(struct eregs *info)