6fda3bdfd8d3381d6bbc978dd9ba3474e1166a19
[coreboot.git] / src / mainboard / amd / serengeti_cheetah / ap_romstage.c
1 #define ASSEMBLY 1
2 #define __PRE_RAM__
3
4 #define SET_NB_CFG_54 1
5
6 //used by raminit
7
8 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
9
10 #include <stdint.h>
11 #include <device/pci_def.h>
12 #include <device/pci_ids.h>
13 #include <arch/io.h>
14 #include <device/pnp_def.h>
15 #include <arch/romcc_io.h>
16 #include <cpu/x86/lapic.h>
17 #include <pc80/mc146818rtc.h>
18 #include "pc80/serial.c"
19 #include "./arch/i386/lib/printk_init.c"
20
21 #include "console/console.c"
22 #include "lib/uart8250.c"
23 #include "console/vtxprintf.c"
24
25 #include <cpu/amd/model_fxx_rev.h>
26 #include "northbridge/amd/amdk8/raminit.h"
27 #include "cpu/amd/model_fxx/apic_timer.c"
28
29 #include "lib/delay.c"
30
31 #include "northbridge/amd/amdk8/reset_test.c"
32
33 #include "northbridge/amd/amdk8/debug.c"
34
35 #include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
36
37 #include "northbridge/amd/amdk8/amdk8_f.h"
38
39 #include "cpu/x86/mtrr.h"
40 #include "cpu/amd/mtrr.h"
41 #include "cpu/x86/tsc.h"
42
43 #include "northbridge/amd/amdk8/amdk8_f_pci.c"
44 #include "northbridge/amd/amdk8/raminit_f_dqs.c"
45
46 static inline unsigned get_nodes(void)
47 {
48         return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
49 }
50
51 #include "cpu/amd/dualcore/dualcore.c"
52
53 void hardwaremain(int ret_addr)
54 {
55         struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE +
56                         CONFIG_DCACHE_RAM_SIZE -
57                         CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
58         struct sys_info *sysinfox = ((CONFIG_RAMTOP) -
59                         CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
60
61         struct node_core_id id;
62
63         id = get_node_core_id_x();
64
65         printk(BIOS_DEBUG, "CODE IN CACHE ON NODE: %02x\n", id.nodeid);
66
67         train_ram(id.nodeid, sysinfo, sysinfox);
68
69         /*
70          * go back, but can not use stack any more, because we 
71          * only keep ret_addr and can not restore esp, and ebp.
72          */
73
74         __asm__ volatile (
75                 "movl  %0, %%edi\n\t"
76                 "jmp     *%%edi\n\t"
77                 :: "a"(ret_addr)
78         );
79 }
80
81 #include <arch/registers.h>
82
83 void x86_exception(struct eregs *info)
84 {
85         do {
86                 hlt();
87         } while(1);
88 }
89