src/mainboard/amd/pistachio/dsdt.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 /* DefinitionBlock Statement */
  21 DefinitionBlock (
  22         "DSDT.AML",           /* Output filename */
  23         "DSDT",                 /* Signature */
  24         0x02,        /* DSDT Revision, needs to be 2 for 64bit */
  25         "AMD   ",               /* OEMID */
  26         "PISTACHI",          /* TABLE ID */
  27         0x00010001      /* OEM Revision */
  28         )
  29 {       /* Start of ASL file */
  30         /* #include "../../../arch/x86/acpi/debug.asl" */               /* Include global debug methods if needed */
  31
  32         /* Data to be patched by the BIOS during POST */
  33         /* FIXME the patching is not done yet! */
  34         /* Memory related values */
  35         Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */
  36         Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
  37         Name(PBLN, 0x0) /* Length of BIOS area */
  38
  39         Name(PCBA, 0xE0000000)  /* Base address of PCIe config space */
  40         Name(HPBA, 0xFED00000)  /* Base address of HPET table */
  41
  42         Name(SSFG, 0x0D)                /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
  43
  44         /* USB overcurrent mapping pins.   */
  45         Name(UOM0, 0)
  46         Name(UOM1, 2)
  47         Name(UOM2, 0)
  48         Name(UOM3, 7)
  49         Name(UOM4, 2)
  50         Name(UOM5, 2)
  51         Name(UOM6, 6)
  52         Name(UOM7, 2)
  53         Name(UOM8, 6)
  54         Name(UOM9, 6)
  55
  56         /* Some global data */
  57         Name(OSTP, 3)           /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
  58         Name(OSV, Ones) /* Assume nothing */
  59         Name(PMOD, One) /* Assume APIC */
  60
  61         /* PIC IRQ mapping registers, C00h-C01h */
  62         OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002)
  63                 Field(PRQM, ByteAcc, NoLock, Preserve) {
  64                 PRQI, 0x00000008,
  65                 PRQD, 0x00000008,  /* Offset: 1h */
  66         }
  67         IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) {
  68                 PINA, 0x00000008,       /* Index 0  */
  69                 PINB, 0x00000008,       /* Index 1 */
  70                 PINC, 0x00000008,       /* Index 2 */
  71                 PIND, 0x00000008,       /* Index 3 */
  72                 AINT, 0x00000008,       /* Index 4 */
  73                 SINT, 0x00000008,       /*  Index 5 */
  74                 , 0x00000008,                /* Index 6 */
  75                 AAUD, 0x00000008,       /* Index 7 */
  76                 AMOD, 0x00000008,       /* Index 8 */
  77                 PINE, 0x00000008,       /* Index 9 */
  78                 PINF, 0x00000008,       /* Index A */
  79                 PING, 0x00000008,       /* Index B */
  80                 PINH, 0x00000008,       /* Index C */
  81         }
  82
  83         /* PCI Error control register */
  84         OperationRegion(PERC, SystemIO, 0x00000C14, 0x00000001)
  85                 Field(PERC, ByteAcc, NoLock, Preserve) {
  86                 SENS, 0x00000001,
  87                 PENS, 0x00000001,
  88                 SENE, 0x00000001,
  89                 PENE, 0x00000001,
  90         }
  91
  92         /* Client Management index/data registers */
  93         OperationRegion(CMT, SystemIO, 0x00000C50, 0x00000002)
  94                 Field(CMT, ByteAcc, NoLock, Preserve) {
  95                 CMTI,      8,
  96                 /* Client Management Data register */
  97                 G64E,   1,
  98                 G64O,      1,
  99                 G32O,      2,
 100                 ,       2,
 101                 GPSL,     2,
 102         }
 103
 104         /* GPM Port register */
 105         OperationRegion(GPT, SystemIO, 0x00000C52, 0x00000001)
 106                 Field(GPT, ByteAcc, NoLock, Preserve) {
 107                 GPB0,1,
 108                 GPB1,1,
 109                 GPB2,1,
 110                 GPB3,1,
 111                 GPB4,1,
 112                 GPB5,1,
 113                 GPB6,1,
 114                 GPB7,1,
 115         }
 116
 117         /* Flash ROM program enable register */
 118         OperationRegion(FRE, SystemIO, 0x00000C6F, 0x00000001)
 119                 Field(FRE, ByteAcc, NoLock, Preserve) {
 120                 ,     0x00000006,
 121                 FLRE, 0x00000001,
 122         }
 123
 124         /* PM2 index/data registers */
 125         OperationRegion(PM2R, SystemIO, 0x00000CD0, 0x00000002)
 126                 Field(PM2R, ByteAcc, NoLock, Preserve) {
 127                 PM2I, 0x00000008,
 128                 PM2D, 0x00000008,
 129         }
 130
 131         /* Power Management I/O registers */
 132         OperationRegion(PIOR, SystemIO, 0x00000CD6, 0x00000002)
 133                 Field(PIOR, ByteAcc, NoLock, Preserve) {
 134                 PIOI, 0x00000008,
 135                 PIOD, 0x00000008,
 136         }
 137         IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) {
 138                 Offset(0x00),   /* MiscControl */
 139                 , 1,
 140                 T1EE, 1,
 141                 T2EE, 1,
 142                 Offset(0x01),   /* MiscStatus */
 143                 , 1,
 144                 T1E, 1,
 145                 T2E, 1,
 146                 Offset(0x04),   /* SmiWakeUpEventEnable3 */
 147                 , 7,
 148                 SSEN, 1,
 149                 Offset(0x07),   /* SmiWakeUpEventStatus3 */
 150                 , 7,
 151                 CSSM, 1,
 152                 Offset(0x10),   /* AcpiEnable */
 153                 , 6,
 154                 PWDE, 1,
 155                 Offset(0x1C),   /* ProgramIoEnable */
 156                 , 3,
 157                 MKME, 1,
 158                 IO3E, 1,
 159                 IO2E, 1,
 160                 IO1E, 1,
 161                 IO0E, 1,
 162                 Offset(0x1D),   /* IOMonitorStatus */
 163                 , 3,
 164                 MKMS, 1,
 165                 IO3S, 1,
 166                 IO2S, 1,
 167                 IO1S, 1,
 168                 IO0S,1,
 169                 Offset(0x20),   /* AcpiPmEvtBlk */
 170                 APEB, 16,
 171                 Offset(0x36),   /* GEvtLevelConfig */
 172                 , 6,
 173                 ELC6, 1,
 174                 ELC7, 1,
 175                 Offset(0x37),   /* GPMLevelConfig0 */
 176                 , 3,
 177                 PLC0, 1,
 178                 PLC1, 1,
 179                 PLC2, 1,
 180                 PLC3, 1,
 181                 PLC8, 1,
 182                 Offset(0x38),   /* GPMLevelConfig1 */
 183                 , 1,
 184                  PLC4, 1,
 185                  PLC5, 1,
 186                 , 1,
 187                  PLC6, 1,
 188                  PLC7, 1,
 189                 Offset(0x3B),   /* PMEStatus1 */
 190                 GP0S, 1,
 191                 GM4S, 1,
 192                 GM5S, 1,
 193                 APS, 1,
 194                 GM6S, 1,
 195                 GM7S, 1,
 196                 GP2S, 1,
 197                 STSS, 1,
 198                 Offset(0x55),   /* SoftPciRst */
 199                 SPRE, 1,
 200                 , 1,
 201                 , 1,
 202                 PNAT, 1,
 203                 PWMK, 1,
 204                 PWNS, 1,
 205
 206                 /*      Offset(0x61), */        /*  Options_1 */
 207                 /*              ,7,  */
 208                 /*              R617,1, */
 209
 210                 Offset(0x65),   /* UsbPMControl */
 211                 , 4,
 212                 URRE, 1,
 213                 Offset(0x68),   /* MiscEnable68 */
 214                 , 3,
 215                 TMTE, 1,
 216                 , 1,
 217                 Offset(0x92),   /* GEVENTIN */
 218                 , 7,
 219                 E7IS, 1,
 220                 Offset(0x96),   /* GPM98IN */
 221                 G8IS, 1,
 222                 G9IS, 1,
 223                 Offset(0x9A),   /* EnhanceControl */
 224                 ,7,
 225                 HPDE, 1,
 226                 Offset(0xA8),   /* PIO7654Enable */
 227                 IO4E, 1,
 228                 IO5E, 1,
 229                 IO6E, 1,
 230                 IO7E, 1,
 231                 Offset(0xA9),   /* PIO7654Status */
 232                 IO4S, 1,
 233                 IO5S, 1,
 234                 IO6S, 1,
 235                 IO7S, 1,
 236         }
 237
 238         /* PM1 Event Block
 239         * First word is PM1_Status, Second word is PM1_Enable
 240         */
 241         OperationRegion(P1EB, SystemIO, APEB, 0x04)
 242                 Field(P1EB, ByteAcc, NoLock, Preserve) {
 243                 TMST, 1,
 244                 ,    3,
 245                 BMST,    1,
 246                 GBST,   1,
 247                 Offset(0x01),
 248                 PBST, 1,
 249                 , 1,
 250                 RTST, 1,
 251                 , 3,
 252                 PWST, 1,
 253                 SPWS, 1,
 254                 Offset(0x02),
 255                 TMEN, 1,
 256                 , 4,
 257                 GBEN, 1,
 258                 Offset(0x03),
 259                 PBEN, 1,
 260                 , 1,
 261                 RTEN, 1,
 262                 , 3,
 263                 PWDA, 1,
 264         }
 265
 266         Scope(\_SB) {
 267
 268                 /* PCIe Configuration Space for 16 busses */
 269                 OperationRegion(PCFG, SystemMemory, PCBA, 0x01000000) /* Each bus consumes 1MB */
 270                         Field(PCFG, ByteAcc, NoLock, Preserve) {
 271                         /* Byte offsets are computed using the following technique:
 272                            * ((bus number + 1) * ((device number * 8) * 4096)) + register offset
 273                            * The 8 comes from 8 functions per device, and 4096 bytes per function config space
 274                         */
 275                         Offset(0x00090024),     /* Byte offset to SATA register 24h - Bus 0, Device 18, Function 0 */
 276                         STB5, 32,
 277                         Offset(0x00098042),     /* Byte offset to OHCI0 register 42h - Bus 0, Device 19, Function 0 */
 278                         PT0D, 1,
 279                         PT1D, 1,
 280                         PT2D, 1,
 281                         PT3D, 1,
 282                         PT4D, 1,
 283                         PT5D, 1,
 284                         PT6D, 1,
 285                         PT7D, 1,
 286                         PT8D, 1,
 287                         PT9D, 1,
 288                         Offset(0x000A0004),     /* Byte offset to SMBUS register 4h - Bus 0, Device 20, Function 0 */
 289                         SBIE, 1,
 290                         SBME, 1,
 291                         Offset(0x000A0008),     /* Byte offset to SMBUS register 8h - Bus 0, Device 20, Function 0 */
 292                         SBRI, 8,
 293                         Offset(0x000A0014),     /* Byte offset to SMBUS register 14h - Bus 0, Device 20, Function 0 */
 294                         SBB1, 32,
 295                         Offset(0x000A0078),     /* Byte offset to SMBUS register 78h - Bus 0, Device 20, Function 0 */
 296                         ,14,
 297                         P92E, 1,                /* Port92 decode enable */
 298                 }
 299
 300                 OperationRegion(SB5, SystemMemory, STB5, 0x1000)
 301                         Field(SB5, AnyAcc, NoLock, Preserve)
 302                         {
 303                         /* Port 0 */
 304                         Offset(0x120),          /* Port 0 Task file status */
 305                         P0ER, 1,
 306                         , 2,
 307                         P0DQ, 1,
 308                         , 3,
 309                         P0BY, 1,
 310                         Offset(0x128),          /* Port 0 Serial ATA status */
 311                         P0DD, 4,
 312                         , 4,
 313                         P0IS, 4,
 314                         Offset(0x12C),          /* Port 0 Serial ATA control */
 315                         P0DI, 4,
 316                         Offset(0x130),          /* Port 0 Serial ATA error */
 317                         , 16,
 318                         P0PR, 1,
 319
 320                         /* Port 1 */
 321                         offset(0x1A0),          /* Port 1 Task file status */
 322                         P1ER, 1,
 323                         , 2,
 324                         P1DQ, 1,
 325                         , 3,
 326                         P1BY, 1,
 327                         Offset(0x1A8),          /* Port 1 Serial ATA status */
 328                         P1DD, 4,
 329                         , 4,
 330                         P1IS, 4,
 331                         Offset(0x1AC),          /* Port 1 Serial ATA control */
 332                         P1DI, 4,
 333                         Offset(0x1B0),          /* Port 1 Serial ATA error */
 334                         , 16,
 335                         P1PR, 1,
 336
 337                         /* Port 2 */
 338                         Offset(0x220),          /* Port 2 Task file status */
 339                         P2ER, 1,
 340                         , 2,
 341                         P2DQ, 1,
 342                         , 3,
 343                         P2BY, 1,
 344                         Offset(0x228),          /* Port 2 Serial ATA status */
 345                         P2DD, 4,
 346                         , 4,
 347                         P2IS, 4,
 348                         Offset(0x22C),          /* Port 2 Serial ATA control */
 349                         P2DI, 4,
 350                         Offset(0x230),          /* Port 2 Serial ATA error */
 351                         , 16,
 352                         P2PR, 1,
 353
 354                         /* Port 3 */
 355                         Offset(0x2A0),          /* Port 3 Task file status */
 356                         P3ER, 1,
 357                         , 2,
 358                         P3DQ, 1,
 359                         , 3,
 360                         P3BY, 1,
 361                         Offset(0x2A8),          /* Port 3 Serial ATA status */
 362                         P3DD, 4,
 363                         , 4,
 364                         P3IS, 4,
 365                         Offset(0x2AC),          /* Port 3 Serial ATA control */
 366                         P3DI, 4,
 367                         Offset(0x2B0),          /* Port 3 Serial ATA error */
 368                         , 16,
 369                         P3PR, 1,
 370                 }
 371         }
 372
 373         #include "acpi/routing.asl"
 374
 375         Scope(\_SB) {
 376
 377                 Method(CkOT, 0){
 378
 379                         if(LNotEqual(OSTP, Ones)) {Return(OSTP)}        /* OS version was already detected */
 380
 381                         if(CondRefOf(\_OSI,Local1))
 382                         {
 383                                 Store(1, OSTP)                /* Assume some form of XP */
 384                                 if (\_OSI("Windows 2006"))      /* Vista */
 385                                 {
 386                                         Store(2, OSTP)
 387                                 }
 388                         } else {
 389                                 If(WCMP(\_OS,"Linux")) {
 390                                         Store(3, OSTP)            /* Linux */
 391                                 } Else {
 392                                         Store(4, OSTP)            /* Gotta be WinCE */
 393                                 }
 394                         }
 395                         Return(OSTP)
 396                 }
 397
 398                 Method(_PIC, 0x01, NotSerialized)
 399                 {
 400                         If (Arg0)
 401                         {
 402                                 \_SB.CIRQ()
 403                         }
 404                         Store(Arg0, PMOD)
 405                 }
 406
 407                 Method(CIRQ, 0x00, NotSerialized)
 408                 {
 409                         Store(0, PINA)
 410                         Store(0, PINB)
 411                         Store(0, PINC)
 412                         Store(0, PIND)
 413                         Store(0, PINE)
 414                         Store(0, PINF)
 415                         Store(0, PING)
 416                         Store(0, PINH)
 417                 }
 418
 419                 Name(IRQB, ResourceTemplate(){
 420                         IRQ(Level,ActiveLow,Shared){15}
 421                 })
 422
 423                 Name(IRQP, ResourceTemplate(){
 424                         IRQ(Level,ActiveLow,Exclusive){3, 4, 5, 7, 10, 11, 12, 15}
 425                 })
 426
 427                 Name(PITF, ResourceTemplate(){
 428                         IRQ(Level,ActiveLow,Exclusive){9}
 429                 })
 430
 431                 Device(INTA) {
 432                         Name(_HID, EISAID("PNP0C0F"))
 433                         Name(_UID, 1)
 434
 435                         Method(_STA, 0) {
 436                                 if (PINA) {
 437                                         Return(0x0B) /* sata is invisible */
 438                                 } else {
 439                                         Return(0x09) /* sata is disabled */
 440                                 }
 441                         } /* End Method(_SB.INTA._STA) */
 442
 443                         Method(_DIS ,0) {
 444                                 /* DBGO("\\_SB\\LNKA\\_DIS\n") */
 445                                 Store(0, PINA)
 446                         } /* End Method(_SB.INTA._DIS) */
 447
 448                         Method(_PRS ,0) {
 449                                 /* DBGO("\\_SB\\LNKA\\_PRS\n") */
 450                                 Return(IRQP)
 451                         } /* Method(_SB.INTA._PRS) */
 452
 453                         Method(_CRS ,0) {
 454                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 455                                 CreateWordField(IRQB, 0x1, IRQN)
 456                                 ShiftLeft(1, PINA, IRQN)
 457                                 Return(IRQB)
 458                         } /* Method(_SB.INTA._CRS) */
 459
 460                         Method(_SRS, 1) {
 461                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 462                                 CreateWordField(ARG0, 1, IRQM)
 463
 464                                 /* Use lowest available IRQ */
 465                                 FindSetRightBit(IRQM, Local0)
 466                                 if (Local0) {
 467                                         Decrement(Local0)
 468                                 }
 469                                 Store(Local0, PINA)
 470                         } /* End Method(_SB.INTA._SRS) */
 471                 } /* End Device(INTA) */
 472
 473                 Device(INTB) {
 474                         Name(_HID, EISAID("PNP0C0F"))
 475                         Name(_UID, 2)
 476
 477                         Method(_STA, 0) {
 478                                 if (PINB) {
 479                                         Return(0x0B) /* sata is invisible */
 480                                 } else {
 481                                         Return(0x09) /* sata is disabled */
 482                                 }
 483                         } /* End Method(_SB.INTB._STA) */
 484
 485                         Method(_DIS ,0) {
 486                                 /* DBGO("\\_SB\\LNKB\\_DIS\n") */
 487                                 Store(0, PINB)
 488                         } /* End Method(_SB.INTB._DIS) */
 489
 490                         Method(_PRS ,0) {
 491                                 /* DBGO("\\_SB\\LNKB\\_PRS\n") */
 492                                 Return(IRQP)
 493                         } /* Method(_SB.INTB._PRS) */
 494
 495                         Method(_CRS ,0) {
 496                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 497                                 CreateWordField(IRQB, 0x1, IRQN)
 498                                 ShiftLeft(1, PINB, IRQN)
 499                                 Return(IRQB)
 500                         } /* Method(_SB.INTB._CRS) */
 501
 502                         Method(_SRS, 1) {
 503                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 504                                 CreateWordField(ARG0, 1, IRQM)
 505
 506                                 /* Use lowest available IRQ */
 507                                 FindSetRightBit(IRQM, Local0)
 508                                 if (Local0) {
 509                                         Decrement(Local0)
 510                                 }
 511                                 Store(Local0, PINB)
 512                         } /* End Method(_SB.INTB._SRS) */
 513                 } /* End Device(INTB)  */
 514
 515                 Device(INTC) {
 516                         Name(_HID, EISAID("PNP0C0F"))
 517                         Name(_UID, 3)
 518
 519                         Method(_STA, 0) {
 520                                 if (PINC) {
 521                                         Return(0x0B) /* sata is invisible */
 522                                 } else {
 523                                         Return(0x09) /* sata is disabled */
 524                                 }
 525                         } /* End Method(_SB.INTC._STA) */
 526
 527                         Method(_DIS ,0) {
 528                                 /* DBGO("\\_SB\\LNKC\\_DIS\n") */
 529                                 Store(0, PINC)
 530                         } /* End Method(_SB.INTC._DIS) */
 531
 532                         Method(_PRS ,0) {
 533                                 /* DBGO("\\_SB\\LNKC\\_PRS\n") */
 534                                 Return(IRQP)
 535                         } /* Method(_SB.INTC._PRS) */
 536
 537                         Method(_CRS ,0) {
 538                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 539                                 CreateWordField(IRQB, 0x1, IRQN)
 540                                 ShiftLeft(1, PINC, IRQN)
 541                                 Return(IRQB)
 542                         } /* Method(_SB.INTC._CRS) */
 543
 544                         Method(_SRS, 1) {
 545                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 546                                 CreateWordField(ARG0, 1, IRQM)
 547
 548                                 /* Use lowest available IRQ */
 549                                 FindSetRightBit(IRQM, Local0)
 550                                 if (Local0) {
 551                                         Decrement(Local0)
 552                                 }
 553                                 Store(Local0, PINC)
 554                         } /* End Method(_SB.INTC._SRS) */
 555                 } /* End Device(INTC)  */
 556
 557                 Device(INTD) {
 558                         Name(_HID, EISAID("PNP0C0F"))
 559                         Name(_UID, 4)
 560
 561                         Method(_STA, 0) {
 562                                 if (PIND) {
 563                                         Return(0x0B) /* sata is invisible */
 564                                 } else {
 565                                         Return(0x09) /* sata is disabled */
 566                                 }
 567                         } /* End Method(_SB.INTD._STA) */
 568
 569                         Method(_DIS ,0) {
 570                                 /* DBGO("\\_SB\\LNKD\\_DIS\n") */
 571                                 Store(0, PIND)
 572                         } /* End Method(_SB.INTD._DIS) */
 573
 574                         Method(_PRS ,0) {
 575                                 /* DBGO("\\_SB\\LNKD\\_PRS\n") */
 576                                 Return(IRQP)
 577                         } /* Method(_SB.INTD._PRS) */
 578
 579                         Method(_CRS ,0) {
 580                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 581                                 CreateWordField(IRQB, 0x1, IRQN)
 582                                 ShiftLeft(1, PIND, IRQN)
 583                                 Return(IRQB)
 584                         } /* Method(_SB.INTD._CRS) */
 585
 586                         Method(_SRS, 1) {
 587                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 588                                 CreateWordField(ARG0, 1, IRQM)
 589
 590                                 /* Use lowest available IRQ */
 591                                 FindSetRightBit(IRQM, Local0)
 592                                 if (Local0) {
 593                                         Decrement(Local0)
 594                                 }
 595                                 Store(Local0, PIND)
 596                         } /* End Method(_SB.INTD._SRS) */
 597                 } /* End Device(INTD)  */
 598
 599                 Device(INTE) {
 600                         Name(_HID, EISAID("PNP0C0F"))
 601                         Name(_UID, 5)
 602
 603                         Method(_STA, 0) {
 604                                 if (PINE) {
 605                                         Return(0x0B) /* sata is invisible */
 606                                 } else {
 607                                         Return(0x09) /* sata is disabled */
 608                                 }
 609                         } /* End Method(_SB.INTE._STA) */
 610
 611                         Method(_DIS ,0) {
 612                                 /* DBGO("\\_SB\\LNKE\\_DIS\n") */
 613                                 Store(0, PINE)
 614                         } /* End Method(_SB.INTE._DIS) */
 615
 616                         Method(_PRS ,0) {
 617                                 /* DBGO("\\_SB\\LNKE\\_PRS\n") */
 618                                 Return(IRQP)
 619                         } /* Method(_SB.INTE._PRS) */
 620
 621                         Method(_CRS ,0) {
 622                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 623                                 CreateWordField(IRQB, 0x1, IRQN)
 624                                 ShiftLeft(1, PINE, IRQN)
 625                                 Return(IRQB)
 626                         } /* Method(_SB.INTE._CRS) */
 627
 628                         Method(_SRS, 1) {
 629                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 630                                 CreateWordField(ARG0, 1, IRQM)
 631
 632                                 /* Use lowest available IRQ */
 633                                 FindSetRightBit(IRQM, Local0)
 634                                 if (Local0) {
 635                                         Decrement(Local0)
 636                                 }
 637                                 Store(Local0, PINE)
 638                         } /* End Method(_SB.INTE._SRS) */
 639                 } /* End Device(INTE)  */
 640
 641                 Device(INTF) {
 642                         Name(_HID, EISAID("PNP0C0F"))
 643                         Name(_UID, 6)
 644
 645                         Method(_STA, 0) {
 646                                 if (PINF) {
 647                                         Return(0x0B) /* sata is invisible */
 648                                 } else {
 649                                         Return(0x09) /* sata is disabled */
 650                                 }
 651                         } /* End Method(_SB.INTF._STA) */
 652
 653                         Method(_DIS ,0) {
 654                                 /* DBGO("\\_SB\\LNKF\\_DIS\n") */
 655                                 Store(0, PINF)
 656                         } /* End Method(_SB.INTF._DIS) */
 657
 658                         Method(_PRS ,0) {
 659                                 /* DBGO("\\_SB\\LNKF\\_PRS\n") */
 660                                 Return(PITF)
 661                         } /* Method(_SB.INTF._PRS) */
 662
 663                         Method(_CRS ,0) {
 664                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 665                                 CreateWordField(IRQB, 0x1, IRQN)
 666                                 ShiftLeft(1, PINF, IRQN)
 667                                 Return(IRQB)
 668                         } /* Method(_SB.INTF._CRS) */
 669
 670                         Method(_SRS, 1) {
 671                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 672                                 CreateWordField(ARG0, 1, IRQM)
 673
 674                                 /* Use lowest available IRQ */
 675                                 FindSetRightBit(IRQM, Local0)
 676                                 if (Local0) {
 677                                         Decrement(Local0)
 678                                 }
 679                                 Store(Local0, PINF)
 680                         } /*  End Method(_SB.INTF._SRS) */
 681                 } /* End Device(INTF)  */
 682
 683                 Device(INTG) {
 684                         Name(_HID, EISAID("PNP0C0F"))
 685                         Name(_UID, 7)
 686
 687                         Method(_STA, 0) {
 688                                 if (PING) {
 689                                         Return(0x0B) /* sata is invisible */
 690                                 } else {
 691                                         Return(0x09) /* sata is disabled */
 692                                 }
 693                         } /* End Method(_SB.INTG._STA)  */
 694
 695                         Method(_DIS ,0) {
 696                                 /* DBGO("\\_SB\\LNKG\\_DIS\n") */
 697                                 Store(0, PING)
 698                         } /* End Method(_SB.INTG._DIS)  */
 699
 700                         Method(_PRS ,0) {
 701                                 /* DBGO("\\_SB\\LNKG\\_PRS\n") */
 702                                 Return(IRQP)
 703                         } /* Method(_SB.INTG._CRS)  */
 704
 705                         Method(_CRS ,0) {
 706                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 707                                 CreateWordField(IRQB, 0x1, IRQN)
 708                                 ShiftLeft(1, PING, IRQN)
 709                                 Return(IRQB)
 710                         } /* Method(_SB.INTG._CRS)  */
 711
 712                         Method(_SRS, 1) {
 713                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 714                                 CreateWordField(ARG0, 1, IRQM)
 715
 716                                 /* Use lowest available IRQ */
 717                                 FindSetRightBit(IRQM, Local0)
 718                                 if (Local0) {
 719                                         Decrement(Local0)
 720                                 }
 721                                 Store(Local0, PING)
 722                         } /* End Method(_SB.INTG._SRS)  */
 723                 } /* End Device(INTG)  */
 724
 725                 Device(INTH) {
 726                         Name(_HID, EISAID("PNP0C0F"))
 727                         Name(_UID, 8)
 728
 729                         Method(_STA, 0) {
 730                                 if (PINH) {
 731                                         Return(0x0B) /* sata is invisible */
 732                                 } else {
 733                                         Return(0x09) /* sata is disabled */
 734                                 }
 735                         } /* End Method(_SB.INTH._STA)  */
 736
 737                         Method(_DIS ,0) {
 738                                 /* DBGO("\\_SB\\LNKH\\_DIS\n") */
 739                                 Store(0, PINH)
 740                         } /* End Method(_SB.INTH._DIS)  */
 741
 742                         Method(_PRS ,0) {
 743                                 /* DBGO("\\_SB\\LNKH\\_PRS\n") */
 744                                 Return(IRQP)
 745                         } /* Method(_SB.INTH._CRS)  */
 746
 747                         Method(_CRS ,0) {
 748                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 749                                 CreateWordField(IRQB, 0x1, IRQN)
 750                                 ShiftLeft(1, PINH, IRQN)
 751                                 Return(IRQB)
 752                         } /* Method(_SB.INTH._CRS)  */
 753
 754                         Method(_SRS, 1) {
 755                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 756                                 CreateWordField(ARG0, 1, IRQM)
 757
 758                                 /* Use lowest available IRQ */
 759                                 FindSetRightBit(IRQM, Local0)
 760                                 if (Local0) {
 761                                         Decrement(Local0)
 762                                 }
 763                                 Store(Local0, PINH)
 764                         } /* End Method(_SB.INTH._SRS)  */
 765                 } /* End Device(INTH)   */
 766
 767         }   /* End Scope(_SB)  */
 768
 769
 770         /* Supported sleep states: */
 771         Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )        /* (S0) - working state */
 772
 773         If (LAnd(SSFG, 0x01)) {
 774                 Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )        /* (S1) - sleeping w/CPU context */
 775         }
 776         If (LAnd(SSFG, 0x02)) {
 777                 Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )        /* (S2) - "light" Suspend to RAM */
 778         }
 779         If (LAnd(SSFG, 0x04)) {
 780                 Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )        /* (S3) - Suspend to RAM */
 781         }
 782         If (LAnd(SSFG, 0x08)) {
 783                 Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )        /* (S4) - Suspend to Disk */
 784         }
 785
 786         Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )        /* (S5) - Soft Off */
 787
 788         Name(\_SB.CSPS ,0)                              /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
 789         Name(CSMS, 0)                   /* Current System State */
 790
 791         /* Wake status package */
 792         Name(WKST,Package(){Zero, Zero})
 793
 794         /*
 795         * \_PTS - Prepare to Sleep method
 796         *
 797         *       Entry:
 798         *               Arg0=The value of the sleeping state S1=1, S2=2, etc
 799         *
 800         * Exit:
 801         *               -none-
 802         *
 803         * The _PTS control method is executed at the beginning of the sleep process
 804         * for S1-S5. The sleeping value is passed to the _PTS control method.   This
 805         * control method may be executed a relatively long time before entering the
 806         * sleep state and the OS may abort      the operation without notification to
 807         * the ACPI driver.  This method cannot modify the configuration or power
 808         * state of any device in the system.
 809         */
 810         Method(\_PTS, 1) {
 811                 /* DBGO("\\_PTS\n") */
 812                 /* DBGO("From S0 to S") */
 813                 /* DBGO(Arg0) */
 814                 /* DBGO("\n") */
 815
 816                 /* Don't allow PCIRST# to reset USB */
 817                 if (LEqual(Arg0,3)){
 818                         Store(0,URRE)
 819                 }
 820
 821                 /* Clear sleep SMI status flag and enable sleep SMI trap. */
 822                 /*Store(One, CSSM)
 823                 Store(One, SSEN)*/
 824
 825                 /* On older chips, clear PciExpWakeDisEn */
 826                 /*if (LLessEqual(\_SB.SBRI, 0x13)) {
 827                 *       Store(0,\_SB.PWDE)
 828                 *}
 829                 */
 830
 831                 /* Clear wake status structure. */
 832                 Store(0, Index(WKST,0))
 833                 Store(0, Index(WKST,1))
 834         } /* End Method(\_PTS) */
 835
 836         /*
 837         *  The following method results in a "not a valid reserved NameSeg"
 838         *  warning so I have commented it out for the duration.  It isn't
 839         *  used, so it could be removed.
 840         *
 841         *
 842         *       \_GTS OEM Going To Sleep method
 843         *
 844         *       Entry:
 845         *               Arg0=The value of the sleeping state S1=1, S2=2
 846         *
 847         *       Exit:
 848         *               -none-
 849         *
 850         *  Method(\_GTS, 1) {
 851         *  DBGO("\\_GTS\n")
 852         *  DBGO("From S0 to S")
 853         *  DBGO(Arg0)
 854         *  DBGO("\n")
 855         *  }
 856         */
 857
 858         /*
 859         *       \_BFS OEM Back From Sleep method
 860         *
 861         *       Entry:
 862         *               Arg0=The value of the sleeping state S1=1, S2=2
 863         *
 864         *       Exit:
 865         *               -none-
 866         */
 867         Method(\_BFS, 1) {
 868                 /* DBGO("\\_BFS\n") */
 869                 /* DBGO("From S") */
 870                 /* DBGO(Arg0) */
 871                 /* DBGO(" to S0\n") */
 872         }
 873
 874         /*
 875         *  \_WAK System Wake method
 876         *
 877         *       Entry:
 878         *               Arg0=The value of the sleeping state S1=1, S2=2
 879         *
 880         *       Exit:
 881         *               Return package of 2 DWords
 882         *               Dword 1 - Status
 883         *                       0x00000000      wake succeeded
 884         *                       0x00000001      Wake was signaled but failed due to lack of power
 885         *                       0x00000002      Wake was signaled but failed due to thermal condition
 886         *               Dword 2 - Power Supply state
 887         *                       if non-zero the effective S-state the power supply entered
 888         */
 889         Method(\_WAK, 1) {
 890                 /* DBGO("\\_WAK\n") */
 891                 /* DBGO("From S") */
 892                 /* DBGO(Arg0) */
 893                 /* DBGO(" to S0\n") */
 894
 895                 /* Re-enable HPET */
 896                 Store(1,HPDE)
 897
 898                 /* Restore PCIRST# so it resets USB */
 899                 if (LEqual(Arg0,3)){
 900                         Store(1,URRE)
 901                 }
 902
 903                 /* Arbitrarily clear PciExpWakeStatus */
 904                 Store(PWST, PWST)
 905
 906                 /* if(DeRefOf(Index(WKST,0))) {
 907                 *       Store(0, Index(WKST,1))
 908                 * } else {
 909                 *       Store(Arg0, Index(WKST,1))
 910                 * }
 911                 */
 912
 913                 Return(WKST)
 914         } /* End Method(\_WAK) */
 915
 916         Scope(\_GPE) {  /* Start Scope GPE */
 917                 /*  General event 0  */
 918                 /* Method(_L00) {
 919                 *       DBGO("\\_GPE\\_L00\n")
 920                 * }
 921                 */
 922
 923                 /*  General event 1  */
 924                 /* Method(_L01) {
 925                 *       DBGO("\\_GPE\\_L00\n")
 926                 * }
 927                 */
 928
 929                 /*  General event 2  */
 930                 /* Method(_L02) {
 931                 *       DBGO("\\_GPE\\_L00\n")
 932                 * }
 933                 */
 934
 935                 /*  General event 3  */
 936                 Method(_L03) {
 937                         /* DBGO("\\_GPE\\_L00\n") */
 938                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 939                 }
 940
 941                 /*  General event 4  */
 942                 /* Method(_L04) {
 943                 *       DBGO("\\_GPE\\_L00\n")
 944                 * }
 945                 */
 946
 947                 /*  General event 5  */
 948                 /* Method(_L05) {
 949                 *       DBGO("\\_GPE\\_L00\n")
 950                 * }
 951                 */
 952
 953                 /*  General event 6 - Used for GPM6, moved to USB.asl */
 954                 /* Method(_L06) {
 955                 *       DBGO("\\_GPE\\_L00\n")
 956                 * }
 957                 */
 958
 959                 /*  General event 7 - Used for GPM7, moved to USB.asl */
 960                 /* Method(_L07) {
 961                 *       DBGO("\\_GPE\\_L07\n")
 962                 * }
 963                 */
 964
 965                 /*  Legacy PM event  */
 966                 Method(_L08) {
 967                         /* DBGO("\\_GPE\\_L08\n") */
 968                 }
 969
 970                 /*  Temp warning (TWarn) event  */
 971                 Method(_L09) {
 972                         /* DBGO("\\_GPE\\_L09\n") */
 973                         Notify (\_TZ.TZ00, 0x80)
 974                 }
 975
 976                 /*  Reserved  */
 977                 /* Method(_L0A) {
 978                 *       DBGO("\\_GPE\\_L0A\n")
 979                 * }
 980                 */
 981
 982                 /*  USB controller PME#  */
 983                 Method(_L0B) {
 984                         /* DBGO("\\_GPE\\_L0B\n") */
 985                         Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
 986                         Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
 987                         Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
 988                         Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
 989                         Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
 990                         Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
 991                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 992                 }
 993
 994                 /*  AC97 controller PME#  */
 995                 /* Method(_L0C) {
 996                 *       DBGO("\\_GPE\\_L0C\n")
 997                 * }
 998                 */
 999
1000                 /*  OtherTherm PME#  */
1001                 /* Method(_L0D) {
1002                 *       DBGO("\\_GPE\\_L0D\n")
1003                 * }
1004                 */
1005
1006                 /*  GPM9 SCI event - Moved to USB.asl */
1007                 /* Method(_L0E) {
1008                 *       DBGO("\\_GPE\\_L0E\n")
1009                 * }
1010                 */
1011
1012                 /*  PCIe HotPlug event  */
1013                 /* Method(_L0F) {
1014                 *       DBGO("\\_GPE\\_L0F\n")
1015                 * }
1016                 */
1017
1018                 /*  ExtEvent0 SCI event  */
1019                 Method(_L10) {
1020                         /* DBGO("\\_GPE\\_L10\n") */
1021                 }
1022
1023
1024                 /*  ExtEvent1 SCI event  */
1025                 Method(_L11) {
1026                         /* DBGO("\\_GPE\\_L11\n") */
1027                 }
1028
1029                 /*  PCIe PME# event  */
1030                 /* Method(_L12) {
1031                 *       DBGO("\\_GPE\\_L12\n")
1032                 * }
1033                 */
1034
1035                 /*  GPM0 SCI event - Moved to USB.asl */
1036                 /* Method(_L13) {
1037                 *       DBGO("\\_GPE\\_L13\n")
1038                 * }
1039                 */
1040
1041                 /*  GPM1 SCI event - Moved to USB.asl */
1042                 /* Method(_L14) {
1043                 *       DBGO("\\_GPE\\_L14\n")
1044                 * }
1045                 */
1046
1047                 /*  GPM2 SCI event - Moved to USB.asl */
1048                 /* Method(_L15) {
1049                 *       DBGO("\\_GPE\\_L15\n")
1050                 * }
1051                 */
1052
1053                 /*  GPM3 SCI event - Moved to USB.asl */
1054                 /* Method(_L16) {
1055                 *       DBGO("\\_GPE\\_L16\n")
1056                 * }
1057                 */
1058
1059                 /*  GPM8 SCI event - Moved to USB.asl */
1060                 /* Method(_L17) {
1061                 *       DBGO("\\_GPE\\_L17\n")
1062                 * }
1063                 */
1064
1065                 /*  GPIO0 or GEvent8 event  */
1066                 Method(_L18) {
1067                         /* DBGO("\\_GPE\\_L18\n") */
1068                         Notify(\_SB.PCI0.PBR2, 0x02) /* NOTIFY_DEVICE_WAKE */
1069                         Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
1070                         Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
1071                         Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
1072                         Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
1073                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1074                 }
1075
1076                 /*  GPM4 SCI event - Moved to USB.asl */
1077                 /* Method(_L19) {
1078                 *       DBGO("\\_GPE\\_L19\n")
1079                 * }
1080                 */
1081
1082                 /*  GPM5 SCI event */
1083                 Method(_L1A) {
1084                         /* DBGO("\\_GPE\\_L1A\n") */
1085                         Notify (\_SB.SLPB, 0x80)
1086                 }
1087
1088                 /*  Azalia SCI event  */
1089                 Method(_L1B) {
1090                         /* DBGO("\\_GPE\\_L1B\n") */
1091                         Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
1092                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1093                 }
1094
1095                 /*  GPM6 SCI event - Reassigned to _L06 */
1096                 /* Method(_L1C) {
1097                 *       DBGO("\\_GPE\\_L1C\n")
1098                 * }
1099                 */
1100
1101                 /*  GPM7 SCI event - Reassigned to _L07 */
1102                 /* Method(_L1D) {
1103                 *       DBGO("\\_GPE\\_L1D\n")
1104                 * }
1105                 */
1106
1107                 /*  GPIO2 or GPIO66 SCI event  */
1108                 /* Method(_L1E) {
1109                 *       DBGO("\\_GPE\\_L1E\n")
1110                 * }
1111                 */
1112
1113                 /*  SATA SCI event - Moved to sata.asl */
1114                 /* Method(_L1F) {
1115                 *        DBGO("\\_GPE\\_L1F\n")
1116                 * }
1117                 */
1118
1119         }       /* End Scope GPE */
1120
1121         #include "acpi/usb.asl"
1122
1123         /* South Bridge */
1124         Scope(\_SB) { /* Start \_SB scope */
1125                 #include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
1126
1127                 /*  _SB.PCI0 */
1128                 /* Note: Only need HID on Primary Bus */
1129                 Device(PCI0) {
1130                         External (TOM1)
1131                         External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
1132                         Name(_HID, EISAID("PNP0A03"))
1133                         Name(_ADR, 0x00180000)  /* Dev# = BSP Dev#, Func# = 0 */
1134                         Method(_BBN, 0) { /* Bus number = 0 */
1135                                 Return(0)
1136                         }
1137                         Method(_STA, 0) {
1138                                 /* DBGO("\\_SB\\PCI0\\_STA\n") */
1139                                 Return(0x0B)     /* Status is visible */
1140                         }
1141
1142                         Method(_PRT,0) {
1143                                 If(PMOD){ Return(APR0) }   /* APIC mode */
1144                                 Return (PR0)                  /* PIC Mode */
1145                         } /* end _PRT */
1146
1147                         /* Describe the Northbridge devices */
1148                         Device(AMRT) {
1149                                 Name(_ADR, 0x00000000)
1150                         } /* end AMRT */
1151
1152                         /* The internal GFX bridge */
1153                         Device(AGPB) {
1154                                 Name(_ADR, 0x00010000)
1155                                 Name(_PRW, Package() {0x18, 4})
1156                                 Method(_PRT,0) {
1157                                         Return (APR1)
1158                                 }
1159                         }  /* end AGPB */
1160
1161                         /* The external GFX bridge */
1162                         Device(PBR2) {
1163                                 Name(_ADR, 0x00020000)
1164                                 Name(_PRW, Package() {0x18, 4})
1165                                 Method(_PRT,0) {
1166                                         If(PMOD){ Return(APS2) }   /* APIC mode */
1167                                         Return (PS2)                  /* PIC Mode */
1168                                 } /* end _PRT */
1169                         } /* end PBR2 */
1170
1171                         /* Dev3 is also an external GFX bridge, not used in Herring */
1172
1173                         Device(PBR4) {
1174                                 Name(_ADR, 0x00040000)
1175                                 Name(_PRW, Package() {0x18, 4})
1176                                 Method(_PRT,0) {
1177                                         If(PMOD){ Return(APS4) }   /* APIC mode */
1178                                         Return (PS4)                  /* PIC Mode */
1179                                 } /* end _PRT */
1180                         } /* end PBR4 */
1181
1182                         Device(PBR5) {
1183                                 Name(_ADR, 0x00050000)
1184                                 Name(_PRW, Package() {0x18, 4})
1185                                 Method(_PRT,0) {
1186                                         If(PMOD){ Return(APS5) }   /* APIC mode */
1187                                         Return (PS5)                  /* PIC Mode */
1188                                 } /* end _PRT */
1189                         } /* end PBR5 */
1190
1191                         Device(PBR6) {
1192                                 Name(_ADR, 0x00060000)
1193                                 Name(_PRW, Package() {0x18, 4})
1194                                 Method(_PRT,0) {
1195                                         If(PMOD){ Return(APS6) }   /* APIC mode */
1196                                         Return (PS6)                  /* PIC Mode */
1197                                 } /* end _PRT */
1198                         } /* end PBR6 */
1199
1200                         /* The onboard EtherNet chip */
1201                         Device(PBR7) {
1202                                 Name(_ADR, 0x00070000)
1203                                 Name(_PRW, Package() {0x18, 4})
1204                                 Method(_PRT,0) {
1205                                         If(PMOD){ Return(APS7) }   /* APIC mode */
1206                                         Return (PS7)                  /* PIC Mode */
1207                                 } /* end _PRT */
1208                         } /* end PBR7 */
1209
1210
1211                         /* PCI slot 1, 2, 3 */
1212                         Device(PIBR) {
1213                                 Name(_ADR, 0x00140004)
1214                                 Name(_PRW, Package() {0x18, 4})
1215
1216                                 Method(_PRT, 0) {
1217                                         Return (PCIB)
1218                                 }
1219                         }
1220
1221                         /* Describe the Southbridge devices */
1222                         Device(STCR) {
1223                                 Name(_ADR, 0x00120000)
1224                                 #include "acpi/sata.asl"
1225                         } /* end STCR */
1226
1227                         Device(UOH1) {
1228                                 Name(_ADR, 0x00130000)
1229                                 Name(_PRW, Package() {0x0B, 3})
1230                         } /* end UOH1 */
1231
1232                         Device(UOH2) {
1233                                 Name(_ADR, 0x00130001)
1234                                 Name(_PRW, Package() {0x0B, 3})
1235                         } /* end UOH2 */
1236
1237                         Device(UOH3) {
1238                                 Name(_ADR, 0x00130002)
1239                                 Name(_PRW, Package() {0x0B, 3})
1240                         } /* end UOH3 */
1241
1242                         Device(UOH4) {
1243                                 Name(_ADR, 0x00130003)
1244                                 Name(_PRW, Package() {0x0B, 3})
1245                         } /* end UOH4 */
1246
1247                         Device(UOH5) {
1248                                 Name(_ADR, 0x00130004)
1249                                 Name(_PRW, Package() {0x0B, 3})
1250                         } /* end UOH5 */
1251
1252                         Device(UEH1) {
1253                                 Name(_ADR, 0x00130005)
1254                                 Name(_PRW, Package() {0x0B, 3})
1255                         } /* end UEH1 */
1256
1257                         Device(SBUS) {
1258                                 Name(_ADR, 0x00140000)
1259                         } /* end SBUS */
1260
1261                         /* Primary (and only) IDE channel */
1262                         Device(IDEC) {
1263                                 Name(_ADR, 0x00140001)
1264                                 #include "acpi/ide.asl"
1265                         } /* end IDEC */
1266
1267                         Device(AZHD) {
1268                                 Name(_ADR, 0x00140002)
1269                                 OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
1270                                         Field(AZPD, AnyAcc, NoLock, Preserve) {
1271                                         offset (0x42),
1272                                         NSDI, 1,
1273                                         NSDO, 1,
1274                                         NSEN, 1,
1275                                         offset (0x44),
1276                                         IPCR, 4,
1277                                         offset (0x54),
1278                                         PWST, 2,
1279                                         , 6,
1280                                         PMEB, 1,
1281                                         , 6,
1282                                         PMST, 1,
1283                                         offset (0x62),
1284                                         MMCR, 1,
1285                                         offset (0x64),
1286                                         MMLA, 32,
1287                                         offset (0x68),
1288                                         MMHA, 32,
1289                                         offset (0x6C),
1290                                         MMDT, 16,
1291                                 }
1292
1293                                 Method(_INI) {
1294                                         If(LEqual(OSTP,3)){   /* If we are running Linux */
1295                                                 Store(zero, NSEN)
1296                                                 Store(one, NSDO)
1297                                                 Store(one, NSDI)
1298                                         }
1299                                 }
1300                         } /* end AZHD */
1301
1302                         Device(LIBR) {
1303                                 Name(_ADR, 0x00140003)
1304                                 /* Method(_INI) {
1305                                 *       DBGO("\\_SB\\PCI0\\LpcIsaBr\\_INI\n")
1306                                 } */ /* End Method(_SB.SBRDG._INI) */
1307
1308                                 /* Real Time Clock Device */
1309                                 Device(RTC0) {
1310                                         Name(_HID, EISAID("PNP0B00"))   /* AT Real Time Clock (not PIIX4 compatible) */
1311                                         Name(_CRS, ResourceTemplate() {
1312                                                 IRQNoFlags(){8}
1313                                                 IO(Decode16,0x0070, 0x0070, 0, 2)
1314                                                 /* IO(Decode16,0x0070, 0x0070, 0, 4) */
1315                                         })
1316                                 } /* End Device(_SB.PCI0.LpcIsaBr.RTC0) */
1317
1318                                 Device(TMR) {   /* Timer */
1319                                         Name(_HID,EISAID("PNP0100"))    /* System Timer */
1320                                         Name(_CRS, ResourceTemplate() {
1321                                                 IRQNoFlags(){0}
1322                                                 IO(Decode16, 0x0040, 0x0040, 0, 4)
1323                                                 /* IO(Decode16, 0x0048, 0x0048, 0, 4) */
1324                                         })
1325                                 } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */
1326
1327                                 Device(SPKR) {  /* Speaker */
1328                                         Name(_HID,EISAID("PNP0800"))    /* AT style speaker */
1329                                         Name(_CRS, ResourceTemplate() {
1330                                                 IO(Decode16, 0x0061, 0x0061, 0, 1)
1331                                         })
1332                                 } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */
1333
1334                                 Device(PIC) {
1335                                         Name(_HID,EISAID("PNP0000"))    /* AT Interrupt Controller */
1336                                         Name(_CRS, ResourceTemplate() {
1337                                                 IRQNoFlags(){2}
1338                                                 IO(Decode16,0x0020, 0x0020, 0, 2)
1339                                                 IO(Decode16,0x00A0, 0x00A0, 0, 2)
1340                                                 /* IO(Decode16, 0x00D0, 0x00D0, 0x10, 0x02) */
1341                                                 /* IO(Decode16, 0x04D0, 0x04D0, 0x10, 0x02) */
1342                                         })
1343                                 } /* End Device(_SB.PCI0.LpcIsaBr.PIC) */
1344
1345                                 Device(MAD) { /* 8257 DMA */
1346                                         Name(_HID,EISAID("PNP0200"))    /* Hardware Device ID */
1347                                         Name(_CRS, ResourceTemplate() {
1348                                                 DMA(Compatibility,BusMaster,Transfer8){4}
1349                                                 IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
1350                                                 IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
1351                                                 IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
1352                                                 IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
1353                                                 IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
1354                                                 IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
1355                                         }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
1356                                 } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
1357
1358                                 Device(COPR) {
1359                                         Name(_HID,EISAID("PNP0C04"))    /* Math Coprocessor */
1360                                         Name(_CRS, ResourceTemplate() {
1361                                                 IO(Decode16, 0x00F0, 0x00F0, 0, 0x10)
1362                                                 IRQNoFlags(){13}
1363                                         })
1364                                 } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
1365
1366                                 Device(HPTM) {
1367                                         Name(_HID,EISAID("PNP0103"))
1368                                         Name(CRS,ResourceTemplate()     {
1369                                                 Memory32Fixed(ReadOnly,0xFED00000, 0x00000400, HPT)     /* 1kb reserved space */
1370                                         })
1371                                         Method(_STA, 0) {
1372                                                 Return(0x0F) /* sata is visible */
1373                                         }
1374                                         Method(_CRS, 0) {
1375                                                 CreateDwordField(CRS, ^HPT._BAS, HPBA)
1376                                                 Store(HPBA, HPBA)
1377                                                 Return(CRS)
1378                                         }
1379                                 } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
1380                         } /* end LIBR */
1381
1382                         Device(HPBR) {
1383                                 Name(_ADR, 0x00140004)
1384                         } /* end HostPciBr */
1385
1386                         Device(ACAD) {
1387                                 Name(_ADR, 0x00140005)
1388                         } /* end Ac97audio */
1389
1390                         Device(ACMD) {
1391                                 Name(_ADR, 0x00140006)
1392                         } /* end Ac97modem */
1393
1394                         Name(CRES, ResourceTemplate() {
1395                                 IO(Decode16, 0x0CF8, 0x0CF8, 1, 8)
1396
1397                                 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1398                                         0x0000,                 /* address granularity */
1399                                         0x0000,                 /* range minimum */
1400                                         0x0CF7,                 /* range maximum */
1401                                         0x0000,                 /* translation */
1402                                         0x0CF8                  /* length */
1403                                 )
1404
1405                                 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1406                                         0x0000,                 /* address granularity */
1407                                         0x0D00,                 /* range minimum */
1408                                         0xFFFF,                 /* range maximum */
1409                                         0x0000,                 /* translation */
1410                                         0xF300                  /* length */
1411                                 )
1412
1413                                 Memory32Fixed(READWRITE, 0, 0xA0000, BSMM)
1414                                 Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM)   /* VGA memory space */
1415                                 Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1)   /* Assume C0000-E0000 empty */
1416                                 Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS)   /* BIOS ROM area */
1417
1418                                 /* DRAM Memory from 1MB to TopMem */
1419                                 Memory32Fixed(READWRITE, 0x00100000, 0, DMLO)   /* 1MB to TopMem */
1420
1421                                 /* BIOS space just below 4GB */
1422                                 DWORDMemory(
1423                                         ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1424                                         0x00,                   /* Granularity */
1425                                         0x00000000,             /* Min */
1426                                         0x00000000,             /* Max */
1427                                         0x00000000,             /* Translation */
1428                                         0x00000001,             /* Max-Min, RLEN */
1429                                         ,,
1430                                         PCBM
1431                                 )
1432
1433                                 /* DRAM memory from 4GB to TopMem2 */
1434                                 QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1435                                         0x00000000,             /* Granularity */
1436                                         0x00000000,             /* Min */
1437                                         0x00000000,             /* Max */
1438                                         0x00000000,             /* Translation */
1439                                         0x00000001,             /* Max-Min, RLEN */
1440                                         ,,
1441                                         DMHI
1442                                 )
1443
1444                                 /* BIOS space just below 16EB */
1445                                 QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1446                                         0x00000000,             /* Granularity */
1447                                         0x00000000,             /* Min */
1448                                         0x00000000,             /* Max */
1449                                         0x00000000,             /* Translation */
1450                                         0x00000001,             /* Max-Min, RLEN */
1451                                         ,,
1452                                         PEBM
1453                                 )
1454
1455                         }) /* End Name(_SB.PCI0.CRES) */
1456
1457                         Method(_CRS, 0) {
1458                                 /* DBGO("\\_SB\\PCI0\\_CRS\n") */
1459
1460                                 CreateDWordField(CRES, ^EMM1._BAS, EM1B)
1461                                 CreateDWordField(CRES, ^EMM1._LEN, EM1L)
1462                                 CreateDWordField(CRES, ^DMLO._BAS, DMLB)
1463                                 CreateDWordField(CRES, ^DMLO._LEN, DMLL)
1464                                 CreateDWordField(CRES, ^PCBM._MIN, PBMB)
1465                                 CreateDWordField(CRES, ^PCBM._LEN, PBML)
1466
1467                                 CreateQWordField(CRES, ^DMHI._MIN, DMHB)
1468                                 CreateQWordField(CRES, ^DMHI._LEN, DMHL)
1469                                 CreateQWordField(CRES, ^PEBM._MIN, EBMB)
1470                                 CreateQWordField(CRES, ^PEBM._LEN, EBML)
1471
1472                                 If(LGreater(LOMH, 0xC0000)){
1473                                         Store(0xC0000, EM1B)    /* Hole above C0000 and below E0000 */
1474                                         Subtract(LOMH, 0xC0000, EM1L)   /* subtract start, assumes allocation from C0000 going up */
1475                                 }
1476
1477                                 /* Set size of memory from 1MB to TopMem */
1478                                 Subtract(TOM1, 0x100000, DMLL)
1479
1480                                 /*
1481                                 * If(LNotEqual(TOM2, 0x00000000)){
1482                                 *       Store(0x100000000,DMHB)                 DRAM from 4GB to TopMem2
1483                                 *       ShiftLeft(TOM2, 20, Local0)
1484                                 *       Subtract(Local0, 0x100000000, DMHL)
1485                                 * }
1486                                 */
1487
1488                                 /* If there is no memory above 4GB, put the BIOS just below 4GB */
1489                                 If(LEqual(TOM2, 0x00000000)){
1490                                         Store(PBAD,PBMB)                        /* Reserve the "BIOS" space */
1491                                         Store(PBLN,PBML)
1492                                 }
1493                                 Else {  /* Otherwise, put the BIOS just below 16EB */
1494                                         ShiftLeft(PBAD,16,EBMB)         /* Reserve the "BIOS" space */
1495                                         Store(PBLN,EBML)
1496                                 }
1497
1498                                 Return(CRES) /* note to change the Name buffer */
1499                         }  /* end of Method(_SB.PCI0._CRS) */
1500
1501                         /*
1502                         *
1503                         *               FIRST METHOD CALLED UPON BOOT
1504                         *
1505                         *  1. If debugging, print current OS and ACPI interpreter.
1506                         *  2. Get PCI Interrupt routing from ACPI VSM, this
1507                         *     value is based on user choice in BIOS setup.
1508                         */
1509                         Method(_INI, 0) {
1510                                 /* DBGO("\\_SB\\_INI\n") */
1511                                 /* DBGO("   DSDT.ASL code from ") */
1512                                 /* DBGO(__DATE__) */
1513                                 /* DBGO(" ") */
1514                                 /* DBGO(__TIME__) */
1515                                 /* DBGO("\n   Sleep states supported: ") */
1516                                 /* DBGO("\n") */
1517                                 /* DBGO("   \\_OS=") */
1518                                 /* DBGO(\_OS) */
1519                                 /* DBGO("\n   \\_REV=") */
1520                                 /* DBGO(\_REV) */
1521                                 /* DBGO("\n") */
1522
1523                                 /* Determine the OS we're running on */
1524                                 CkOT()
1525
1526                                 /* On older chips, clear PciExpWakeDisEn */
1527                                 /*if (LLessEqual(\SBRI, 0x13)) {
1528                                 *       Store(0,\PWDE)
1529                                 * }
1530                                 */
1531                         } /* End Method(_SB._INI) */
1532                 } /* End Device(PCI0)  */
1533
1534                 Device(PWRB) {  /* Start Power button device */
1535                         Name(_HID, EISAID("PNP0C0C"))
1536                         Name(_UID, 0xAA)
1537                         Name(_PRW, Package () {3, 0x04})        /* wake from S1-S4 */
1538                         Name(_STA, 0x0B) /* sata is invisible */
1539                 }
1540
1541                 Device (SLPB) {
1542                         Name (_HID, EisaId ("PNP0C0E"))
1543                         Name (_PRW, Package (0x02) {0x0F, 0x04})
1544                         Name (_STA, 0x0B)
1545                 }
1546         } /* End \_SB scope */
1547
1548         Scope(\_SI) {
1549                 Method(_SST, 1) {
1550                         /* DBGO("\\_SI\\_SST\n") */
1551                         /* DBGO("   New Indicator state: ") */
1552                         /* DBGO(Arg0) */
1553                         /* DBGO("\n") */
1554                 }
1555         } /* End Scope SI */
1556
1557         OperationRegion (SMB0, SystemIO, 0xB00, 0x0C)
1558                 Field (SMB0, ByteAcc, NoLock, Preserve) {
1559                         HSTS,   8, /* SMBUS status */
1560                         SSTS,   8,  /* SMBUS slave status */
1561                         HCNT,   8,  /* SMBUS control */
1562                         HCMD,   8,  /* SMBUS host cmd */
1563                         HADD,   8,  /* SMBUS address */
1564                         DAT0,   8,  /* SMBUS data0 */
1565                         DAT1,   8,  /* SMBUS data1 */
1566                         BLKD,   8,  /* SMBUS block data */
1567                         SCNT,   8,  /* SMBUS slave control */
1568                         SCMD,   8,  /* SMBUS shaow cmd */
1569                         SEVT,   8,  /* SMBUS slave event */
1570                         SDAT,   8  /* SMBUS slave data */
1571         }
1572
1573         Method (WCLR, 0, NotSerialized) { /* clear SMBUS status register */
1574                 Store (0x1E, HSTS)
1575                 Store (0xFA, Local0)
1576                 While (LAnd (LNotEqual (And (HSTS, 0x1E), Zero), LGreater (Local0, Zero))) {
1577                         Stall (0x64)
1578                         Decrement (Local0)
1579                 }
1580
1581                 Return (Local0)
1582         }
1583
1584         Method (SWTC, 1, NotSerialized) {
1585                 Store (Arg0, Local0)
1586                 Store (0x07, Local2)
1587                 Store (One, Local1)
1588                 While (LEqual (Local1, One)) {
1589                         Store (And (HSTS, 0x1E), Local3)
1590                         If (LNotEqual (Local3, Zero)) { /* read sucess */
1591                                 If (LEqual (Local3, 0x02)) {
1592                                         Store (Zero, Local2)
1593                                 }
1594
1595                                 Store (Zero, Local1)
1596                         }
1597                         Else {
1598                                 If (LLess (Local0, 0x0A)) { /* read failure */
1599                                         Store (0x18, Local2)
1600                                         Store (Zero, Local1)
1601                                 }
1602                                 Else {
1603                                         Sleep (0x0A) /* 10 ms, try again */
1604                                         Subtract (Local0, 0x0A, Local0)
1605                                 }
1606                         }
1607                 }
1608
1609                 Return (Local2)
1610         }
1611
1612         Method (SMBR, 3, NotSerialized) {
1613                 Store (0x07, Local0)
1614
1615                 Store (WCLR (), Local0) /* clear SMBUS status register before read data */
1616
1617                 Store (0x1F, HSTS)
1618                 Store (Or (ShiftLeft (Arg1, One), One), HADD)
1619                 Store (Arg2, HCMD)
1620                 If (LEqual (Arg0, 0x07)) {
1621                         Store (0x48, HCNT) /* read byte */
1622                 }
1623
1624                 Store (SWTC (0x03E8), Local1) /* 1000 ms */
1625                 If (LEqual (Local1, Zero)) {
1626                         If (LEqual (Arg0, 0x07)) {
1627                                 Store (DAT0, Local0)
1628                         }
1629                 }
1630                 Else {
1631                         Store (Local1, Local0)
1632                 }
1633
1634                 Return (Local0)
1635         }
1636
1637         /* THERMAL */
1638         Scope(\_TZ) {
1639                 Name (KELV, 2732)
1640                 Name (THOT, 900)
1641                 Name (TCRT, 950)
1642
1643                 ThermalZone(TZ00) {
1644                         Method(_AC0,0) {        /* Active Cooling 0 (0=highest fan speed) */
1645                                 /* DBGO("\\_TZ\\TZ00\\_AC0\n") */
1646                                 Return(Add(0, 2730))
1647                         }
1648                         Method(_AL0,0) {        /* Returns package of cooling device to turn on */
1649                                 /* DBGO("\\_TZ\\TZ00\\_AL0\n") */
1650                                 Return(Package() {\_TZ.TZ00.FAN0})
1651                         }
1652                         Device (FAN0) {
1653                                 Name(_HID, EISAID("PNP0C0B"))
1654                                 Name(_PR0, Package() {PFN0})
1655                         }
1656
1657                         PowerResource(PFN0,0,0) {
1658                                 Method(_STA) {
1659                                         Store(0xF,Local0)
1660                                         Return(Local0)
1661                                 }
1662                                 Method(_ON) {
1663                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _ON\n") */
1664                                 }
1665                                 Method(_OFF) {
1666                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _OFF\n") */
1667                                 }
1668                         }
1669
1670                         Method(_HOT,0) {        /* return hot temp in tenths degree Kelvin */
1671                                 /* DBGO("\\_TZ\\TZ00\\_HOT\n") */
1672                                 Return (Add (THOT, KELV))
1673                         }
1674                         Method(_CRT,0) {        /* return critical temp in tenths degree Kelvin */
1675                                 /* DBGO("\\_TZ\\TZ00\\_CRT\n") */
1676                                 Return (Add (TCRT, KELV))
1677                         }
1678                         Method(_TMP,0) {        /* return current temp of this zone */
1679                                 Store (SMBR (0x07, 0x2E,, 0x25), Local0)
1680                                 If (LGreater (Local0, 0x20)) {
1681                                         Store (Local0, Local1)
1682                                 }
1683                                 Else {
1684                                         Add (Local0, 0x40, Local0)
1685                                         Add (Local0, TCRT, Local0)
1686                                         Return (Add (550, KELV))
1687                                 }
1688
1689                                 /* Store (SMBR (0x07, 0x2E, 0x26), Local0)
1690                                  * If (LGreater (Local0, 0x20)) {
1691                                  *      If (LGreater (Local0, Local1)) {
1692                                  *              Store (Local0, Local1)
1693                                  *      }
1694                                  * }
1695                                  * Else {
1696                                  *      Add (Local0, 0x40, Local0)
1697                                  *      Add (Local0, TCRT, Local0)
1698                                  *      Return (Add (Local0, KELV))
1699                                  * }
1700                                  */
1701
1702                                 Store (SMBR (0x07, 0x2E, 0x27), Local0)
1703                                 If (LGreater (Local0, 0x20)) {
1704                                         If (LGreater (Local0, Local1)) {
1705                                                 Store (Local0, Local1)
1706                                         }
1707
1708                                         Subtract (Local1, 0x40, Local1)
1709                                         Multiply (Local1, 10, Local1)
1710                                         Return (Add (Local1, KELV))
1711                                 }
1712                                 Else {
1713                                         Add (Local0, 0x40, Local0)
1714                                         Add (Local0, TCRT, Local0)
1715                                         Return (Add (550 , KELV))
1716                                 }
1717                         } /* end of _TMP */
1718                 } /* end of TZ00 */
1719         }
1720 }
1721 /* End of ASL file */