src/mainboard/amd/mahogany/dsdt.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2010 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 /* DefinitionBlock Statement */
  21 DefinitionBlock (
  22         "DSDT.AML",           /* Output filename */
  23         "DSDT",                 /* Signature */
  24         0x02,           /* DSDT Revision, needs to be 2 for 64bit */
  25         "AMD   ",               /* OEMID */
  26         "MAHOGANY",          /* TABLE ID */
  27         0x00010001      /* OEM Revision */
  28         )
  29 {       /* Start of ASL file */
  30         /* #include "../../../arch/x86/acpi/debug.asl" */               /* Include global debug methods if needed */
  31
  32         /* Data to be patched by the BIOS during POST */
  33         /* FIXME the patching is not done yet! */
  34         /* Memory related values */
  35         Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */
  36         Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
  37         Name(PBLN, 0x0) /* Length of BIOS area */
  38
  39         Name(PCBA, 0xE0000000)  /* Base address of PCIe config space */
  40         Name(HPBA, 0xFED00000)  /* Base address of HPET table */
  41
  42         Name(SSFG, 0x0D)                /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
  43
  44         /* USB overcurrent mapping pins.   */
  45         Name(UOM0, 0)
  46         Name(UOM1, 2)
  47         Name(UOM2, 0)
  48         Name(UOM3, 7)
  49         Name(UOM4, 2)
  50         Name(UOM5, 2)
  51         Name(UOM6, 6)
  52         Name(UOM7, 2)
  53         Name(UOM8, 6)
  54         Name(UOM9, 6)
  55
  56         /* Some global data */
  57         Name(OSTP, 3)           /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
  58         Name(OSV, Ones) /* Assume nothing */
  59         Name(PMOD, One) /* Assume APIC */
  60
  61         /* PIC IRQ mapping registers, C00h-C01h */
  62         OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002)
  63                 Field(PRQM, ByteAcc, NoLock, Preserve) {
  64                 PRQI, 0x00000008,
  65                 PRQD, 0x00000008,  /* Offset: 1h */
  66         }
  67         IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) {
  68                 PINA, 0x00000008,       /* Index 0  */
  69                 PINB, 0x00000008,       /* Index 1 */
  70                 PINC, 0x00000008,       /* Index 2 */
  71                 PIND, 0x00000008,       /* Index 3 */
  72                 AINT, 0x00000008,       /* Index 4 */
  73                 SINT, 0x00000008,       /*  Index 5 */
  74                 , 0x00000008,                /* Index 6 */
  75                 AAUD, 0x00000008,       /* Index 7 */
  76                 AMOD, 0x00000008,       /* Index 8 */
  77                 PINE, 0x00000008,       /* Index 9 */
  78                 PINF, 0x00000008,       /* Index A */
  79                 PING, 0x00000008,       /* Index B */
  80                 PINH, 0x00000008,       /* Index C */
  81         }
  82
  83         /* PCI Error control register */
  84         OperationRegion(PERC, SystemIO, 0x00000C14, 0x00000001)
  85                 Field(PERC, ByteAcc, NoLock, Preserve) {
  86                 SENS, 0x00000001,
  87                 PENS, 0x00000001,
  88                 SENE, 0x00000001,
  89                 PENE, 0x00000001,
  90         }
  91
  92         /* Client Management index/data registers */
  93         OperationRegion(CMT, SystemIO, 0x00000C50, 0x00000002)
  94                 Field(CMT, ByteAcc, NoLock, Preserve) {
  95                 CMTI,      8,
  96                 /* Client Management Data register */
  97                 G64E,   1,
  98                 G64O,      1,
  99                 G32O,      2,
 100                 ,       2,
 101                 GPSL,     2,
 102         }
 103
 104         /* GPM Port register */
 105         OperationRegion(GPT, SystemIO, 0x00000C52, 0x00000001)
 106                 Field(GPT, ByteAcc, NoLock, Preserve) {
 107                 GPB0,1,
 108                 GPB1,1,
 109                 GPB2,1,
 110                 GPB3,1,
 111                 GPB4,1,
 112                 GPB5,1,
 113                 GPB6,1,
 114                 GPB7,1,
 115         }
 116
 117         /* Flash ROM program enable register */
 118         OperationRegion(FRE, SystemIO, 0x00000C6F, 0x00000001)
 119                 Field(FRE, ByteAcc, NoLock, Preserve) {
 120                 ,     0x00000006,
 121                 FLRE, 0x00000001,
 122         }
 123
 124         /* PM2 index/data registers */
 125         OperationRegion(PM2R, SystemIO, 0x00000CD0, 0x00000002)
 126                 Field(PM2R, ByteAcc, NoLock, Preserve) {
 127                 PM2I, 0x00000008,
 128                 PM2D, 0x00000008,
 129         }
 130
 131         /* Power Management I/O registers */
 132         OperationRegion(PIOR, SystemIO, 0x00000CD6, 0x00000002)
 133                 Field(PIOR, ByteAcc, NoLock, Preserve) {
 134                 PIOI, 0x00000008,
 135                 PIOD, 0x00000008,
 136         }
 137         IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) {
 138                 Offset(0x00),   /* MiscControl */
 139                 , 1,
 140                 T1EE, 1,
 141                 T2EE, 1,
 142                 Offset(0x01),   /* MiscStatus */
 143                 , 1,
 144                 T1E, 1,
 145                 T2E, 1,
 146                 Offset(0x04),   /* SmiWakeUpEventEnable3 */
 147                 , 7,
 148                 SSEN, 1,
 149                 Offset(0x07),   /* SmiWakeUpEventStatus3 */
 150                 , 7,
 151                 CSSM, 1,
 152                 Offset(0x10),   /* AcpiEnable */
 153                 , 6,
 154                 PWDE, 1,
 155                 Offset(0x1C),   /* ProgramIoEnable */
 156                 , 3,
 157                 MKME, 1,
 158                 IO3E, 1,
 159                 IO2E, 1,
 160                 IO1E, 1,
 161                 IO0E, 1,
 162                 Offset(0x1D),   /* IOMonitorStatus */
 163                 , 3,
 164                 MKMS, 1,
 165                 IO3S, 1,
 166                 IO2S, 1,
 167                 IO1S, 1,
 168                 IO0S,1,
 169                 Offset(0x20),   /* AcpiPmEvtBlk */
 170                 APEB, 16,
 171                 Offset(0x36),   /* GEvtLevelConfig */
 172                 , 6,
 173                 ELC6, 1,
 174                 ELC7, 1,
 175                 Offset(0x37),   /* GPMLevelConfig0 */
 176                 , 3,
 177                 PLC0, 1,
 178                 PLC1, 1,
 179                 PLC2, 1,
 180                 PLC3, 1,
 181                 PLC8, 1,
 182                 Offset(0x38),   /* GPMLevelConfig1 */
 183                 , 1,
 184                  PLC4, 1,
 185                  PLC5, 1,
 186                 , 1,
 187                  PLC6, 1,
 188                  PLC7, 1,
 189                 Offset(0x3B),   /* PMEStatus1 */
 190                 GP0S, 1,
 191                 GM4S, 1,
 192                 GM5S, 1,
 193                 APS, 1,
 194                 GM6S, 1,
 195                 GM7S, 1,
 196                 GP2S, 1,
 197                 STSS, 1,
 198                 Offset(0x55),   /* SoftPciRst */
 199                 SPRE, 1,
 200                 , 1,
 201                 , 1,
 202                 PNAT, 1,
 203                 PWMK, 1,
 204                 PWNS, 1,
 205
 206                 /*      Offset(0x61), */        /*  Options_1 */
 207                 /*              ,7,  */
 208                 /*              R617,1, */
 209
 210                 Offset(0x65),   /* UsbPMControl */
 211                 , 4,
 212                 URRE, 1,
 213                 Offset(0x68),   /* MiscEnable68 */
 214                 , 3,
 215                 TMTE, 1,
 216                 , 1,
 217                 Offset(0x92),   /* GEVENTIN */
 218                 , 7,
 219                 E7IS, 1,
 220                 Offset(0x96),   /* GPM98IN */
 221                 G8IS, 1,
 222                 G9IS, 1,
 223                 Offset(0x9A),   /* EnhanceControl */
 224                 ,7,
 225                 HPDE, 1,
 226                 Offset(0xA8),   /* PIO7654Enable */
 227                 IO4E, 1,
 228                 IO5E, 1,
 229                 IO6E, 1,
 230                 IO7E, 1,
 231                 Offset(0xA9),   /* PIO7654Status */
 232                 IO4S, 1,
 233                 IO5S, 1,
 234                 IO6S, 1,
 235                 IO7S, 1,
 236         }
 237
 238         /* PM1 Event Block
 239         * First word is PM1_Status, Second word is PM1_Enable
 240         */
 241         OperationRegion(P1EB, SystemIO, APEB, 0x04)
 242                 Field(P1EB, ByteAcc, NoLock, Preserve) {
 243                 TMST, 1,
 244                 ,    3,
 245                 BMST,    1,
 246                 GBST,   1,
 247                 Offset(0x01),
 248                 PBST, 1,
 249                 , 1,
 250                 RTST, 1,
 251                 , 3,
 252                 PWST, 1,
 253                 SPWS, 1,
 254                 Offset(0x02),
 255                 TMEN, 1,
 256                 , 4,
 257                 GBEN, 1,
 258                 Offset(0x03),
 259                 PBEN, 1,
 260                 , 1,
 261                 RTEN, 1,
 262                 , 3,
 263                 PWDA, 1,
 264         }
 265
 266         Scope(\_SB) {
 267                 /* PCIe Configuration Space for 16 busses */
 268                 OperationRegion(PCFG, SystemMemory, PCBA, 0x01000000) /* Each bus consumes 1MB */
 269                         Field(PCFG, ByteAcc, NoLock, Preserve) {
 270                         /* Byte offsets are computed using the following technique:
 271                          * ((bus number + 1) * ((device number * 8) * 4096)) + register offset
 272                          * The 8 comes from 8 functions per device, and 4096 bytes per function config space
 273                          */
 274                         Offset(0x00088024),     /* Byte offset to SATA register 24h - Bus 0, Device 17, Function 0 */
 275                         STB5, 32,
 276                         Offset(0x00098042),     /* Byte offset to OHCI0 register 42h - Bus 0, Device 19, Function 0 */
 277                         PT0D, 1,
 278                         PT1D, 1,
 279                         PT2D, 1,
 280                         PT3D, 1,
 281                         PT4D, 1,
 282                         PT5D, 1,
 283                         PT6D, 1,
 284                         PT7D, 1,
 285                         PT8D, 1,
 286                         PT9D, 1,
 287                         Offset(0x000A0004),     /* Byte offset to SMBUS register 4h - Bus 0, Device 20, Function 0 */
 288                         SBIE, 1,
 289                         SBME, 1,
 290                         Offset(0x000A0008),     /* Byte offset to SMBUS register 8h - Bus 0, Device 20, Function 0 */
 291                         SBRI, 8,
 292                         Offset(0x000A0014),     /* Byte offset to SMBUS register 14h - Bus 0, Device 20, Function 0 */
 293                         SBB1, 32,
 294                         Offset(0x000A0078),     /* Byte offset to SMBUS register 78h - Bus 0, Device 20, Function 0 */
 295                         ,14,
 296                         P92E, 1,                /* Port92 decode enable */
 297                 }
 298
 299                 OperationRegion(SB5, SystemMemory, STB5, 0x1000)
 300                         Field(SB5, AnyAcc, NoLock, Preserve){
 301                         /* Port 0 */
 302                         Offset(0x120),          /* Port 0 Task file status */
 303                         P0ER, 1,
 304                         , 2,
 305                         P0DQ, 1,
 306                         , 3,
 307                         P0BY, 1,
 308                         Offset(0x128),          /* Port 0 Serial ATA status */
 309                         P0DD, 4,
 310                         , 4,
 311                         P0IS, 4,
 312                         Offset(0x12C),          /* Port 0 Serial ATA control */
 313                         P0DI, 4,
 314                         Offset(0x130),          /* Port 0 Serial ATA error */
 315                         , 16,
 316                         P0PR, 1,
 317
 318                         /* Port 1 */
 319                         offset(0x1A0),          /* Port 1 Task file status */
 320                         P1ER, 1,
 321                         , 2,
 322                         P1DQ, 1,
 323                         , 3,
 324                         P1BY, 1,
 325                         Offset(0x1A8),          /* Port 1 Serial ATA status */
 326                         P1DD, 4,
 327                         , 4,
 328                         P1IS, 4,
 329                         Offset(0x1AC),          /* Port 1 Serial ATA control */
 330                         P1DI, 4,
 331                         Offset(0x1B0),          /* Port 1 Serial ATA error */
 332                         , 16,
 333                         P1PR, 1,
 334
 335                         /* Port 2 */
 336                         Offset(0x220),          /* Port 2 Task file status */
 337                         P2ER, 1,
 338                         , 2,
 339                         P2DQ, 1,
 340                         , 3,
 341                         P2BY, 1,
 342                         Offset(0x228),          /* Port 2 Serial ATA status */
 343                         P2DD, 4,
 344                         , 4,
 345                         P2IS, 4,
 346                         Offset(0x22C),          /* Port 2 Serial ATA control */
 347                         P2DI, 4,
 348                         Offset(0x230),          /* Port 2 Serial ATA error */
 349                         , 16,
 350                         P2PR, 1,
 351
 352                         /* Port 3 */
 353                         Offset(0x2A0),          /* Port 3 Task file status */
 354                         P3ER, 1,
 355                         , 2,
 356                         P3DQ, 1,
 357                         , 3,
 358                         P3BY, 1,
 359                         Offset(0x2A8),          /* Port 3 Serial ATA status */
 360                         P3DD, 4,
 361                         , 4,
 362                         P3IS, 4,
 363                         Offset(0x2AC),          /* Port 3 Serial ATA control */
 364                         P3DI, 4,
 365                         Offset(0x2B0),          /* Port 3 Serial ATA error */
 366                         , 16,
 367                         P3PR, 1,
 368                 }
 369         }
 370
 371
 372         #include "acpi/routing.asl"
 373
 374         Scope(\_SB) {
 375
 376                 Method(CkOT, 0){
 377
 378                         if(LNotEqual(OSTP, Ones)) {Return(OSTP)}        /* OS version was already detected */
 379
 380                         if(CondRefOf(\_OSI,Local1))
 381                         {
 382                                 Store(1, OSTP)                /* Assume some form of XP */
 383                                 if (\_OSI("Windows 2006"))      /* Vista */
 384                                 {
 385                                         Store(2, OSTP)
 386                                 }
 387                         } else {
 388                                 If(WCMP(\_OS,"Linux")) {
 389                                         Store(3, OSTP)            /* Linux */
 390                                 } Else {
 391                                         Store(4, OSTP)            /* Gotta be WinCE */
 392                                 }
 393                         }
 394                         Return(OSTP)
 395                 }
 396
 397                 Method(_PIC, 0x01, NotSerialized)
 398                 {
 399                         If (Arg0)
 400                         {
 401                                 \_SB.CIRQ()
 402                         }
 403                         Store(Arg0, PMOD)
 404                 }
 405                 Method(CIRQ, 0x00, NotSerialized){
 406                         Store(0, PINA)
 407                         Store(0, PINB)
 408                         Store(0, PINC)
 409                         Store(0, PIND)
 410                         Store(0, PINE)
 411                         Store(0, PINF)
 412                         Store(0, PING)
 413                         Store(0, PINH)
 414                 }
 415
 416                 Name(IRQB, ResourceTemplate(){
 417                         IRQ(Level,ActiveLow,Shared){15}
 418                 })
 419
 420                 Name(IRQP, ResourceTemplate(){
 421                         IRQ(Level,ActiveLow,Exclusive){3, 4, 5, 7, 10, 11, 12, 15}
 422                 })
 423
 424                 Name(PITF, ResourceTemplate(){
 425                         IRQ(Level,ActiveLow,Exclusive){9}
 426                 })
 427
 428                 Device(INTA) {
 429                         Name(_HID, EISAID("PNP0C0F"))
 430                         Name(_UID, 1)
 431
 432                         Method(_STA, 0) {
 433                                 if (PINA) {
 434                                         Return(0x0B) /* sata is invisible */
 435                                 } else {
 436                                         Return(0x09) /* sata is disabled */
 437                                 }
 438                         } /* End Method(_SB.INTA._STA) */
 439
 440                         Method(_DIS ,0) {
 441                                 /* DBGO("\\_SB\\LNKA\\_DIS\n") */
 442                                 Store(0, PINA)
 443                         } /* End Method(_SB.INTA._DIS) */
 444
 445                         Method(_PRS ,0) {
 446                                 /* DBGO("\\_SB\\LNKA\\_PRS\n") */
 447                                 Return(IRQP)
 448                         } /* Method(_SB.INTA._PRS) */
 449
 450                         Method(_CRS ,0) {
 451                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 452                                 CreateWordField(IRQB, 0x1, IRQN)
 453                                 ShiftLeft(1, PINA, IRQN)
 454                                 Return(IRQB)
 455                         } /* Method(_SB.INTA._CRS) */
 456
 457                         Method(_SRS, 1) {
 458                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 459                                 CreateWordField(ARG0, 1, IRQM)
 460
 461                                 /* Use lowest available IRQ */
 462                                 FindSetRightBit(IRQM, Local0)
 463                                 if (Local0) {
 464                                         Decrement(Local0)
 465                                 }
 466                                 Store(Local0, PINA)
 467                         } /* End Method(_SB.INTA._SRS) */
 468                 } /* End Device(INTA) */
 469
 470                 Device(INTB) {
 471                         Name(_HID, EISAID("PNP0C0F"))
 472                         Name(_UID, 2)
 473
 474                         Method(_STA, 0) {
 475                                 if (PINB) {
 476                                         Return(0x0B) /* sata is invisible */
 477                                 } else {
 478                                         Return(0x09) /* sata is disabled */
 479                                 }
 480                         } /* End Method(_SB.INTB._STA) */
 481
 482                         Method(_DIS ,0) {
 483                                 /* DBGO("\\_SB\\LNKB\\_DIS\n") */
 484                                 Store(0, PINB)
 485                         } /* End Method(_SB.INTB._DIS) */
 486
 487                         Method(_PRS ,0) {
 488                                 /* DBGO("\\_SB\\LNKB\\_PRS\n") */
 489                                 Return(IRQP)
 490                         } /* Method(_SB.INTB._PRS) */
 491
 492                         Method(_CRS ,0) {
 493                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 494                                 CreateWordField(IRQB, 0x1, IRQN)
 495                                 ShiftLeft(1, PINB, IRQN)
 496                                 Return(IRQB)
 497                         } /* Method(_SB.INTB._CRS) */
 498
 499                         Method(_SRS, 1) {
 500                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 501                                 CreateWordField(ARG0, 1, IRQM)
 502
 503                                 /* Use lowest available IRQ */
 504                                 FindSetRightBit(IRQM, Local0)
 505                                 if (Local0) {
 506                                         Decrement(Local0)
 507                                 }
 508                                 Store(Local0, PINB)
 509                         } /* End Method(_SB.INTB._SRS) */
 510                 } /* End Device(INTB)  */
 511
 512                 Device(INTC) {
 513                         Name(_HID, EISAID("PNP0C0F"))
 514                         Name(_UID, 3)
 515
 516                         Method(_STA, 0) {
 517                                 if (PINC) {
 518                                         Return(0x0B) /* sata is invisible */
 519                                 } else {
 520                                         Return(0x09) /* sata is disabled */
 521                                 }
 522                         } /* End Method(_SB.INTC._STA) */
 523
 524                         Method(_DIS ,0) {
 525                                 /* DBGO("\\_SB\\LNKC\\_DIS\n") */
 526                                 Store(0, PINC)
 527                         } /* End Method(_SB.INTC._DIS) */
 528
 529                         Method(_PRS ,0) {
 530                                 /* DBGO("\\_SB\\LNKC\\_PRS\n") */
 531                                 Return(IRQP)
 532                         } /* Method(_SB.INTC._PRS) */
 533
 534                         Method(_CRS ,0) {
 535                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 536                                 CreateWordField(IRQB, 0x1, IRQN)
 537                                 ShiftLeft(1, PINC, IRQN)
 538                                 Return(IRQB)
 539                         } /* Method(_SB.INTC._CRS) */
 540
 541                         Method(_SRS, 1) {
 542                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 543                                 CreateWordField(ARG0, 1, IRQM)
 544
 545                                 /* Use lowest available IRQ */
 546                                 FindSetRightBit(IRQM, Local0)
 547                                 if (Local0) {
 548                                         Decrement(Local0)
 549                                 }
 550                                 Store(Local0, PINC)
 551                         } /* End Method(_SB.INTC._SRS) */
 552                 } /* End Device(INTC)  */
 553
 554                 Device(INTD) {
 555                         Name(_HID, EISAID("PNP0C0F"))
 556                         Name(_UID, 4)
 557
 558                         Method(_STA, 0) {
 559                                 if (PIND) {
 560                                         Return(0x0B) /* sata is invisible */
 561                                 } else {
 562                                         Return(0x09) /* sata is disabled */
 563                                 }
 564                         } /* End Method(_SB.INTD._STA) */
 565
 566                         Method(_DIS ,0) {
 567                                 /* DBGO("\\_SB\\LNKD\\_DIS\n") */
 568                                 Store(0, PIND)
 569                         } /* End Method(_SB.INTD._DIS) */
 570
 571                         Method(_PRS ,0) {
 572                                 /* DBGO("\\_SB\\LNKD\\_PRS\n") */
 573                                 Return(IRQP)
 574                         } /* Method(_SB.INTD._PRS) */
 575
 576                         Method(_CRS ,0) {
 577                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 578                                 CreateWordField(IRQB, 0x1, IRQN)
 579                                 ShiftLeft(1, PIND, IRQN)
 580                                 Return(IRQB)
 581                         } /* Method(_SB.INTD._CRS) */
 582
 583                         Method(_SRS, 1) {
 584                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 585                                 CreateWordField(ARG0, 1, IRQM)
 586
 587                                 /* Use lowest available IRQ */
 588                                 FindSetRightBit(IRQM, Local0)
 589                                 if (Local0) {
 590                                         Decrement(Local0)
 591                                 }
 592                                 Store(Local0, PIND)
 593                         } /* End Method(_SB.INTD._SRS) */
 594                 } /* End Device(INTD)  */
 595
 596                 Device(INTE) {
 597                         Name(_HID, EISAID("PNP0C0F"))
 598                         Name(_UID, 5)
 599
 600                         Method(_STA, 0) {
 601                                 if (PINE) {
 602                                         Return(0x0B) /* sata is invisible */
 603                                 } else {
 604                                         Return(0x09) /* sata is disabled */
 605                                 }
 606                         } /* End Method(_SB.INTE._STA) */
 607
 608                         Method(_DIS ,0) {
 609                                 /* DBGO("\\_SB\\LNKE\\_DIS\n") */
 610                                 Store(0, PINE)
 611                         } /* End Method(_SB.INTE._DIS) */
 612
 613                         Method(_PRS ,0) {
 614                                 /* DBGO("\\_SB\\LNKE\\_PRS\n") */
 615                                 Return(IRQP)
 616                         } /* Method(_SB.INTE._PRS) */
 617
 618                         Method(_CRS ,0) {
 619                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 620                                 CreateWordField(IRQB, 0x1, IRQN)
 621                                 ShiftLeft(1, PINE, IRQN)
 622                                 Return(IRQB)
 623                         } /* Method(_SB.INTE._CRS) */
 624
 625                         Method(_SRS, 1) {
 626                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 627                                 CreateWordField(ARG0, 1, IRQM)
 628
 629                                 /* Use lowest available IRQ */
 630                                 FindSetRightBit(IRQM, Local0)
 631                                 if (Local0) {
 632                                         Decrement(Local0)
 633                                 }
 634                                 Store(Local0, PINE)
 635                         } /* End Method(_SB.INTE._SRS) */
 636                 } /* End Device(INTE)  */
 637
 638                 Device(INTF) {
 639                         Name(_HID, EISAID("PNP0C0F"))
 640                         Name(_UID, 6)
 641
 642                         Method(_STA, 0) {
 643                                 if (PINF) {
 644                                         Return(0x0B) /* sata is invisible */
 645                                 } else {
 646                                         Return(0x09) /* sata is disabled */
 647                                 }
 648                         } /* End Method(_SB.INTF._STA) */
 649
 650                         Method(_DIS ,0) {
 651                                 /* DBGO("\\_SB\\LNKF\\_DIS\n") */
 652                                 Store(0, PINF)
 653                         } /* End Method(_SB.INTF._DIS) */
 654
 655                         Method(_PRS ,0) {
 656                                 /* DBGO("\\_SB\\LNKF\\_PRS\n") */
 657                                 Return(PITF)
 658                         } /* Method(_SB.INTF._PRS) */
 659
 660                         Method(_CRS ,0) {
 661                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 662                                 CreateWordField(IRQB, 0x1, IRQN)
 663                                 ShiftLeft(1, PINF, IRQN)
 664                                 Return(IRQB)
 665                         } /* Method(_SB.INTF._CRS) */
 666
 667                         Method(_SRS, 1) {
 668                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 669                                 CreateWordField(ARG0, 1, IRQM)
 670
 671                                 /* Use lowest available IRQ */
 672                                 FindSetRightBit(IRQM, Local0)
 673                                 if (Local0) {
 674                                         Decrement(Local0)
 675                                 }
 676                                 Store(Local0, PINF)
 677                         } /*  End Method(_SB.INTF._SRS) */
 678                 } /* End Device(INTF)  */
 679
 680                 Device(INTG) {
 681                         Name(_HID, EISAID("PNP0C0F"))
 682                         Name(_UID, 7)
 683
 684                         Method(_STA, 0) {
 685                                 if (PING) {
 686                                         Return(0x0B) /* sata is invisible */
 687                                 } else {
 688                                         Return(0x09) /* sata is disabled */
 689                                 }
 690                         } /* End Method(_SB.INTG._STA)  */
 691
 692                         Method(_DIS ,0) {
 693                                 /* DBGO("\\_SB\\LNKG\\_DIS\n") */
 694                                 Store(0, PING)
 695                         } /* End Method(_SB.INTG._DIS)  */
 696
 697                         Method(_PRS ,0) {
 698                                 /* DBGO("\\_SB\\LNKG\\_PRS\n") */
 699                                 Return(IRQP)
 700                         } /* Method(_SB.INTG._CRS)  */
 701
 702                         Method(_CRS ,0) {
 703                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 704                                 CreateWordField(IRQB, 0x1, IRQN)
 705                                 ShiftLeft(1, PING, IRQN)
 706                                 Return(IRQB)
 707                         } /* Method(_SB.INTG._CRS)  */
 708
 709                         Method(_SRS, 1) {
 710                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 711                                 CreateWordField(ARG0, 1, IRQM)
 712
 713                                 /* Use lowest available IRQ */
 714                                 FindSetRightBit(IRQM, Local0)
 715                                 if (Local0) {
 716                                         Decrement(Local0)
 717                                 }
 718                                 Store(Local0, PING)
 719                         } /* End Method(_SB.INTG._SRS)  */
 720                 } /* End Device(INTG)  */
 721
 722                 Device(INTH) {
 723                         Name(_HID, EISAID("PNP0C0F"))
 724                         Name(_UID, 8)
 725
 726                         Method(_STA, 0) {
 727                                 if (PINH) {
 728                                         Return(0x0B) /* sata is invisible */
 729                                 } else {
 730                                         Return(0x09) /* sata is disabled */
 731                                 }
 732                         } /* End Method(_SB.INTH._STA)  */
 733
 734                         Method(_DIS ,0) {
 735                                 /* DBGO("\\_SB\\LNKH\\_DIS\n") */
 736                                 Store(0, PINH)
 737                         } /* End Method(_SB.INTH._DIS)  */
 738
 739                         Method(_PRS ,0) {
 740                                 /* DBGO("\\_SB\\LNKH\\_PRS\n") */
 741                                 Return(IRQP)
 742                         } /* Method(_SB.INTH._CRS)  */
 743
 744                         Method(_CRS ,0) {
 745                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 746                                 CreateWordField(IRQB, 0x1, IRQN)
 747                                 ShiftLeft(1, PINH, IRQN)
 748                                 Return(IRQB)
 749                         } /* Method(_SB.INTH._CRS)  */
 750
 751                         Method(_SRS, 1) {
 752                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 753                                 CreateWordField(ARG0, 1, IRQM)
 754
 755                                 /* Use lowest available IRQ */
 756                                 FindSetRightBit(IRQM, Local0)
 757                                 if (Local0) {
 758                                         Decrement(Local0)
 759                                 }
 760                                 Store(Local0, PINH)
 761                         } /* End Method(_SB.INTH._SRS)  */
 762                 } /* End Device(INTH)   */
 763
 764         }   /* End Scope(_SB)  */
 765
 766
 767         /* Supported sleep states: */
 768         Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )        /* (S0) - working state */
 769
 770         If (LAnd(SSFG, 0x01)) {
 771                 Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )        /* (S1) - sleeping w/CPU context */
 772         }
 773         If (LAnd(SSFG, 0x02)) {
 774                 Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )        /* (S2) - "light" Suspend to RAM */
 775         }
 776         If (LAnd(SSFG, 0x04)) {
 777                 Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )        /* (S3) - Suspend to RAM */
 778         }
 779         If (LAnd(SSFG, 0x08)) {
 780                 Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )        /* (S4) - Suspend to Disk */
 781         }
 782
 783         Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )        /* (S5) - Soft Off */
 784
 785         Name(\_SB.CSPS ,0)                              /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
 786         Name(CSMS, 0)                   /* Current System State */
 787
 788         /* Wake status package */
 789         Name(WKST,Package(){Zero, Zero})
 790
 791         /*
 792         * \_PTS - Prepare to Sleep method
 793         *
 794         *       Entry:
 795         *               Arg0=The value of the sleeping state S1=1, S2=2, etc
 796         *
 797         * Exit:
 798         *               -none-
 799         *
 800         * The _PTS control method is executed at the beginning of the sleep process
 801         * for S1-S5. The sleeping value is passed to the _PTS control method.   This
 802         * control method may be executed a relatively long time before entering the
 803         * sleep state and the OS may abort      the operation without notification to
 804         * the ACPI driver.  This method cannot modify the configuration or power
 805         * state of any device in the system.
 806         */
 807         Method(\_PTS, 1) {
 808                 /* DBGO("\\_PTS\n") */
 809                 /* DBGO("From S0 to S") */
 810                 /* DBGO(Arg0) */
 811                 /* DBGO("\n") */
 812
 813                 /* Don't allow PCIRST# to reset USB */
 814                 if (LEqual(Arg0,3)){
 815                         Store(0,URRE)
 816                 }
 817
 818                 /* Clear sleep SMI status flag and enable sleep SMI trap. */
 819                 /*Store(One, CSSM)
 820                 Store(One, SSEN)*/
 821
 822                 /* On older chips, clear PciExpWakeDisEn */
 823                 /*if (LLessEqual(\_SB.SBRI, 0x13)) {
 824                 *       Store(0,\_SB.PWDE)
 825                 *}
 826                 */
 827
 828                 /* Clear wake status structure. */
 829                 Store(0, Index(WKST,0))
 830                 Store(0, Index(WKST,1))
 831                 \_SB.PCI0.SIOS (Arg0)
 832         } /* End Method(\_PTS) */
 833
 834         /*
 835         *  The following method results in a "not a valid reserved NameSeg"
 836         *  warning so I have commented it out for the duration.  It isn't
 837         *  used, so it could be removed.
 838         *
 839         *
 840         *       \_GTS OEM Going To Sleep method
 841         *
 842         *       Entry:
 843         *               Arg0=The value of the sleeping state S1=1, S2=2
 844         *
 845         *       Exit:
 846         *               -none-
 847         *
 848         *  Method(\_GTS, 1) {
 849         *  DBGO("\\_GTS\n")
 850         *  DBGO("From S0 to S")
 851         *  DBGO(Arg0)
 852         *  DBGO("\n")
 853         *  }
 854         */
 855
 856         /*
 857         *       \_BFS OEM Back From Sleep method
 858         *
 859         *       Entry:
 860         *               Arg0=The value of the sleeping state S1=1, S2=2
 861         *
 862         *       Exit:
 863         *               -none-
 864         */
 865         Method(\_BFS, 1) {
 866                 /* DBGO("\\_BFS\n") */
 867                 /* DBGO("From S") */
 868                 /* DBGO(Arg0) */
 869                 /* DBGO(" to S0\n") */
 870         }
 871
 872         /*
 873         *  \_WAK System Wake method
 874         *
 875         *       Entry:
 876         *               Arg0=The value of the sleeping state S1=1, S2=2
 877         *
 878         *       Exit:
 879         *               Return package of 2 DWords
 880         *               Dword 1 - Status
 881         *                       0x00000000      wake succeeded
 882         *                       0x00000001      Wake was signaled but failed due to lack of power
 883         *                       0x00000002      Wake was signaled but failed due to thermal condition
 884         *               Dword 2 - Power Supply state
 885         *                       if non-zero the effective S-state the power supply entered
 886         */
 887         Method(\_WAK, 1) {
 888                 /* DBGO("\\_WAK\n") */
 889                 /* DBGO("From S") */
 890                 /* DBGO(Arg0) */
 891                 /* DBGO(" to S0\n") */
 892
 893                 /* Re-enable HPET */
 894                 Store(1,HPDE)
 895
 896                 /* Restore PCIRST# so it resets USB */
 897                 if (LEqual(Arg0,3)){
 898                         Store(1,URRE)
 899                 }
 900
 901                 /* Arbitrarily clear PciExpWakeStatus */
 902                 Store(PWST, PWST)
 903
 904                 /* if(DeRefOf(Index(WKST,0))) {
 905                 *       Store(0, Index(WKST,1))
 906                 * } else {
 907                 *       Store(Arg0, Index(WKST,1))
 908                 * }
 909                 */
 910                 \_SB.PCI0.SIOW (Arg0)
 911                 Return(WKST)
 912         } /* End Method(\_WAK) */
 913
 914         Scope(\_GPE) {  /* Start Scope GPE */
 915                 /*  General event 0  */
 916                 /* Method(_L00) {
 917                 *       DBGO("\\_GPE\\_L00\n")
 918                 * }
 919                 */
 920
 921                 /*  General event 1  */
 922                 /* Method(_L01) {
 923                 *       DBGO("\\_GPE\\_L00\n")
 924                 * }
 925                 */
 926
 927                 /*  General event 2  */
 928                 /* Method(_L02) {
 929                 *       DBGO("\\_GPE\\_L00\n")
 930                 * }
 931                 */
 932
 933                 /*  General event 3  */
 934                 Method(_L03) {
 935                         /* DBGO("\\_GPE\\_L00\n") */
 936                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 937                 }
 938
 939                 /*  General event 4  */
 940                 /* Method(_L04) {
 941                 *       DBGO("\\_GPE\\_L00\n")
 942                 * }
 943                 */
 944
 945                 /*  General event 5  */
 946                 /* Method(_L05) {
 947                 *       DBGO("\\_GPE\\_L00\n")
 948                 * }
 949                 */
 950
 951                 /*  General event 6 - Used for GPM6, moved to USB.asl */
 952                 /* Method(_L06) {
 953                 *       DBGO("\\_GPE\\_L00\n")
 954                 * }
 955                 */
 956
 957                 /*  General event 7 - Used for GPM7, moved to USB.asl */
 958                 /* Method(_L07) {
 959                 *       DBGO("\\_GPE\\_L07\n")
 960                 * }
 961                 */
 962
 963                 /*  Legacy PM event  */
 964                 Method(_L08) {
 965                         /* DBGO("\\_GPE\\_L08\n") */
 966                 }
 967
 968                 /*  Temp warning (TWarn) event  */
 969                 Method(_L09) {
 970                         /* DBGO("\\_GPE\\_L09\n") */
 971                         Notify (\_TZ.TZ00, 0x80)
 972                 }
 973
 974                 /*  Reserved  */
 975                 /* Method(_L0A) {
 976                 *       DBGO("\\_GPE\\_L0A\n")
 977                 * }
 978                 */
 979
 980                 /*  USB controller PME#  */
 981                 Method(_L0B) {
 982                         /* DBGO("\\_GPE\\_L0B\n") */
 983                         Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
 984                         Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
 985                         Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
 986                         Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
 987                         Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
 988                         Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
 989                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 990                 }
 991
 992                 /*  AC97 controller PME#  */
 993                 /* Method(_L0C) {
 994                 *       DBGO("\\_GPE\\_L0C\n")
 995                 * }
 996                 */
 997
 998                 /*  OtherTherm PME#  */
 999                 /* Method(_L0D) {
1000                 *       DBGO("\\_GPE\\_L0D\n")
1001                 * }
1002                 */
1003
1004                 /*  GPM9 SCI event - Moved to USB.asl */
1005                 /* Method(_L0E) {
1006                 *       DBGO("\\_GPE\\_L0E\n")
1007                 * }
1008                 */
1009
1010                 /*  PCIe HotPlug event  */
1011                 /* Method(_L0F) {
1012                 *       DBGO("\\_GPE\\_L0F\n")
1013                 * }
1014                 */
1015
1016                 /*  ExtEvent0 SCI event  */
1017                 Method(_L10) {
1018                         /* DBGO("\\_GPE\\_L10\n") */
1019                 }
1020
1021
1022                 /*  ExtEvent1 SCI event  */
1023                 Method(_L11) {
1024                         /* DBGO("\\_GPE\\_L11\n") */
1025                 }
1026
1027                 /*  PCIe PME# event  */
1028                 /* Method(_L12) {
1029                 *       DBGO("\\_GPE\\_L12\n")
1030                 * }
1031                 */
1032
1033                 /*  GPM0 SCI event - Moved to USB.asl */
1034                 /* Method(_L13) {
1035                 *       DBGO("\\_GPE\\_L13\n")
1036                 * }
1037                 */
1038
1039                 /*  GPM1 SCI event - Moved to USB.asl */
1040                 /* Method(_L14) {
1041                 *       DBGO("\\_GPE\\_L14\n")
1042                 * }
1043                 */
1044
1045                 /*  GPM2 SCI event - Moved to USB.asl */
1046                 /* Method(_L15) {
1047                 *       DBGO("\\_GPE\\_L15\n")
1048                 * }
1049                 */
1050
1051                 /*  GPM3 SCI event - Moved to USB.asl */
1052                 /* Method(_L16) {
1053                 *       DBGO("\\_GPE\\_L16\n")
1054                 * }
1055                 */
1056
1057                 /*  GPM8 SCI event - Moved to USB.asl */
1058                 /* Method(_L17) {
1059                 *       DBGO("\\_GPE\\_L17\n")
1060                 * }
1061                 */
1062
1063                 /*  GPIO0 or GEvent8 event  */
1064                 Method(_L18) {
1065                         /* DBGO("\\_GPE\\_L18\n") */
1066                         Notify(\_SB.PCI0.PBR2, 0x02) /* NOTIFY_DEVICE_WAKE */
1067                         Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
1068                         Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
1069                         Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
1070                         Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
1071                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1072                 }
1073
1074                 /*  GPM4 SCI event - Moved to USB.asl */
1075                 /* Method(_L19) {
1076                 *       DBGO("\\_GPE\\_L19\n")
1077                 * }
1078                 */
1079
1080                 /*  GPM5 SCI event - Moved to USB.asl */
1081                 /* Method(_L1A) {
1082                 *       DBGO("\\_GPE\\_L1A\n")
1083                 * }
1084                 */
1085
1086                 /*  Azalia SCI event  */
1087                 Method(_L1B) {
1088                         /* DBGO("\\_GPE\\_L1B\n") */
1089                         Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
1090                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1091                 }
1092
1093                 /*  GPM6 SCI event - Reassigned to _L06 */
1094                 /* Method(_L1C) {
1095                 *       DBGO("\\_GPE\\_L1C\n")
1096                 * }
1097                 */
1098
1099                 /*  GPM7 SCI event - Reassigned to _L07 */
1100                 /* Method(_L1D) {
1101                 *       DBGO("\\_GPE\\_L1D\n")
1102                 * }
1103                 */
1104
1105                 /*  GPIO2 or GPIO66 SCI event  */
1106                 /* Method(_L1E) {
1107                 *       DBGO("\\_GPE\\_L1E\n")
1108                 * }
1109                 */
1110
1111                 /*  SATA SCI event - Moved to sata.asl */
1112                 /* Method(_L1F) {
1113                 *        DBGO("\\_GPE\\_L1F\n")
1114                 * }
1115                 */
1116
1117         }       /* End Scope GPE */
1118
1119         #include "acpi/usb.asl"
1120
1121         /* South Bridge */
1122         Scope(\_SB) { /* Start \_SB scope */
1123                 #include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
1124
1125                 /*  _SB.PCI0 */
1126                 /* Note: Only need HID on Primary Bus */
1127                 Device(PCI0) {
1128                         External (TOM1)
1129                         External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
1130                         Name(_HID, EISAID("PNP0A03"))
1131                         Name(_ADR, 0x00180000)  /* Dev# = BSP Dev#, Func# = 0 */
1132                         Method(_BBN, 0) { /* Bus number = 0 */
1133                                 Return(0)
1134                         }
1135                         Method(_STA, 0) {
1136                                 /* DBGO("\\_SB\\PCI0\\_STA\n") */
1137                                 Return(0x0B)     /* Status is visible */
1138                         }
1139
1140                         Method(_PRT,0) {
1141                                 If(PMOD){ Return(APR0) }   /* APIC mode */
1142                                 Return (PR0)                  /* PIC Mode */
1143                         } /* end _PRT */
1144
1145                         /* Describe the Northbridge devices */
1146                         Device(AMRT) {
1147                                 Name(_ADR, 0x00000000)
1148                         } /* end AMRT */
1149
1150                         /* The internal GFX bridge */
1151                         Device(AGPB) {
1152                                 Name(_ADR, 0x00010000)
1153                                 Name(_PRW, Package() {0x18, 4})
1154                                 Method(_PRT,0) {
1155                                         Return (APR1)
1156                                 }
1157                         }  /* end AGPB */
1158
1159                         /* The external GFX bridge */
1160                         Device(PBR2) {
1161                                 Name(_ADR, 0x00020000)
1162                                 Name(_PRW, Package() {0x18, 4})
1163                                 Method(_PRT,0) {
1164                                         If(PMOD){ Return(APS2) }   /* APIC mode */
1165                                         Return (PS2)                  /* PIC Mode */
1166                                 } /* end _PRT */
1167                         } /* end PBR2 */
1168
1169                         /* Dev3 is also an external GFX bridge, not used in Herring */
1170
1171                         Device(PBR4) {
1172                                 Name(_ADR, 0x00040000)
1173                                 Name(_PRW, Package() {0x18, 4})
1174                                 Method(_PRT,0) {
1175                                         If(PMOD){ Return(APS4) }   /* APIC mode */
1176                                         Return (PS4)                  /* PIC Mode */
1177                                 } /* end _PRT */
1178                         } /* end PBR4 */
1179
1180                         Device(PBR5) {
1181                                 Name(_ADR, 0x00050000)
1182                                 Name(_PRW, Package() {0x18, 4})
1183                                 Method(_PRT,0) {
1184                                         If(PMOD){ Return(APS5) }   /* APIC mode */
1185                                         Return (PS5)                  /* PIC Mode */
1186                                 } /* end _PRT */
1187                         } /* end PBR5 */
1188
1189                         Device(PBR6) {
1190                                 Name(_ADR, 0x00060000)
1191                                 Name(_PRW, Package() {0x18, 4})
1192                                 Method(_PRT,0) {
1193                                         If(PMOD){ Return(APS6) }   /* APIC mode */
1194                                         Return (PS6)                  /* PIC Mode */
1195                                 } /* end _PRT */
1196                         } /* end PBR6 */
1197
1198                         /* The onboard EtherNet chip */
1199                         Device(PBR7) {
1200                                 Name(_ADR, 0x00070000)
1201                                 Name(_PRW, Package() {0x18, 4})
1202                                 Method(_PRT,0) {
1203                                         If(PMOD){ Return(APS7) }   /* APIC mode */
1204                                         Return (PS7)                  /* PIC Mode */
1205                                 } /* end _PRT */
1206                         } /* end PBR7 */
1207
1208                         /* GPP */
1209                         Device(PBR9) {
1210                                 Name(_ADR, 0x00090000)
1211                                 Name(_PRW, Package() {0x18, 4})
1212                                 Method(_PRT,0) {
1213                                         If(PMOD){ Return(APS9) }   /* APIC mode */
1214                                         Return (PS9)                  /* PIC Mode */
1215                                 } /* end _PRT */
1216                         } /* end PBR9 */
1217
1218                         Device(PBRa) {
1219                                 Name(_ADR, 0x000A0000)
1220                                 Name(_PRW, Package() {0x18, 4})
1221                                 Method(_PRT,0) {
1222                                         If(PMOD){ Return(APSa) }   /* APIC mode */
1223                                         Return (PSa)                  /* PIC Mode */
1224                                 } /* end _PRT */
1225                         } /* end PBRa */
1226
1227
1228                         /* PCI slot 1, 2, 3 */
1229                         Device(PIBR) {
1230                                 Name(_ADR, 0x00140004)
1231                                 Name(_PRW, Package() {0x18, 4})
1232
1233                                 Method(_PRT, 0) {
1234                                         Return (PCIB)
1235                                 }
1236                         }
1237
1238                         /* Describe the Southbridge devices */
1239                         Device(STCR) {
1240                                 Name(_ADR, 0x00110000)
1241                                 #include "acpi/sata.asl"
1242                         } /* end STCR */
1243
1244                         Device(UOH1) {
1245                                 Name(_ADR, 0x00130000)
1246                                 Name(_PRW, Package() {0x0B, 3})
1247                         } /* end UOH1 */
1248
1249                         Device(UOH2) {
1250                                 Name(_ADR, 0x00130001)
1251                                 Name(_PRW, Package() {0x0B, 3})
1252                         } /* end UOH2 */
1253
1254                         Device(UOH3) {
1255                                 Name(_ADR, 0x00130002)
1256                                 Name(_PRW, Package() {0x0B, 3})
1257                         } /* end UOH3 */
1258
1259                         Device(UOH4) {
1260                                 Name(_ADR, 0x00130003)
1261                                 Name(_PRW, Package() {0x0B, 3})
1262                         } /* end UOH4 */
1263
1264                         Device(UOH5) {
1265                                 Name(_ADR, 0x00130004)
1266                                 Name(_PRW, Package() {0x0B, 3})
1267                         } /* end UOH5 */
1268
1269                         Device(UEH1) {
1270                                 Name(_ADR, 0x00130005)
1271                                 Name(_PRW, Package() {0x0B, 3})
1272                         } /* end UEH1 */
1273
1274                         Device(SBUS) {
1275                                 Name(_ADR, 0x00140000)
1276                         } /* end SBUS */
1277
1278                         /* Primary (and only) IDE channel */
1279                         Device(IDEC) {
1280                                 Name(_ADR, 0x00140001)
1281                                 #include "acpi/ide.asl"
1282                         } /* end IDEC */
1283
1284                         Device(AZHD) {
1285                                 Name(_ADR, 0x00140002)
1286                                 OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
1287                                         Field(AZPD, AnyAcc, NoLock, Preserve) {
1288                                         offset (0x42),
1289                                         NSDI, 1,
1290                                         NSDO, 1,
1291                                         NSEN, 1,
1292                                         offset (0x44),
1293                                         IPCR, 4,
1294                                         offset (0x54),
1295                                         PWST, 2,
1296                                         , 6,
1297                                         PMEB, 1,
1298                                         , 6,
1299                                         PMST, 1,
1300                                         offset (0x62),
1301                                         MMCR, 1,
1302                                         offset (0x64),
1303                                         MMLA, 32,
1304                                         offset (0x68),
1305                                         MMHA, 32,
1306                                         offset (0x6C),
1307                                         MMDT, 16,
1308                                 }
1309
1310                                 Method(_INI) {
1311                                         If(LEqual(OSTP,3)){   /* If we are running Linux */
1312                                                 Store(zero, NSEN)
1313                                                 Store(one, NSDO)
1314                                                 Store(one, NSDI)
1315                                         }
1316                                 }
1317                         } /* end AZHD */
1318
1319                         Device(LIBR) {
1320                                 Name(_ADR, 0x00140003)
1321                                 /* Method(_INI) {
1322                                 *       DBGO("\\_SB\\PCI0\\LpcIsaBr\\_INI\n")
1323                                 } */ /* End Method(_SB.SBRDG._INI) */
1324
1325                                 /* Real Time Clock Device */
1326                                 Device(RTC0) {
1327                                         Name(_HID, EISAID("PNP0B00"))   /* AT Real Time Clock (not PIIX4 compatible) */
1328                                         Name(_CRS, ResourceTemplate() {
1329                                                 IRQNoFlags(){8}
1330                                                 IO(Decode16,0x0070, 0x0070, 0, 2)
1331                                                 /* IO(Decode16,0x0070, 0x0070, 0, 4) */
1332                                         })
1333                                 } /* End Device(_SB.PCI0.LpcIsaBr.RTC0) */
1334
1335                                 Device(TMR) {   /* Timer */
1336                                         Name(_HID,EISAID("PNP0100"))    /* System Timer */
1337                                         Name(_CRS, ResourceTemplate() {
1338                                                 IRQNoFlags(){0}
1339                                                 IO(Decode16, 0x0040, 0x0040, 0, 4)
1340                                                 /* IO(Decode16, 0x0048, 0x0048, 0, 4) */
1341                                         })
1342                                 } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */
1343
1344                                 Device(SPKR) {  /* Speaker */
1345                                         Name(_HID,EISAID("PNP0800"))    /* AT style speaker */
1346                                         Name(_CRS, ResourceTemplate() {
1347                                                 IO(Decode16, 0x0061, 0x0061, 0, 1)
1348                                         })
1349                                 } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */
1350
1351                                 Device(PIC) {
1352                                         Name(_HID,EISAID("PNP0000"))    /* AT Interrupt Controller */
1353                                         Name(_CRS, ResourceTemplate() {
1354                                                 IRQNoFlags(){2}
1355                                                 IO(Decode16,0x0020, 0x0020, 0, 2)
1356                                                 IO(Decode16,0x00A0, 0x00A0, 0, 2)
1357                                                 /* IO(Decode16, 0x00D0, 0x00D0, 0x10, 0x02) */
1358                                                 /* IO(Decode16, 0x04D0, 0x04D0, 0x10, 0x02) */
1359                                         })
1360                                 } /* End Device(_SB.PCI0.LpcIsaBr.PIC) */
1361
1362                                 Device(MAD) { /* 8257 DMA */
1363                                         Name(_HID,EISAID("PNP0200"))    /* Hardware Device ID */
1364                                         Name(_CRS, ResourceTemplate() {
1365                                                 DMA(Compatibility,BusMaster,Transfer8){4}
1366                                                 IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
1367                                                 IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
1368                                                 IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
1369                                                 IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
1370                                                 IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
1371                                                 IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
1372                                         }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
1373                                 } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
1374
1375                                 Device(COPR) {
1376                                         Name(_HID,EISAID("PNP0C04"))    /* Math Coprocessor */
1377                                         Name(_CRS, ResourceTemplate() {
1378                                                 IO(Decode16, 0x00F0, 0x00F0, 0, 0x10)
1379                                                 IRQNoFlags(){13}
1380                                         })
1381                                 } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
1382
1383                                 Device(HPTM) {
1384                                         Name(_HID,EISAID("PNP0103"))
1385                                         Name(CRS,ResourceTemplate()     {
1386                                                 Memory32Fixed(ReadOnly,0xFED00000, 0x00000400, HPT)     /* 1kb reserved space */
1387                                         })
1388                                         Method(_STA, 0) {
1389                                                 Return(0x0F) /* sata is visible */
1390                                         }
1391                                         Method(_CRS, 0) {
1392                                                 CreateDwordField(CRS, ^HPT._BAS, HPBA)
1393                                                 Store(HPBA, HPBA)
1394                                                 Return(CRS)
1395                                         }
1396                                 } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
1397                         } /* end LIBR */
1398
1399                         Device(HPBR) {
1400                                 Name(_ADR, 0x00140004)
1401                         } /* end HostPciBr */
1402
1403                         Device(ACAD) {
1404                                 Name(_ADR, 0x00140005)
1405                         } /* end Ac97audio */
1406
1407                         Device(ACMD) {
1408                                 Name(_ADR, 0x00140006)
1409                         } /* end Ac97modem */
1410
1411                         /* ITE8718 Support */
1412                         OperationRegion (IOID, SystemIO, 0x2E, 0x02)    /* sometimes it is 0x4E */
1413                                 Field (IOID, ByteAcc, NoLock, Preserve)
1414                                 {
1415                                         SIOI,   8,    SIOD,   8         /* 0x2E and 0x2F */
1416                                 }
1417
1418                         IndexField (SIOI, SIOD, ByteAcc, NoLock, Preserve)
1419                         {
1420                                         Offset (0x07),
1421                                 LDN,    8,      /* Logical Device Number */
1422                                         Offset (0x20),
1423                                 CID1,   8,      /* Chip ID Byte 1, 0x87 */
1424                                 CID2,   8,      /* Chip ID Byte 2, 0x12 */
1425                                         Offset (0x30),
1426                                 ACTR,   8,      /* Function activate */
1427                                         Offset (0xF0),
1428                                 APC0,   8,      /* APC/PME Event Enable Register */
1429                                 APC1,   8,      /* APC/PME Status Register */
1430                                 APC2,   8,      /* APC/PME Control Register 1 */
1431                                 APC3,   8,      /* Environment Controller Special Configuration Register */
1432                                 APC4,   8       /* APC/PME Control Register 2 */
1433                         }
1434
1435                         /* Enter the 8718 MB PnP Mode */
1436                         Method (EPNP)
1437                         {
1438                                 Store(0x87, SIOI)
1439                                 Store(0x01, SIOI)
1440                                 Store(0x55, SIOI)
1441                                 Store(0x55, SIOI) /* 8718 magic number */
1442                         }
1443                         /* Exit the 8718 MB PnP Mode */
1444                         Method (XPNP)
1445                         {
1446                                 Store (0x02, SIOI)
1447                                 Store (0x02, SIOD)
1448                         }
1449                         /*
1450                          * Keyboard PME is routed to SB700 Gevent3. We can wake
1451                          * up the system by pressing the key.
1452                          */
1453                         Method (SIOS, 1)
1454                         {
1455                                 /* We only enable KBD PME for S5. */
1456                                 If (LLess (Arg0, 0x05))
1457                                 {
1458                                         EPNP()
1459                                         /* DBGO("8718F\n") */
1460
1461                                         Store (0x4, LDN)
1462                                         Store (One, ACTR)  /* Enable EC */
1463                                         /*
1464                                         Store (0x4, LDN)
1465                                         Store (0x04, APC4)
1466                                         */  /* falling edge. which mode? Not sure. */
1467
1468                                         Store (0x4, LDN)
1469                                         Store (0x08, APC1) /* clear PME status, Use 0x18 for mouse & KBD */
1470                                         Store (0x4, LDN)
1471                                         Store (0x08, APC0) /* enable PME, Use 0x18 for mouse & KBD */
1472
1473                                         XPNP()
1474                                 }
1475                         }
1476                         Method (SIOW, 1)
1477                         {
1478                                 EPNP()
1479                                 Store (0x4, LDN)
1480                                 Store (Zero, APC0) /* disable keyboard PME */
1481                                 Store (0x4, LDN)
1482                                 Store (0xFF, APC1) /* clear keyboard PME status */
1483                                 XPNP()
1484                         }
1485
1486                         Name(CRES, ResourceTemplate() {
1487                                 IO(Decode16, 0x0CF8, 0x0CF8, 1, 8)
1488
1489                                 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1490                                         0x0000,                 /* address granularity */
1491                                         0x0000,                 /* range minimum */
1492                                         0x0CF7,                 /* range maximum */
1493                                         0x0000,                 /* translation */
1494                                         0x0CF8                  /* length */
1495                                 )
1496
1497                                 WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1498                                         0x0000,                 /* address granularity */
1499                                         0x0D00,                 /* range minimum */
1500                                         0xFFFF,                 /* range maximum */
1501                                         0x0000,                 /* translation */
1502                                         0xF300                  /* length */
1503                                 )
1504
1505                                 Memory32Fixed(READWRITE, 0, 0xA0000, BSMM)
1506                                 Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM)   /* VGA memory space */
1507                                 Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1)   /* Assume C0000-E0000 empty */
1508                                 Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS)   /* BIOS ROM area */
1509
1510                                 /* DRAM Memory from 1MB to TopMem */
1511                                 Memory32Fixed(READWRITE, 0x00100000, 0, DMLO)   /* 1MB to TopMem */
1512
1513                                 /* BIOS space just below 4GB */
1514                                 DWORDMemory(
1515                                         ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1516                                         0x00,                   /* Granularity */
1517                                         0x00000000,             /* Min */
1518                                         0x00000000,             /* Max */
1519                                         0x00000000,             /* Translation */
1520                                         0x00000001,             /* Max-Min, RLEN */
1521                                         ,,
1522                                         PCBM
1523                                 )
1524
1525                                 /* DRAM memory from 4GB to TopMem2 */
1526                                 QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1527                                         0x00000000,             /* Granularity */
1528                                         0x00000000,             /* Min */
1529                                         0x00000000,             /* Max */
1530                                         0x00000000,             /* Translation */
1531                                         0x00000001,             /* Max-Min, RLEN */
1532                                         ,,
1533                                         DMHI
1534                                 )
1535
1536                                 /* BIOS space just below 16EB */
1537                                 QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
1538                                         0x00000000,             /* Granularity */
1539                                         0x00000000,             /* Min */
1540                                         0x00000000,             /* Max */
1541                                         0x00000000,             /* Translation */
1542                                         0x00000001,             /* Max-Min, RLEN */
1543                                         ,,
1544                                         PEBM
1545                                 )
1546
1547                         }) /* End Name(_SB.PCI0.CRES) */
1548
1549                         Method(_CRS, 0) {
1550                                 /* DBGO("\\_SB\\PCI0\\_CRS\n") */
1551
1552                                 CreateDWordField(CRES, ^EMM1._BAS, EM1B)
1553                                 CreateDWordField(CRES, ^EMM1._LEN, EM1L)
1554                                 CreateDWordField(CRES, ^DMLO._BAS, DMLB)
1555                                 CreateDWordField(CRES, ^DMLO._LEN, DMLL)
1556                                 CreateDWordField(CRES, ^PCBM._MIN, PBMB)
1557                                 CreateDWordField(CRES, ^PCBM._LEN, PBML)
1558
1559                                 CreateQWordField(CRES, ^DMHI._MIN, DMHB)
1560                                 CreateQWordField(CRES, ^DMHI._LEN, DMHL)
1561                                 CreateQWordField(CRES, ^PEBM._MIN, EBMB)
1562                                 CreateQWordField(CRES, ^PEBM._LEN, EBML)
1563
1564                                 If(LGreater(LOMH, 0xC0000)){
1565                                         Store(0xC0000, EM1B)    /* Hole above C0000 and below E0000 */
1566                                         Subtract(LOMH, 0xC0000, EM1L)   /* subtract start, assumes allocation from C0000 going up */
1567                                 }
1568
1569                                 /* Set size of memory from 1MB to TopMem */
1570                                 Subtract(TOM1, 0x100000, DMLL)
1571
1572                                 /*
1573                                 * If(LNotEqual(TOM2, 0x00000000)){
1574                                 *       Store(0x100000000,DMHB)                 DRAM from 4GB to TopMem2
1575                                 *       ShiftLeft(TOM2, 20, Local0)
1576                                 *       Subtract(Local0, 0x100000000, DMHL)
1577                                 * }
1578                                 */
1579
1580                                 /* If there is no memory above 4GB, put the BIOS just below 4GB */
1581                                 If(LEqual(TOM2, 0x00000000)){
1582                                         Store(PBAD,PBMB)                        /* Reserve the "BIOS" space */
1583                                         Store(PBLN,PBML)
1584                                 }
1585                                 Else {  /* Otherwise, put the BIOS just below 16EB */
1586                                         ShiftLeft(PBAD,16,EBMB)         /* Reserve the "BIOS" space */
1587                                         Store(PBLN,EBML)
1588                                 }
1589
1590                                 Return(CRES) /* note to change the Name buffer */
1591                         }  /* end of Method(_SB.PCI0._CRS) */
1592
1593                         /*
1594                         *
1595                         *               FIRST METHOD CALLED UPON BOOT
1596                         *
1597                         *  1. If debugging, print current OS and ACPI interpreter.
1598                         *  2. Get PCI Interrupt routing from ACPI VSM, this
1599                         *     value is based on user choice in BIOS setup.
1600                         */
1601                         Method(_INI, 0) {
1602                                 /* DBGO("\\_SB\\_INI\n") */
1603                                 /* DBGO("   DSDT.ASL code from ") */
1604                                 /* DBGO(__DATE__) */
1605                                 /* DBGO(" ") */
1606                                 /* DBGO(__TIME__) */
1607                                 /* DBGO("\n   Sleep states supported: ") */
1608                                 /* DBGO("\n") */
1609                                 /* DBGO("   \\_OS=") */
1610                                 /* DBGO(\_OS) */
1611                                 /* DBGO("\n   \\_REV=") */
1612                                 /* DBGO(\_REV) */
1613                                 /* DBGO("\n") */
1614
1615                                 /* Determine the OS we're running on */
1616                                 CkOT()
1617
1618                                 /* On older chips, clear PciExpWakeDisEn */
1619                                 /*if (LLessEqual(\SBRI, 0x13)) {
1620                                 *       Store(0,\PWDE)
1621                                 * }
1622                                 */
1623                         } /* End Method(_SB._INI) */
1624                 } /* End Device(PCI0)  */
1625
1626                 Device(PWRB) {  /* Start Power button device */
1627                         Name(_HID, EISAID("PNP0C0C"))
1628                         Name(_UID, 0xAA)
1629                         Name(_PRW, Package () {3, 0x04})        /* wake from S1-S4 */
1630                         Name(_STA, 0x0B) /* sata is invisible */
1631                 }
1632         } /* End \_SB scope */
1633
1634         Scope(\_SI) {
1635                 Method(_SST, 1) {
1636                         /* DBGO("\\_SI\\_SST\n") */
1637                         /* DBGO("   New Indicator state: ") */
1638                         /* DBGO(Arg0) */
1639                         /* DBGO("\n") */
1640                 }
1641         } /* End Scope SI */
1642
1643         /* SMBUS Support */
1644         Mutex (SBX0, 0x00)
1645         OperationRegion (SMB0, SystemIO, 0xB00, 0x0C)
1646                 Field (SMB0, ByteAcc, NoLock, Preserve) {
1647                         HSTS,   8, /* SMBUS status */
1648                         SSTS,   8,  /* SMBUS slave status */
1649                         HCNT,   8,  /* SMBUS control */
1650                         HCMD,   8,  /* SMBUS host cmd */
1651                         HADD,   8,  /* SMBUS address */
1652                         DAT0,   8,  /* SMBUS data0 */
1653                         DAT1,   8,  /* SMBUS data1 */
1654                         BLKD,   8,  /* SMBUS block data */
1655                         SCNT,   8,  /* SMBUS slave control */
1656                         SCMD,   8,  /* SMBUS shaow cmd */
1657                         SEVT,   8,  /* SMBUS slave event */
1658                         SDAT,   8  /* SMBUS slave data */
1659         }
1660
1661         Method (WCLR, 0, NotSerialized) { /* clear SMBUS status register */
1662                 Store (0x1E, HSTS)
1663                 Store (0xFA, Local0)
1664                 While (LAnd (LNotEqual (And (HSTS, 0x1E), Zero), LGreater (Local0, Zero))) {
1665                         Stall (0x64)
1666                         Decrement (Local0)
1667                 }
1668
1669                 Return (Local0)
1670         }
1671
1672         Method (SWTC, 1, NotSerialized) {
1673                 Store (Arg0, Local0)
1674                 Store (0x07, Local2)
1675                 Store (One, Local1)
1676                 While (LEqual (Local1, One)) {
1677                         Store (And (HSTS, 0x1E), Local3)
1678                         If (LNotEqual (Local3, Zero)) { /* read sucess */
1679                                 If (LEqual (Local3, 0x02)) {
1680                                         Store (Zero, Local2)
1681                                 }
1682
1683                                 Store (Zero, Local1)
1684                         }
1685                         Else {
1686                                 If (LLess (Local0, 0x0A)) { /* read failure */
1687                                         Store (0x10, Local2)
1688                                         Store (Zero, Local1)
1689                                 }
1690                                 Else {
1691                                         Sleep (0x0A) /* 10 ms, try again */
1692                                         Subtract (Local0, 0x0A, Local0)
1693                                 }
1694                         }
1695                 }
1696
1697                 Return (Local2)
1698         }
1699
1700         Method (SMBR, 3, NotSerialized) {
1701                 Store (0x07, Local0)
1702                 If (LEqual (Acquire (SBX0, 0xFFFF), Zero)) {
1703                         Store (WCLR (), Local0) /* clear SMBUS status register before read data */
1704                         If (LEqual (Local0, Zero)) {
1705                                 Release (SBX0)
1706                                 Return (0x0)
1707                         }
1708
1709                         Store (0x1F, HSTS)
1710                         Store (Or (ShiftLeft (Arg1, One), One), HADD)
1711                         Store (Arg2, HCMD)
1712                         If (LEqual (Arg0, 0x07)) {
1713                                 Store (0x48, HCNT) /* read byte */
1714                         }
1715
1716                         Store (SWTC (0x03E8), Local1) /* 1000 ms */
1717                         If (LEqual (Local1, Zero)) {
1718                                 If (LEqual (Arg0, 0x07)) {
1719                                         Store (DAT0, Local0)
1720                                 }
1721                         }
1722                         Else {
1723                                 Store (Local1, Local0)
1724                         }
1725
1726                         Release (SBX0)
1727                 }
1728
1729                 /* DBGO("the value of SMBusData0 register ") */
1730                 /* DBGO(Arg2) */
1731                 /* DBGO(" is ") */
1732                 /* DBGO(Local0) */
1733                 /* DBGO("\n") */
1734
1735                 Return (Local0)
1736         }
1737
1738         /* THERMAL */
1739         Scope(\_TZ) {
1740                 Name (KELV, 2732)
1741                 Name (THOT, 800)
1742                 Name (TCRT, 850)
1743
1744                 ThermalZone(TZ00) {
1745                         Method(_AC0,0) {        /* Active Cooling 0 (0=highest fan speed) */
1746                                 /* DBGO("\\_TZ\\TZ00\\_AC0\n") */
1747                                 Return(Add(0, 2730))
1748                         }
1749                         Method(_AL0,0) {        /* Returns package of cooling device to turn on */
1750                                 /* DBGO("\\_TZ\\TZ00\\_AL0\n") */
1751                                 Return(Package() {\_TZ.TZ00.FAN0})
1752                         }
1753                         Device (FAN0) {
1754                                 Name(_HID, EISAID("PNP0C0B"))
1755                                 Name(_PR0, Package() {PFN0})
1756                         }
1757
1758                         PowerResource(PFN0,0,0) {
1759                                 Method(_STA) {
1760                                         Store(0xF,Local0)
1761                                         Return(Local0)
1762                                 }
1763                                 Method(_ON) {
1764                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _ON\n") */
1765                                 }
1766                                 Method(_OFF) {
1767                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _OFF\n") */
1768                                 }
1769                         }
1770
1771                         Method(_HOT,0) {        /* return hot temp in tenths degree Kelvin */
1772                                 /* DBGO("\\_TZ\\TZ00\\_HOT\n") */
1773                                 Return (Add (THOT, KELV))
1774                         }
1775                         Method(_CRT,0) {        /* return critical temp in tenths degree Kelvin */
1776                                 /* DBGO("\\_TZ\\TZ00\\_CRT\n") */
1777                                 Return (Add (TCRT, KELV))
1778                         }
1779                         Method(_TMP,0) {        /* return current temp of this zone */
1780                                 Store (SMBR (0x07, 0x4C,, 0x00), Local0)
1781                                 If (LGreater (Local0, 0x10)) {
1782                                         Store (Local0, Local1)
1783                                 }
1784                                 Else {
1785                                         Add (Local0, THOT, Local0)
1786                                         Return (Add (400, KELV))
1787                                 }
1788
1789                                 Store (SMBR (0x07, 0x4C, 0x01), Local0)
1790                                 /* only the two MSBs in the external temperature low byte are used, resolution 0.25. We ignore it */
1791                                 /* Store (SMBR (0x07, 0x4C, 0x10), Local2) */
1792                                 If (LGreater (Local0, 0x10)) {
1793                                         If (LGreater (Local0, Local1)) {
1794                                                 Store (Local0, Local1)
1795                                         }
1796
1797                                         Multiply (Local1, 10, Local1)
1798                                         Return (Add (Local1, KELV))
1799                                 }
1800                                 Else {
1801                                         Add (Local0, THOT, Local0)
1802                                         Return (Add (400 , KELV))
1803                                 }
1804                         } /* end of _TMP */
1805                 } /* end of TZ00 */
1806         }
1807 }
1808 /* End of ASL file */