2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info);
25 #define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
27 /*#pragma optimize ("", off) // for source level debug
28 *---------------------------------------------------------------------------
30 * SPD address table - porting required
33 #define SMBUS_BASE_ADDR 0xB00
34 static const UINT8 spdAddressLookup [1] [2] [1] = // socket, channel, dimm
38 {0xA0}, // channel 0 dimms
39 {0xA2}, // channel 1 dimms
43 /*-----------------------------------------------------------------------------
45 * readSmbusByteData - read a single SPD byte from any offset
48 static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
53 address |= 1; // set read bit
55 __outbyte (iobase + 0, 0xFF); // clear error status
56 __outbyte (iobase + 1, 0x1F); // clear error status
57 __outbyte (iobase + 3, offset); // offset in eeprom
58 __outbyte (iobase + 4, address); // slave address and read bit
59 __outbyte (iobase + 2, 0x48); // read byte command
61 // time limit to avoid hanging for unexpected error status (should never happen)
62 limit = __rdtsc () + 2000000000 / 10;
65 status = __inbyte (iobase);
66 if (__rdtsc () > limit) break;
67 if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
68 if ((status & 1) == 1) continue; // HostBusy set, keep waiting
72 buffer [0] = __inbyte (iobase + 5);
73 if (status == 2) status = 0; // check for done with no errors
77 /*-----------------------------------------------------------------------------
79 * readSmbusByte - read a single SPD byte from the default offset
80 * this function is faster function readSmbusByteData
83 static int readSmbusByte (int iobase, int address, char *buffer)
88 __outbyte (iobase + 0, 0xFF); // clear error status
89 __outbyte (iobase + 2, 0x44); // read command
91 // time limit to avoid hanging for unexpected error status
92 limit = __rdtsc () + 2000000000 / 10;
95 status = __inbyte (iobase);
96 if (__rdtsc () > limit) break;
97 if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
98 if ((status & 1) == 1) continue; // HostBusy set, keep waiting
102 buffer [0] = __inbyte (iobase + 5);
103 if (status == 2) status = 0; // check for done with no errors
107 /*---------------------------------------------------------------------------
109 * readspd - Read one or more SPD bytes from a DIMM.
110 * Start with offset zero and read sequentially.
111 * Optimization relies on autoincrement to avoid
112 * sending offset for every byte.
113 * Reads 128 bytes in 7-8 ms at 400 KHz.
116 static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count)
120 /* read the first byte using offset zero */
121 error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0);
122 if (error) return error;
124 /* read the remaining bytes using auto-increment for speed */
125 for (index = 1; index < count; index++)
127 error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]);
128 if (error) return error;
134 static void writePmReg (int reg, int data)
136 __outbyte (0xCD6, reg);
137 __outbyte (0xCD7, data);
140 static void setupFch (int ioBase)
142 writePmReg (0x2D, ioBase >> 8);
143 writePmReg (0x2C, ioBase | 1);
144 writePmReg (0x29, 0x80);
145 writePmReg (0x28, 0x61);
146 __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
149 AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
151 int spdAddress, ioBase;
153 if (info->SocketId >= DIMENSION (spdAddressLookup )) return AGESA_ERROR;
154 if (info->MemChannelId >= DIMENSION (spdAddressLookup[0] )) return AGESA_ERROR;
155 if (info->DimmId >= DIMENSION (spdAddressLookup[0][0])) return AGESA_ERROR;
157 spdAddress = spdAddressLookup [info->SocketId] [info->MemChannelId] [info->DimmId];
158 if (spdAddress == 0) return AGESA_ERROR;
159 ioBase = SMBUS_BASE_ADDR;
161 return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);