2 * This file is part of the coreboot project.
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
24 #include <boot/tables.h>
25 #include <cpu/x86/msr.h>
26 #include <cpu/amd/mtrr.h>
27 #include <device/pci_def.h>
28 //#include <southbridge/amd/sb800/sb800.h>
32 uint64_t uma_memory_base, uma_memory_size;
34 u8 is_dev3_present(void);
35 void set_pcie_dereset(void);
36 void set_pcie_reset(void);
37 void enable_int_gfx(void);
40 void enable_int_gfx(void)
44 volatile u8 *gpio_reg;
46 pm_iowrite(0xEA, 0x01); /* diable the PCIB */
48 byte = pm_ioread(0xF6);
50 pm_iowrite(0xF6, byte);
51 /* make sure the fed80000 is accessible */
52 byte = pm_ioread(0x24);
54 pm_iowrite(0x24, byte);
56 gpio_reg = (volatile u8 *)0xFED80000 + 0xD00; /* IoMux Register */
58 *(gpio_reg + 0x6) = 0x1; /* Int_vga_en */
59 *(gpio_reg + 170) = 0x1; /* gpio_gate */
61 gpio_reg = (volatile u8 *)0xFED80000 + 0x100; /* GPIO Registers */
63 *(gpio_reg + 0x6) = 0x8;
64 *(gpio_reg + 170) = 0x0;
68 * Bimini uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to
69 * pull it up before training the slot.
71 void set_pcie_dereset(void)
73 /* GPIO 50h reset PCIe slot */
75 u8 *addr = (u8 *)(0xFED80000 + 0x100 + 0x50);
82 void set_pcie_reset(void)
84 /* GPIO 50h reset PCIe slot */
86 u8 *addr = (u8 *)(0xFED80000 + 0x100 + 0x50);
87 u8 byte = ~((1 << 5) | (1 << 6));
92 u8 is_dev3_present(void)
97 #if 0 /* not tested yet. */
98 /********************************************************
99 * bimini uses SB800 GPIO9 to detect IDE_DMA66.
100 * IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to
101 * get the cable type, 40 pin or 80 pin?
102 ********************************************************/
103 static void get_ide_dma66(void)
106 /*u32 sm_dev, ide_dev; */
107 device_t sm_dev, ide_dev;
109 sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
111 byte = pci_read_config8(sm_dev, 0xA9);
112 byte |= (1 << 5); /* Set Gpio9 as input */
113 pci_write_config8(sm_dev, 0xA9, byte);
115 ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
116 byte = pci_read_config8(ide_dev, 0x56);
118 if ((1 << 5) & pci_read_config8(sm_dev, 0xAA))
119 byte |= 2 << 0; /* mode 2 */
121 byte |= 5 << 0; /* mode 5 */
122 pci_write_config8(ide_dev, 0x56, byte);
124 #endif /* get_ide_dma66() */
126 /*************************************************
127 * enable the dedicated function in bimini board.
128 * This function called early than rs780_enable.
129 *************************************************/
130 static void bimini_enable(device_t dev)
132 /* Leave it for furture use. */
133 /* struct mainboard_config *mainboard =
134 (struct mainboard_config *)dev->chip_info; */
136 printk(BIOS_INFO, "Mainboard BIMINI Enable. dev=0x%p\n", dev);
138 #if (CONFIG_GFXUMA == 1)
141 /* TOP_MEM: the top of DRAM below 4G */
142 msr = rdmsr(TOP_MEM);
144 (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
145 __func__, msr.lo, msr.hi);
147 /* TOP_MEM2: the top of DRAM above 4G */
148 msr2 = rdmsr(TOP_MEM2);
150 (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
151 __func__, msr2.lo, msr2.hi);
153 /* refer to UMA Size Consideration in 780 BDG. */
155 case 0x10000000: /* 256M system memory */
156 uma_memory_size = 0x4000000; /* 64M recommended UMA */
159 case 0x20000000: /* 512M system memory */
160 uma_memory_size = 0x8000000; /* 128M recommended UMA */
163 default: /* 1GB and above system memory */
164 uma_memory_size = 0x10000000; /* 256M recommended UMA */
168 uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
169 printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
170 __func__, uma_memory_size, uma_memory_base);
174 uma_memory_size = 0x8000000; /* 128M recommended UMA */
175 uma_memory_base = 0x38000000; /* 1GB system memory supposed */
180 /* get_ide_dma66(); */
183 int add_mainboard_resources(struct lb_memory *mem)
185 /* UMA is removed from system memory in the northbridge code, but
186 * in some circumstances we want the memory mentioned as reserved.
188 #if (CONFIG_GFXUMA == 1)
189 printk(BIOS_INFO, "uma_memory_start=0x%llx, uma_memory_size=0x%llx \n",
190 uma_memory_base, uma_memory_size);
191 lb_add_memory_range(mem, LB_MEM_RESERVED, uma_memory_base,
197 struct chip_operations mainboard_ops = {
198 CHIP_NAME("AMD Bimini Mainboard")
199 .enable_dev = bimini_enable,