2 * This file is part of the coreboot project.
4 * Copyright (C) 2003 Eric Biederman
5 * Copyright (C) 2006-2010 coresystems GmbH
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 #include <pc80/mc146818rtc.h>
24 #if CONFIG_USE_OPTION_TABLE
25 #include "option_table.h"
28 /* Should support 8250, 16450, 16550, 16550A type UARTs */
30 static inline int uart8250_can_tx_byte(unsigned base_port)
32 return inb(base_port + UART_LSR) & UART_MSR_DSR;
35 static inline void uart8250_wait_to_tx_byte(unsigned base_port)
37 while(!uart8250_can_tx_byte(base_port))
41 static inline void uart8250_wait_until_sent(unsigned base_port)
43 while(!(inb(base_port + UART_LSR) & UART_LSR_TEMT))
47 void uart8250_tx_byte(unsigned base_port, unsigned char data)
49 uart8250_wait_to_tx_byte(base_port);
50 outb(data, base_port + UART_TBR);
51 /* Make certain the data clears the fifos */
52 uart8250_wait_until_sent(base_port);
55 int uart8250_can_rx_byte(unsigned base_port)
57 return inb(base_port + UART_LSR) & UART_LSR_DR;
60 unsigned char uart8250_rx_byte(unsigned base_port)
62 while(!uart8250_can_rx_byte(base_port))
64 return inb(base_port + UART_RBR);
67 void uart8250_init(unsigned base_port, unsigned divisor)
69 /* Disable interrupts */
70 outb(0x0, base_port + UART_IER);
72 outb(UART_FCR_FIFO_EN, base_port + UART_FCR);
74 /* assert DTR and RTS so the other end is happy */
75 outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR);
78 outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR);
80 /* Set Baud Rate Divisor. 12 ==> 115200 Baud */
81 outb(divisor & 0xFF, base_port + UART_DLL);
82 outb((divisor >> 8) & 0xFF, base_port + UART_DLM);
84 /* Set to 3 for 8N1 */
85 outb(CONFIG_TTYS0_LCS, base_port + UART_LCR);
90 /* TODO the divisor calculation is hard coded to standard UARTs. Some
91 * UARTs won't work with these values. This should be a property of the
92 * UART used, worst case a Kconfig variable. For now live with hard
93 * codes as the only devices that might be different are the iWave
94 * iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped)
96 unsigned int div = (115200 / CONFIG_TTYS0_BAUD);
98 #if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
99 static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 };
100 unsigned b_index = 0;
101 #if defined(__PRE_RAM__)
102 b_index = read_option(CMOS_VSTART_baud_rate, CMOS_VLEN_baud_rate, 0);
104 div = divisor[ttys0_index];
106 if (get_option(&b_index, "baud_rate") == 0) {
107 div = divisor[b_index];
112 uart8250_init(CONFIG_TTYS0_BASE, div);