5 #include <device/resource.h>
6 #include <device/path.h>
9 typedef struct device * device_t;
11 struct device_operations {
12 void (*read_resources)(device_t dev);
13 void (*set_resources)(device_t dev);
14 void (*enable_resources)(device_t dev);
15 void (*init)(device_t dev);
16 unsigned int (*scan_bus)(device_t bus, unsigned int max);
17 void (*enable)(device_t dev);
22 device_t dev; /* This bridge device */
23 device_t children; /* devices behind this bridge */
24 unsigned bridge_ctrl; /* Bridge control register */
25 unsigned char link; /* The index of this link */
26 unsigned char secondary; /* secondary bus number */
27 unsigned char subordinate; /* max subordinate bus number */
28 unsigned char cap; /* PCi capability offset */
31 #define MAX_RESOURCES 6
34 * There is one device structure for each slot-number/function-number
40 struct bus * bus; /* bus this device is on */
41 device_t sibling; /* next device on this bus */
42 device_t next; /* chain of all devices */
44 struct device_path path;
45 unsigned short vendor;
46 unsigned short device;
47 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
48 unsigned int hdr_type; /* PCI header type */
49 unsigned int enable : 1; /* set if we should enable the device */
53 * In theory, the irq level can be read from configuration
54 * space and all would be fine. However, old PCI chips don't
55 * support these registers and return 0 instead. For example,
56 * the Vision864-P rev 0 chip can uses INTA, but returns 0 in
57 * the interrupt line and pin registers. pci_init()
58 * initializes this field with the value at PCI_INTERRUPT_LINE
59 * and it is the job of pcibios_fixup() to change it if
60 * necessary. The field must not be 0 unless the device
61 * cannot generate interrupts at all.
63 unsigned int irq; /* irq generated by this device */
65 /* Base registers for this device, can be adjusted by
66 * pcibios_fixup() as necessary.
68 struct resource resource[MAX_RESOURCES];
69 unsigned int resources;
71 struct bus link[MAX_LINKS];
74 unsigned long rom_address;
75 struct device_operations *ops;
79 extern struct device dev_root; /* root bus */
80 extern struct device *all_devices; /* list of all devices */
83 /* Generic device interface functions */
84 extern device_t alloc_dev(struct bus *parent, struct device_path *path);
85 extern void dev_enumerate(void);
86 extern void dev_configure(void);
87 extern void dev_enable(void);
88 extern void dev_initialize(void);
90 /* Generic device helper functions */
91 extern void compute_allocate_resource(struct bus *bus, struct resource *bridge,
92 unsigned long type_mask, unsigned long type);
93 extern void assign_resources(struct bus *bus);
94 extern void enable_resources(struct device *dev);
95 extern void enumerate_static_device(void);
96 extern const char *dev_path(device_t dev);
98 /* Helper functions */
99 device_t alloc_find_dev(struct bus *parent, struct device_path *path);
100 device_t dev_find_device (unsigned int vendor, unsigned int device, device_t from);
101 device_t dev_find_class (unsigned int class, device_t from);
102 device_t dev_find_slot (unsigned int bus, unsigned int devfn);
104 /* Rounding for boundaries.
105 * Due to some chip bugs, go ahead and roung IO to 16
107 #define DEVICE_IO_ALIGN 16
108 #define DEVICE_MEM_ALIGN 4096
110 struct device_operations default_dev_ops_root;
111 extern void root_dev_read_resources(device_t dev);
112 extern void root_dev_set_resources(device_t dev);
113 extern unsigned int walk_static_devices(device_t bus, unsigned int max);
114 extern void enable_childrens_resources(device_t dev);
115 extern unsigned int root_dev_scan_pci_bus(device_t root, unsigned int max);
117 #endif /* DEVICE_H */