5 #include <device/resource.h>
6 #include <device/path.h>
10 typedef struct device * device_t;
11 struct pci_operations;
12 struct pci_bus_operations;
13 struct smbus_bus_operations;
16 struct chip_operations {
17 void (*enable_dev)(struct device *dev);
19 #if CONFIG_GENERATE_SMBIOS_TABLES
20 int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current);
24 #define CHIP_NAME(X) .name = X,
28 struct device_operations {
29 void (*read_resources)(device_t dev);
30 void (*set_resources)(device_t dev);
31 void (*enable_resources)(device_t dev);
32 void (*init)(device_t dev);
33 unsigned int (*scan_bus)(device_t bus, unsigned int max);
34 void (*enable)(device_t dev);
35 void (*set_link)(device_t dev, unsigned int link);
36 void (*reset_bus)(struct bus *bus);
37 #if CONFIG_GENERATE_SMBIOS_TABLES
38 int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current);
40 const struct pci_operations *ops_pci;
41 const struct smbus_bus_operations *ops_smbus_bus;
42 const struct pci_bus_operations *ops_pci_bus;
47 device_t dev; /* This bridge device */
48 device_t children; /* devices behind this bridge */
49 struct bus *next; /* The next bridge on this device */
50 unsigned bridge_ctrl; /* Bridge control register */
51 unsigned char link_num; /* The index of this link */
52 uint16_t secondary; /* secondary bus number */
53 uint16_t subordinate; /* max subordinate bus number */
54 unsigned char cap; /* PCi capability offset */
55 unsigned reset_needed : 1;
56 unsigned disable_relaxed_ordering : 1;
60 * There is one device structure for each slot-number/function-number
65 struct bus * bus; /* bus this device is on, for bridge
66 * devices, it is the up stream bus */
67 device_t sibling; /* next device on this bus */
68 device_t next; /* chain of all devices */
70 struct device_path path;
75 unsigned int class; /* 3 bytes: (base, sub, prog-if) */
76 unsigned int hdr_type; /* PCI header type */
77 unsigned int enabled : 1; /* set if we should enable the device */
78 unsigned int initialized : 1; /* set if we have initialized the device */
79 unsigned int on_mainboard : 1;
83 /* Base registers for this device. I/O, MEM and Expansion ROM */
84 struct resource *resource_list;
86 /* links are (downstream) buses attached to the device, usually a leaf
87 * device with no children has 0 buses attached and a bridge has 1 bus
89 struct bus *link_list;
91 struct device_operations *ops;
92 const struct chip_operations *chip_ops;
97 * This is the root of the device tree. The device tree is defined in the
98 * static.c file and is generated by the config tool at compile time.
100 extern struct device dev_root;
101 extern struct device *all_devices; /* list of all devices */
103 extern struct resource *free_resources;
104 extern struct bus *free_links;
106 /* Generic device interface functions */
107 device_t alloc_dev(struct bus *parent, struct device_path *path);
108 void dev_enumerate(void);
109 void dev_configure(void);
110 void dev_enable(void);
111 void dev_initialize(void);
112 void dev_optimize(void);
114 /* Generic device helper functions */
115 int reset_bus(struct bus *bus);
116 unsigned int scan_bus(struct device *bus, unsigned int max);
117 void assign_resources(struct bus *bus);
118 void enumerate_static_device(void);
119 void enumerate_static_devices(void);
120 const char *dev_path(device_t dev);
121 const char *bus_path(struct bus *bus);
122 void dev_set_enabled(device_t dev, int enable);
123 void disable_children(struct bus *bus);
125 /* Option ROM helper functions */
126 void run_bios(struct device *dev, unsigned long addr);
128 /* Helper functions */
129 device_t find_dev_path(struct bus *parent, struct device_path *path);
130 device_t alloc_find_dev(struct bus *parent, struct device_path *path);
131 device_t dev_find_device (u16 vendor, u16 device, device_t from);
132 device_t dev_find_class (unsigned int class, device_t from);
133 device_t dev_find_slot (unsigned int bus, unsigned int devfn);
134 device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr);
135 device_t dev_find_lapic(unsigned apic_id);
136 int dev_count_cpu(void);
138 /* Debug functions */
139 void print_resource_tree(struct device * root, int debug_level,
141 void show_devs_tree(struct device *dev, int debug_level, int depth, int linknum);
142 void show_devs_subtree(struct device *root, int debug_level, const char *msg);
143 void show_all_devs(int debug_level, const char *msg);
144 void show_all_devs_tree(int debug_level, const char *msg);
145 void show_one_resource(int debug_level, struct device *dev,
146 struct resource *resource, const char *comment);
147 void show_all_devs_resources(int debug_level, const char* msg);
149 /* Rounding for boundaries.
150 * Due to some chip bugs, go ahead and round IO to 16
152 #define DEVICE_IO_ALIGN 16
153 #define DEVICE_MEM_ALIGN 4096
155 extern struct device_operations default_dev_ops_root;
156 void pci_domain_read_resources(struct device *dev);
157 unsigned int pci_domain_scan_bus(struct device *dev, unsigned int max);
158 unsigned int scan_static_bus(device_t bus, unsigned int max);
160 void ram_resource(device_t dev, unsigned long index,
161 unsigned long basek, unsigned long sizek);
162 void tolm_test(void *gp, struct device *dev, struct resource *new);
163 u32 find_pci_tolm(struct bus *bus);
165 #endif /* DEVICE_H */