4 #include <device/path.h>
5 #include <device/device.h>
7 /* chips are arbitrary chips (superio, southbridge, etc.)
8 * They have private structures that define chip resources and default
9 * settings. They have four externally visible functions for control.
10 * They have a generic component which applies to all chips for
14 /* some of the types of resources chips can control */
15 #if CONFIG_CHIP_CONFIGURE == 1
16 #define CONFIGURE(pass) chip_configure(&static_root, pass)
18 #define CONFIGURE(pass)
22 CONF_PASS_PRE_CONSOLE,
24 CONF_PASS_PRE_DEVICE_ENUMERATE,
25 CONF_PASS_PRE_DEVICE_CONFIGURE,
26 CONF_PASS_PRE_DEVICE_ENABLE,
27 CONF_PASS_PRE_DEVICE_INITIALIZE,
33 /* linkages from devices of a type (e.g. superio devices)
34 * to the actual physical PCI device. This type is used in an array of
35 * structs built by NLBConfig.py. We owe this idea to Plan 9.
41 /* there is one of these for each TYPE of chip */
43 /* This is the print name for debugging */
45 void (*enable)(struct chip *, enum chip_pass);
46 void (*enumerate)(struct chip *chip);
47 void (*enable_dev)(struct device *dev);
50 struct chip_resource {
56 struct chip_device_path {
57 struct device_path path;
60 struct chip_resource resource[MAX_RESOURCES];
66 #ifndef MAX_CHIP_PATHS
67 #define MAX_CHIP_PATHS 16
71 struct chip_control *control; /* for this device */
72 struct chip_device_path path[MAX_CHIP_PATHS]; /* can be 0, in which case the default is taken */
73 char *configuration; /* can be 0. */
74 struct chip *next, *children;
75 /* there is one of these for each INSTANCE of a chip */
76 void *chip_info; /* the dreaded "void *" */
77 /* bus and device links into the device tree */
82 extern struct chip static_root;
83 extern void chip_configure(struct chip *, enum chip_pass);
84 extern void chip_enumerate(struct chip *chip);
85 #endif /* DEVICE_CHIP_H */