6035273afc140181bb5c9311994bf38daa1b9abe
[coreboot.git] / src / include / cpu / x86 / lapic_def.h
1 #ifndef CPU_X86_LAPIC_DEF_H
2 #define CPU_X86_LAPIC_DEF_H
3
4 #define LAPIC_BASE_MSR 0x1B
5 #define LAPIC_BASE_MSR_BOOTSTRAP_PROCESSOR (1 << 8)
6 #define LAPIC_BASE_MSR_ENABLE (1 << 11)
7 #define LAPIC_BASE_MSR_ADDR_MASK 0xFFFFF000
8
9 #define LAPIC_DEFAULT_BASE 0xfee00000
10
11 #define LAPIC_ID                0x020
12 #define LAPIC_LVR       0x030
13 #define LAPIC_TASKPRI   0x80
14 #define         LAPIC_TPRI_MASK         0xFF
15 #define LAPIC_ARBID     0x090
16 #define LAPIC_RRR       0x0C0
17 #define LAPIC_SVR       0x0f0
18 #define LAPIC_SPIV      0x0f0
19 #define         LAPIC_SPIV_ENABLE  0x100
20 #define LAPIC_ESR       0x280
21 #define         LAPIC_ESR_SEND_CS       0x00001
22 #define         LAPIC_ESR_RECV_CS       0x00002
23 #define         LAPIC_ESR_SEND_ACC      0x00004
24 #define         LAPIC_ESR_RECV_ACC      0x00008
25 #define         LAPIC_ESR_SENDILL       0x00020
26 #define         LAPIC_ESR_RECVILL       0x00040
27 #define         LAPIC_ESR_ILLREGA       0x00080
28 #define LAPIC_ICR       0x300
29 #define         LAPIC_DEST_SELF         0x40000
30 #define         LAPIC_DEST_ALLINC       0x80000
31 #define         LAPIC_DEST_ALLBUT       0xC0000
32 #define         LAPIC_ICR_RR_MASK       0x30000
33 #define         LAPIC_ICR_RR_INVALID    0x00000
34 #define         LAPIC_ICR_RR_INPROG     0x10000
35 #define         LAPIC_ICR_RR_VALID      0x20000
36 #define         LAPIC_INT_LEVELTRIG     0x08000
37 #define         LAPIC_INT_ASSERT                0x04000
38 #define         LAPIC_ICR_BUSY          0x01000
39 #define         LAPIC_DEST_LOGICAL      0x00800
40 #define         LAPIC_DM_FIXED          0x00000
41 #define         LAPIC_DM_LOWEST         0x00100
42 #define         LAPIC_DM_SMI            0x00200
43 #define         LAPIC_DM_REMRD          0x00300
44 #define         LAPIC_DM_NMI            0x00400
45 #define         LAPIC_DM_INIT           0x00500
46 #define         LAPIC_DM_STARTUP                0x00600
47 #define         LAPIC_DM_EXTINT         0x00700
48 #define         LAPIC_VECTOR_MASK       0x000FF
49 #define LAPIC_ICR2      0x310
50 #define         GET_LAPIC_DEST_FIELD(x) (((x)>>24)&0xFF)
51 #define         SET_LAPIC_DEST_FIELD(x) ((x)<<24)
52 #define LAPIC_LVTT      0x320
53 #define LAPIC_LVTPC     0x340
54 #define LAPIC_LVT0      0x350
55 #define         LAPIC_LVT_TIMER_BASE_MASK       (0x3<<18)
56 #define         GET_LAPIC_TIMER_BASE(x)         (((x)>>18)&0x3)
57 #define         SET_LAPIC_TIMER_BASE(x)         (((x)<<18))
58 #define         LAPIC_TIMER_BASE_CLKIN          0x0
59 #define         LAPIC_TIMER_BASE_TMBASE         0x1
60 #define         LAPIC_TIMER_BASE_DIV            0x2
61 #define         LAPIC_LVT_TIMER_PERIODIC                (1<<17)
62 #define         LAPIC_LVT_MASKED                        (1<<16)
63 #define         LAPIC_LVT_LEVEL_TRIGGER         (1<<15)
64 #define         LAPIC_LVT_REMOTE_IRR            (1<<14)
65 #define         LAPIC_INPUT_POLARITY            (1<<13)
66 #define         LAPIC_SEND_PENDING              (1<<12)
67 #define         LAPIC_LVT_RESERVED_1            (1<<11)
68 #define         LAPIC_DELIVERY_MODE_MASK                (7<<8)
69 #define         LAPIC_DELIVERY_MODE_FIXED       (0<<8)
70 #define         LAPIC_DELIVERY_MODE_NMI         (4<<8)
71 #define         LAPIC_DELIVERY_MODE_EXTINT      (7<<8)
72 #define         GET_LAPIC_DELIVERY_MODE(x)      (((x)>>8)&0x7)
73 #define         SET_LAPIC_DELIVERY_MODE(x,y)    (((x)&~0x700)|((y)<<8))
74 #define                 LAPIC_MODE_FIXED                0x0
75 #define                 LAPIC_MODE_NMI          0x4
76 #define                 LAPIC_MODE_EXINT                0x7
77 #define LAPIC_LVT1      0x360
78 #define LAPIC_LVTERR    0x370
79 #define LAPIC_TMICT     0x380
80 #define LAPIC_TMCCT     0x390
81 #define LAPIC_TDCR      0x3E0
82 #define         LAPIC_TDR_DIV_TMBASE    (1<<2)
83 #define         LAPIC_TDR_DIV_1         0xB
84 #define         LAPIC_TDR_DIV_2         0x0
85 #define         LAPIC_TDR_DIV_4         0x1
86 #define         LAPIC_TDR_DIV_8         0x2
87 #define         LAPIC_TDR_DIV_16                0x3
88 #define         LAPIC_TDR_DIV_32                0x8
89 #define         LAPIC_TDR_DIV_64                0x9
90 #define         LAPIC_TDR_DIV_128       0xA
91
92 #endif /* CPU_X86_LAPIC_DEF_H */