src/include/cpu/x86/lapic.h

   1 #ifndef CPU_X86_LAPIC_H
   2 #define CPU_X86_LAPIC_H
   3
   4 #include <cpu/x86/lapic_def.h>
   5 #include <cpu/x86/msr.h>
   6 #include <arch/hlt.h>
   7
   8 /* See if I need to initialize the local apic */
   9 #if CONFIG_SMP || CONFIG_IOAPIC
  10 #  define NEED_LAPIC 1
  11 #endif
  12
  13 static inline unsigned long lapic_read(unsigned long reg)
  14 {
  15         return *((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg));
  16 }
  17
  18 static inline void lapic_write(unsigned long reg, unsigned long v)
  19 {
  20         *((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg)) = v;
  21 }
  22
  23 static inline void lapic_wait_icr_idle(void)
  24 {
  25         do { } while ( lapic_read( LAPIC_ICR ) & LAPIC_ICR_BUSY );
  26 }
  27
  28
  29
  30 static inline void enable_lapic(void)
  31 {
  32
  33         msr_t msr;
  34         msr = rdmsr(LAPIC_BASE_MSR);
  35         msr.hi &= 0xffffff00;
  36         msr.lo &= 0x000007ff;
  37         msr.lo |= LAPIC_DEFAULT_BASE | (1 << 11);
  38         wrmsr(LAPIC_BASE_MSR, msr);
  39 }
  40
  41 static inline void disable_lapic(void)
  42 {
  43         msr_t msr;
  44         msr = rdmsr(LAPIC_BASE_MSR);
  45         msr.lo &= ~(1 << 11);
  46         wrmsr(LAPIC_BASE_MSR, msr);
  47 }
  48
  49 static inline unsigned long lapicid(void)
  50 {
  51         return lapic_read(LAPIC_ID) >> 24;
  52 }
  53
  54 static inline void stop_this_cpu(void)
  55 {
  56         unsigned apicid;
  57         apicid = lapicid();
  58
  59         /* Send an APIC INIT to myself */
  60         lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid));
  61         lapic_write(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_INT_ASSERT | LAPIC_DM_INIT);
  62         /* Wait for the ipi send to finish */
  63         lapic_wait_icr_idle();
  64
  65         /* Deassert the APIC INIT */
  66         lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid));
  67         lapic_write(LAPIC_ICR,  LAPIC_INT_LEVELTRIG | LAPIC_DM_INIT);
  68         /* Wait for the ipi send to finish */
  69         lapic_wait_icr_idle();
  70
  71         /* If I haven't halted spin forever */
  72         for(;;) {
  73                 hlt();
  74         }
  75 }
  76
  77 #if ! defined (__ROMCC__)
  78
  79 #define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
  80
  81 struct __xchg_dummy { unsigned long a[100]; };
  82 #define __xg(x) ((struct __xchg_dummy *)(x))
  83
  84 /*
  85  * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
  86  * Note 2: xchg has side effect, so that attribute volatile is necessary,
  87  *        but generally the primitive is invalid, *ptr is output argument. --ANK
  88  */
  89 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
  90 {
  91         switch (size) {
  92                 case 1:
  93                         __asm__ __volatile__("xchgb %b0,%1"
  94                                 :"=q" (x)
  95                                 :"m" (*__xg(ptr)), "0" (x)
  96                                 :"memory");
  97                         break;
  98                 case 2:
  99                         __asm__ __volatile__("xchgw %w0,%1"
 100                                 :"=r" (x)
 101                                 :"m" (*__xg(ptr)), "0" (x)
 102                                 :"memory");
 103                         break;
 104                 case 4:
 105                         __asm__ __volatile__("xchgl %0,%1"
 106                                 :"=r" (x)
 107                                 :"m" (*__xg(ptr)), "0" (x)
 108                                 :"memory");
 109                         break;
 110         }
 111         return x;
 112 }
 113
 114
 115 extern inline void lapic_write_atomic(unsigned long reg, unsigned long v)
 116 {
 117         xchg((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg), v);
 118 }
 119
 120
 121 #ifdef CONFIG_X86_GOOD_APIC
 122 # define FORCE_READ_AROUND_WRITE 0
 123 # define lapic_read_around(x) lapic_read(x)
 124 # define lapic_write_around(x,y) lapic_write((x),(y))
 125 #else
 126 # define FORCE_READ_AROUND_WRITE 1
 127 # define lapic_read_around(x) lapic_read(x)
 128 # define lapic_write_around(x,y) lapic_write_atomic((x),(y))
 129 #endif
 130
 131 static inline int lapic_remote_read(int apicid, int reg, unsigned long *pvalue)
 132 {
 133         int timeout;
 134         unsigned long status;
 135         int result;
 136         lapic_wait_icr_idle();
 137         lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid));
 138         lapic_write_around(LAPIC_ICR, LAPIC_DM_REMRD | (reg >> 4));
 139         timeout = 0;
 140         do {
 141 #if 0
 142                 udelay(100);
 143 #endif
 144                 status = lapic_read(LAPIC_ICR) & LAPIC_ICR_RR_MASK;
 145         } while (status == LAPIC_ICR_RR_INPROG && timeout++ < 1000);
 146
 147         result = -1;
 148         if (status == LAPIC_ICR_RR_VALID) {
 149                 *pvalue = lapic_read(LAPIC_RRR);
 150                 result = 0;
 151         }
 152         return result;
 153 }
 154
 155
 156 void setup_lapic(void);
 157
 158
 159 #if CONFIG_SMP == 1
 160 struct device;
 161 int start_cpu(struct device *cpu);
 162
 163 #endif /* CONFIG_SMP */
 164
 165
 166 #endif /* !__ROMCC__ */
 167
 168 #endif /* CPU_X86_LAPIC_H */