src/include/cpu/x86/lapic.h

   1 #ifndef CPU_X86_LAPIC_H
   2 #define CPU_X86_LAPIC_H
   3
   4 #include <cpu/x86/lapic_def.h>
   5 #include <cpu/x86/msr.h>
   6 #include <arch/hlt.h>
   7
   8 /* See if I need to initialize the local apic */
   9 #if CONFIG_SMP || CONFIG_IOAPIC
  10 #  define NEED_LAPIC 1
  11 #endif
  12
  13 static inline __attribute__((always_inline)) unsigned long lapic_read(unsigned long reg)
  14 {
  15         return *((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg));
  16 }
  17
  18 static inline __attribute__((always_inline)) void lapic_write(unsigned long reg, unsigned long v)
  19 {
  20         *((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg)) = v;
  21 }
  22
  23 static inline __attribute__((always_inline)) void lapic_wait_icr_idle(void)
  24 {
  25         do { } while ( lapic_read( LAPIC_ICR ) & LAPIC_ICR_BUSY );
  26 }
  27
  28
  29
  30 static inline void enable_lapic(void)
  31 {
  32
  33         msr_t msr;
  34         msr = rdmsr(LAPIC_BASE_MSR);
  35         msr.hi &= 0xffffff00;
  36         msr.lo &= 0x000007ff;
  37         msr.lo |= LAPIC_DEFAULT_BASE | (1 << 11);
  38         wrmsr(LAPIC_BASE_MSR, msr);
  39 }
  40
  41 static inline void disable_lapic(void)
  42 {
  43         msr_t msr;
  44         msr = rdmsr(LAPIC_BASE_MSR);
  45         msr.lo &= ~(1 << 11);
  46         wrmsr(LAPIC_BASE_MSR, msr);
  47 }
  48
  49 static inline __attribute__((always_inline)) unsigned long lapicid(void)
  50 {
  51         return lapic_read(LAPIC_ID) >> 24;
  52 }
  53
  54 static inline __attribute__((always_inline)) void stop_this_cpu(void)
  55 {
  56
  57         /* Called by an AP when it is ready to halt and wait for a new task */
  58         for(;;) {
  59                 hlt();
  60         }
  61 }
  62
  63 #if ! defined (__ROMCC__)
  64
  65 #define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
  66
  67 struct __xchg_dummy { unsigned long a[100]; };
  68 #define __xg(x) ((struct __xchg_dummy *)(x))
  69
  70 /*
  71  * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
  72  * Note 2: xchg has side effect, so that attribute volatile is necessary,
  73  *        but generally the primitive is invalid, *ptr is output argument. --ANK
  74  */
  75 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
  76 {
  77         switch (size) {
  78                 case 1:
  79                         __asm__ __volatile__("xchgb %b0,%1"
  80                                 :"=q" (x)
  81                                 :"m" (*__xg(ptr)), "0" (x)
  82                                 :"memory");
  83                         break;
  84                 case 2:
  85                         __asm__ __volatile__("xchgw %w0,%1"
  86                                 :"=r" (x)
  87                                 :"m" (*__xg(ptr)), "0" (x)
  88                                 :"memory");
  89                         break;
  90                 case 4:
  91                         __asm__ __volatile__("xchgl %0,%1"
  92                                 :"=r" (x)
  93                                 :"m" (*__xg(ptr)), "0" (x)
  94                                 :"memory");
  95                         break;
  96         }
  97         return x;
  98 }
  99
 100
 101 extern inline void lapic_write_atomic(unsigned long reg, unsigned long v)
 102 {
 103         xchg((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg), v);
 104 }
 105
 106
 107 #ifdef CONFIG_X86_GOOD_APIC
 108 # define FORCE_READ_AROUND_WRITE 0
 109 # define lapic_read_around(x) lapic_read(x)
 110 # define lapic_write_around(x,y) lapic_write((x),(y))
 111 #else
 112 # define FORCE_READ_AROUND_WRITE 1
 113 # define lapic_read_around(x) lapic_read(x)
 114 # define lapic_write_around(x,y) lapic_write_atomic((x),(y))
 115 #endif
 116
 117 static inline int lapic_remote_read(int apicid, int reg, unsigned long *pvalue)
 118 {
 119         int timeout;
 120         unsigned long status;
 121         int result;
 122         lapic_wait_icr_idle();
 123         lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid));
 124         lapic_write_around(LAPIC_ICR, LAPIC_DM_REMRD | (reg >> 4));
 125         timeout = 0;
 126         do {
 127 #if 0
 128                 udelay(100);
 129 #endif
 130                 status = lapic_read(LAPIC_ICR) & LAPIC_ICR_RR_MASK;
 131         } while (status == LAPIC_ICR_RR_INPROG && timeout++ < 1000);
 132
 133         result = -1;
 134         if (status == LAPIC_ICR_RR_VALID) {
 135                 *pvalue = lapic_read(LAPIC_RRR);
 136                 result = 0;
 137         }
 138         return result;
 139 }
 140
 141
 142 void setup_lapic(void);
 143
 144
 145 #if CONFIG_SMP == 1
 146 struct device;
 147 int start_cpu(struct device *cpu);
 148
 149 #endif /* CONFIG_SMP */
 150
 151
 152 #endif /* !__ROMCC__ */
 153
 154 #endif /* CPU_X86_LAPIC_H */