2 * This file is part of the coreboot project.
4 * Copyright (C) 2004 Eric W. Biederman
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 /* the memory clobber prevents the GCC from reordering the read/write order
31 Need this because ROMCC fails here with:
33 cache.h:29.71: cache.h:60.24: earlymtrr.c:117.23: romstage.c:144.33:
34 0x1559920 asm Internal compiler error: lhs 1 regcm == 0
37 static inline unsigned long read_cr0(void)
40 asm volatile ("movl %%cr0, %0" : "=r" (cr0) :: "memory");
44 static inline void write_cr0(unsigned long cr0)
46 asm volatile ("movl %0, %%cr0" : : "r" (cr0) : "memory");
51 static inline unsigned long read_cr0(void)
54 asm volatile ("movl %%cr0, %0" : "=r" (cr0));
58 static inline void write_cr0(unsigned long cr0)
60 asm volatile ("movl %0, %%cr0" : : "r" (cr0));
66 static inline void invd(void)
68 asm volatile("invd" ::: "memory");
71 static inline void wbinvd(void)
73 asm volatile ("wbinvd" ::: "memory");
76 static inline void enable_cache(void)
84 static inline void disable_cache(void)
86 /* Disable and write back the cache */
95 #if !defined(__PRE_RAM__)
96 void x86_enable_cache(void);
99 #endif /* CPU_X86_CACHE */