src/devices/hypertransport.c

   1 /*
   2  * This file is part of the LinuxBIOS project.
   3  *
   4  * Copyright (C) 2003-2004 Linux Networx
   5  * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
   6  * Copyright (C) 2004 David Hendricks <sc@flagen.com>
   7  * Copyright (C) 2004 Li-Ta Lo <ollie@lanl.gov>
   8  * Copyright (C) 2005-2006 Tyan
   9  * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
  10  * Copyright (C) 2005-2006 Stefan Reinauer <stepan@openbios.org>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License as published by
  14  * the Free Software Foundation; version 2 of the License.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  24  */
  25
  26 /*
  27         2005.11 yhlu add let the real sb to use small uintid
  28 */
  29
  30 #include <bitops.h>
  31 #include <console/console.h>
  32 #include <device/device.h>
  33 #include <device/path.h>
  34 #include <device/pci.h>
  35 #include <device/pci_ids.h>
  36 #include <device/hypertransport.h>
  37 #include <part/hard_reset.h>
  38 #include <part/fallback_boot.h>
  39
  40 #define OPT_HT_LINK 0
  41
  42 #if OPT_HT_LINK == 1
  43 #include <cpu/amd/model_fxx_rev.h>
  44 #endif
  45
  46 static device_t ht_scan_get_devs(device_t *old_devices)
  47 {
  48         device_t first, last;
  49         first = *old_devices;
  50         last = first;
  51         /* Extract the chain of devices to (first through last)
  52          * for the next hypertransport device.
  53          */
  54         while(last && last->sibling &&
  55                 (last->sibling->path.type == DEVICE_PATH_PCI) &&
  56                 (last->sibling->path.u.pci.devfn > last->path.u.pci.devfn))
  57         {
  58                 last = last->sibling;
  59         }
  60         if (first) {
  61                 device_t child;
  62                 /* Unlink the chain from the list of old devices */
  63                 *old_devices = last->sibling;
  64                 last->sibling = 0;
  65
  66                 /* Now add the device to the list of devices on the bus.
  67                  */
  68                 /* Find the last child of our parent */
  69                 for(child = first->bus->children; child && child->sibling; ) {
  70                         child = child->sibling;
  71                 }
  72                 /* Place the chain on the list of children of their parent. */
  73                 if (child) {
  74                         child->sibling = first;
  75                 } else {
  76                         first->bus->children = first;
  77                 }
  78         }
  79         return first;
  80 }
  81
  82 #if OPT_HT_LINK == 1
  83 static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
  84 {
  85         /* Handle bugs in valid hypertransport frequency reporting */
  86         unsigned freq_cap;
  87
  88         freq_cap = pci_read_config16(dev, pos);
  89         freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
  90
  91         /* AMD 8131 Errata 48 */
  92         if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
  93                 (dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
  94                 freq_cap &= ~(1 << HT_FREQ_800Mhz);
  95         }
  96         /* AMD 8151 Errata 23 */
  97         if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
  98                 (dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
  99                 freq_cap &= ~(1 << HT_FREQ_800Mhz);
 100         }
 101         /* AMD K8 Unsupported 1Ghz? */
 102         if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
 103 #if K8_HT_FREQ_1G_SUPPORT == 1
 104         #if K8_REV_F_SUPPORT == 0
 105                 if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
 106                         freq_cap &= ~(1 << HT_FREQ_1000Mhz);
 107                 }
 108         #endif
 109 #else
 110                 freq_cap &= ~(1 << HT_FREQ_1000Mhz);
 111 #endif
 112
 113         }
 114         return freq_cap;
 115 }
 116 #endif
 117
 118 struct ht_link {
 119         struct device *dev;
 120         unsigned pos;
 121         unsigned char ctrl_off, config_off, freq_off, freq_cap_off;
 122 };
 123
 124 static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
 125 {
 126         static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
 127         static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
 128         struct ht_link cur[1];
 129         unsigned present_width_cap,    upstream_width_cap;
 130         unsigned present_freq_cap,     upstream_freq_cap;
 131         unsigned ln_present_width_in,  ln_upstream_width_in;
 132         unsigned ln_present_width_out, ln_upstream_width_out;
 133         unsigned freq, old_freq;
 134         unsigned present_width, upstream_width, old_width;
 135         int reset_needed;
 136         int linkb_to_host;
 137
 138         /* Set the hypertransport link width and frequency */
 139         reset_needed = 0;
 140         /* See which side of the device our previous write to
 141          * set the unitid came from.
 142          */
 143         cur->dev = dev;
 144         cur->pos = pos;
 145         linkb_to_host = (pci_read_config16(cur->dev, cur->pos + PCI_CAP_FLAGS) >> 10) & 1;
 146         if (!linkb_to_host) {
 147                 cur->ctrl_off     = PCI_HT_CAP_SLAVE_CTRL0;
 148                 cur->config_off   = PCI_HT_CAP_SLAVE_WIDTH0;
 149                 cur->freq_off     = PCI_HT_CAP_SLAVE_FREQ0;
 150                 cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
 151         }
 152         else {
 153                 cur->ctrl_off     = PCI_HT_CAP_SLAVE_CTRL1;
 154                 cur->config_off   = PCI_HT_CAP_SLAVE_WIDTH1;
 155                 cur->freq_off     = PCI_HT_CAP_SLAVE_FREQ1;
 156                 cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
 157         }
 158 #if OPT_HT_LINK == 1
 159         /* Read the capabilities */
 160         present_freq_cap   = ht_read_freq_cap(cur->dev, cur->pos + cur->freq_cap_off);
 161         upstream_freq_cap  = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
 162         present_width_cap  = pci_read_config8(cur->dev, cur->pos + cur->config_off);
 163         upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
 164
 165         /* Calculate the highest useable frequency */
 166         freq = log2(present_freq_cap & upstream_freq_cap);
 167
 168         /* Calculate the highest width */
 169         ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
 170         ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
 171         if (ln_upstream_width_in > ln_present_width_out) {
 172                 ln_upstream_width_in = ln_present_width_out;
 173         }
 174         upstream_width = pow2_to_link_width[ln_upstream_width_in];
 175         present_width  = pow2_to_link_width[ln_upstream_width_in] << 4;
 176
 177         ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7];
 178         ln_present_width_in   = link_width_to_pow2[present_width_cap & 7];
 179         if (ln_upstream_width_out > ln_present_width_in) {
 180                 ln_upstream_width_out = ln_present_width_in;
 181         }
 182         upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
 183         present_width  |= pow2_to_link_width[ln_upstream_width_out];
 184
 185         /* Set the current device */
 186         old_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
 187         old_freq &= 0x0f;
 188         if (freq != old_freq) {
 189                 unsigned new_freq;
 190                 pci_write_config8(cur->dev, cur->pos + cur->freq_off, freq);
 191                 reset_needed = 1;
 192                 printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq);
 193                 new_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
 194                 new_freq &= 0x0f;
 195                 if (new_freq != freq) {
 196                         printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
 197                                 dev_path(dev), freq, new_freq);
 198                 }
 199         }
 200         old_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
 201         if (present_width != old_width) {
 202                 unsigned new_width;
 203                 pci_write_config8(cur->dev, cur->pos + cur->config_off + 1,
 204                         present_width);
 205                 reset_needed = 1;
 206                 printk_spew("HyperT widthP old %x new %x\n",old_width, present_width);
 207                 new_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
 208                 if (new_width != present_width) {
 209                         printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
 210                                 dev_path(dev), present_width, new_width);
 211                 }
 212         }
 213
 214         /* Set the upstream device */
 215         old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
 216         old_freq &= 0x0f;
 217         if (freq != old_freq) {
 218                 unsigned new_freq;
 219                 pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
 220                 reset_needed = 1;
 221                 printk_spew("HyperT freqU old %x new %x\n", old_freq, freq);
 222                 new_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
 223                 new_freq &= 0x0f;
 224                 if (new_freq != freq) {
 225                         printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
 226                                 dev_path(prev->dev), freq, new_freq);
 227                 }
 228         }
 229         old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
 230         if (upstream_width != old_width) {
 231                 unsigned new_width;
 232                 pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
 233                 reset_needed = 1;
 234                 printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width);
 235                 new_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
 236                 if (new_width != upstream_width) {
 237                         printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
 238                                 dev_path(prev->dev), upstream_width, new_width);
 239                 }
 240         }
 241 #endif
 242
 243         /* Remember the current link as the previous link,
 244          * But look at the other offsets.
 245          */
 246         prev->dev = cur->dev;
 247         prev->pos = cur->pos;
 248         if (cur->ctrl_off == PCI_HT_CAP_SLAVE_CTRL0) {
 249                 prev->ctrl_off     = PCI_HT_CAP_SLAVE_CTRL1;
 250                 prev->config_off   = PCI_HT_CAP_SLAVE_WIDTH1;
 251                 prev->freq_off     = PCI_HT_CAP_SLAVE_FREQ1;
 252                 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
 253         } else {
 254                 prev->ctrl_off     = PCI_HT_CAP_SLAVE_CTRL0;
 255                 prev->config_off   = PCI_HT_CAP_SLAVE_WIDTH0;
 256                 prev->freq_off     = PCI_HT_CAP_SLAVE_FREQ0;
 257                 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
 258         }
 259
 260         return reset_needed;
 261
 262 }
 263
 264 static unsigned ht_lookup_slave_capability(struct device *dev)
 265 {
 266         unsigned pos;
 267         pos = 0;
 268         do {
 269                 pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos);
 270                 if (pos) {
 271                         unsigned flags;
 272                         flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
 273                         printk_spew("flags: 0x%04x\n", flags);
 274                         if ((flags >> 13) == 0) {
 275                                 /* Entry is a Slave secondary, success... */
 276                                 break;
 277                         }
 278                 }
 279         } while(pos);
 280         return pos;
 281 }
 282
 283 static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_unitid)
 284 {
 285         unsigned int devfn;
 286         struct ht_link prev;
 287         unsigned ctrl;
 288
 289         /* Initialize the hypertransport enumeration state */
 290         prev.dev = bus->dev;
 291         prev.pos = bus->cap;
 292         prev.ctrl_off     = PCI_HT_CAP_HOST_CTRL;
 293         prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
 294         prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
 295         prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
 296
 297         /* Wait until the link initialization is complete */
 298         do {
 299                 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
 300                 /* Is this the end of the hypertransport chain */
 301                 if (ctrl & (1 << 6)) {
 302                         return;
 303                 }
 304                 /* Has the link failed? */
 305                 if (ctrl & (1 << 4)) {
 306                         /*
 307                          * Either the link has failed, or we have
 308                          * a CRC error.
 309                          * Sometimes this can happen due to link
 310                          * retrain, so lets knock it down and see
 311                          * if its transient
 312                          */
 313                         ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
 314                         pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
 315                         ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
 316                         if (ctrl & ((1 << 4) | (1 << 8))) {
 317                                 printk_alert("Detected error on Hypertransport Link\n");
 318                                 return;
 319                         }
 320                 }
 321         } while((ctrl & (1 << 5)) == 0);
 322
 323                 //actually, only for one HT device HT chain, and unitid is 0
 324 #if HT_CHAIN_UNITID_BASE == 0
 325         if(offset_unitid) {
 326                 return;
 327         }
 328 #endif
 329
 330         /* Check if is already collapsed */
 331         if((!offset_unitid)|| (offset_unitid && (!((HT_CHAIN_END_UNITID_BASE == 0) && (HT_CHAIN_END_UNITID_BASE <HT_CHAIN_UNITID_BASE))))) {
 332                 struct device dummy;
 333                 uint32_t id;
 334                 dummy.bus              = bus;
 335                 dummy.path.type        = DEVICE_PATH_PCI;
 336                 dummy.path.u.pci.devfn = PCI_DEVFN(0, 0);
 337                 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
 338                 if ( ! ( (id == 0xffffffff) || (id == 0x00000000) ||
 339                     (id == 0x0000ffff) || (id == 0xffff0000) ) ) {
 340                              return;
 341                 }
 342         }
 343
 344         /* Spin through the devices and collapse any early
 345          * hypertransport enumeration.
 346          */
 347         for(devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
 348                 struct device dummy;
 349                 uint32_t id;
 350                 unsigned pos, flags;
 351                 dummy.bus              = bus;
 352                 dummy.path.type        = DEVICE_PATH_PCI;
 353                 dummy.path.u.pci.devfn = devfn;
 354                 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
 355                 if (    (id == 0xffffffff) || (id == 0x00000000) ||
 356                         (id == 0x0000ffff) || (id == 0xffff0000)) {
 357                         continue;
 358                 }
 359                 dummy.vendor = id & 0xffff;
 360                 dummy.device = (id >> 16) & 0xffff;
 361                 dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
 362                 pos = ht_lookup_slave_capability(&dummy);
 363                 if (!pos){
 364                         continue;
 365                 }
 366
 367                 /* Clear the unitid */
 368                 flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
 369                 flags &= ~0x1f;
 370                 pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
 371                 printk_spew("Collapsing %s [%04x/%04x]\n",
 372                         dev_path(&dummy), dummy.vendor, dummy.device);
 373         }
 374 }
 375
 376 unsigned int hypertransport_scan_chain(struct bus *bus,
 377         unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
 378 {
 379         //even HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
 380         unsigned next_unitid, last_unitid;
 381         device_t old_devices, dev, func;
 382         unsigned min_unitid = (offset_unitid) ? HT_CHAIN_UNITID_BASE:1;
 383         struct ht_link prev;
 384         device_t last_func = 0;
 385         int ht_dev_num = 0;
 386         unsigned temp_unitid;
 387         unsigned not_use_count;
 388
 389 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 390         //let't record the device of last ht device, So we can set the Unitid to HT_CHAIN_END_UNITID_BASE
 391         unsigned real_last_unitid;
 392         uint8_t real_last_pos;
 393         device_t real_last_dev;
 394 #endif
 395
 396         /* Restore the hypertransport chain to it's unitialized state */
 397         ht_collapse_early_enumeration(bus, offset_unitid);
 398
 399         /* See which static device nodes I have */
 400         old_devices = bus->children;
 401         bus->children = 0;
 402
 403         /* Initialize the hypertransport enumeration state */
 404         prev.dev = bus->dev;
 405         prev.pos = bus->cap;
 406         prev.ctrl_off     = PCI_HT_CAP_HOST_CTRL;
 407         prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
 408         prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
 409         prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
 410
 411         /* If present assign unitid to a hypertransport chain */
 412         last_unitid = min_unitid -1;
 413         next_unitid = min_unitid;
 414         do {
 415                 uint8_t pos;
 416                 uint16_t flags;
 417                 unsigned count, static_count;
 418                 unsigned ctrl;
 419
 420                 last_unitid = next_unitid;
 421
 422                 /* Wait until the link initialization is complete */
 423                 do {
 424                         ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
 425
 426                         if (ctrl & (1 << 6))
 427                                 goto end_of_chain;      // End of chain
 428
 429                         if (ctrl & ((1 << 4) | (1 << 8))) {
 430                                 /*
 431                                  * Either the link has failed, or we have
 432                                  * a CRC error.
 433                                  * Sometimes this can happen due to link
 434                                  * retrain, so lets knock it down and see
 435                                  * if its transient
 436                                  */
 437                                 ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
 438                                 pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
 439                                 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
 440                                 if (ctrl & ((1 << 4) | (1 << 8))) {
 441                                         printk_alert("Detected error on Hypertransport Link\n");
 442                                         goto end_of_chain;
 443                                 }
 444                         }
 445                 } while((ctrl & (1 << 5)) == 0);
 446
 447
 448                 /* Get and setup the device_structure */
 449                 dev = ht_scan_get_devs(&old_devices);
 450
 451                 /* See if a device is present and setup the
 452                  * device structure.
 453                  */
 454                 dev = pci_probe_dev(dev, bus, 0);
 455                 if (!dev || !dev->enabled) {
 456                         break;
 457                 }
 458
 459                 /* Find the hypertransport link capability */
 460                 pos = ht_lookup_slave_capability(dev);
 461                 if (pos == 0) {
 462                         printk_err("%s Hypertransport link capability not found",
 463                                 dev_path(dev));
 464                         break;
 465                 }
 466
 467                 /* Update the Unitid of the current device */
 468                 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
 469
 470                 /* If the devices has a unitid set and is at devfn 0 we are done.
 471                  * This can happen with shadow hypertransport devices,
 472                  * or if we have reached the bottom of a
 473                  * hypertransport device chain.
 474                  */
 475                 if (flags & 0x1f) {
 476                         break;
 477                 }
 478                 flags &= ~0x1f; /* mask out base Unit ID */
 479
 480                 count = (flags >> 5) & 0x1f; /* get unit count */
 481                 not_use_count = 0;
 482                 temp_unitid = next_unitid;
 483 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 484                 if(offset_unitid) {
 485                         if((next_unitid+count)>=0x20) {
 486                                 temp_unitid = HT_CHAIN_END_UNITID_BASE;
 487                                 //still use the old next_unitid
 488                                 not_use_count = 1;
 489                         }
 490
 491                 }
 492 #endif
 493
 494                 flags |= temp_unitid & 0x1f;
 495                 pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
 496
 497                 /* Update the Unitd id in the device structure */
 498                 static_count = 1;
 499                 for(func = dev; func; func = func->sibling) {
 500                         func->path.u.pci.devfn += (temp_unitid << 3);
 501                         static_count = (func->path.u.pci.devfn >> 3)
 502                                 - (dev->path.u.pci.devfn >> 3) + 1;
 503                         last_func = func;
 504                 }
 505                 /* Compute the number of unitids consumed */
 506                 printk_spew("%s count: %04x static_count: %04x\n",
 507                         dev_path(dev), count, static_count);
 508                 if (count < static_count) {
 509                         count = static_count;
 510                 }
 511                 if(!not_use_count)
 512                         next_unitid +=  count;
 513
 514                 /* Update the Unitid of the next device */
 515                 ht_unitid_base[ht_dev_num] = temp_unitid;
 516                 ht_dev_num++;
 517
 518 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 519                 if(offset_unitid) {
 520                         real_last_pos = pos;
 521                         real_last_unitid = temp_unitid;
 522                         real_last_dev = dev;
 523                 }
 524 #endif
 525
 526                 /* Setup the hypetransport link */
 527                 bus->reset_needed |= ht_setup_link(&prev, dev, pos);
 528
 529                 printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",
 530                         dev_path(dev),
 531                         dev->vendor, dev->device,
 532                         (dev->enabled? "enabled": "disabled"), next_unitid);
 533
 534         } while((last_unitid != next_unitid) && (next_unitid <= 0x1f /*(max_devfn >> 3)*/ ));
 535  end_of_chain:
 536 #if OPT_HT_LINK == 1
 537         if(bus->reset_needed) {
 538                 printk_info("HyperT reset needed\n");
 539         }
 540         else {
 541                 printk_debug("HyperT reset not needed\n");
 542         }
 543 #endif
 544
 545 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 546         if(offset_unitid && (ht_dev_num>1) && (real_last_unitid != HT_CHAIN_END_UNITID_BASE) ) {
 547                 uint16_t flags;
 548                 int i;
 549                 device_t last_func = 0;
 550                 flags = pci_read_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS);
 551                 flags &= ~0x1f;
 552                 flags |= HT_CHAIN_END_UNITID_BASE & 0x1f;
 553                 pci_write_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS, flags);
 554
 555                 for(func = real_last_dev; func; func = func->sibling) {
 556                         func->path.u.pci.devfn -= ((real_last_unitid - HT_CHAIN_END_UNITID_BASE) << 3);
 557                         last_func = func;
 558                 }
 559
 560                 ht_unitid_base[ht_dev_num-1] = HT_CHAIN_END_UNITID_BASE; // update last one
 561
 562                 next_unitid = real_last_unitid;
 563         }
 564 #endif
 565
 566         if (next_unitid > 0x1f) {
 567                 next_unitid = 0x1f;
 568         }
 569         if( (bus->secondary == 0) && (next_unitid > 0x17)) {
 570                 next_unitid = 0x17; /* avoid K8 on bus 0 */
 571         }
 572
 573         /* Die if any leftover Static devices are are found.
 574          * There's probably a problem in the Config.lb.
 575          */
 576         if(old_devices) {
 577                 device_t left;
 578                 for(left = old_devices; left; left = left->sibling) {
 579                         printk_debug("%s\n", dev_path(left));
 580                 }
 581                 printk_err("HT: Left over static devices.  Check your Config.lb\n");
 582                 if(last_func  && !last_func->sibling) // put back the left over static device, and let pci_scan_bus disable it
 583                         last_func->sibling = old_devices;
 584         }
 585
 586         /* Now that nothing is overlapping it is safe to scan the
 587          * children.
 588          */
 589         max = pci_scan_bus(bus, 0x00, ((next_unitid-1) << 3)|7, max);
 590         return max;
 591 }
 592
 593 /**
 594  * @brief Scan a PCI bridge and the buses behind the bridge.
 595  *
 596  * Determine the existence of buses behind the bridge. Set up the bridge
 597  * according to the result of the scan.
 598  *
 599  * This function is the default scan_bus() method for PCI bridge devices.
 600  *
 601  * @param dev pointer to the bridge device
 602  * @param max the highest bus number assgined up to now
 603  *
 604  * @return The maximum bus number found, after scanning all subordinate busses
 605  */
 606 unsigned int hypertransport_scan_chain_x(struct bus *bus,
 607         unsigned min_devfn, unsigned max_devfn, unsigned int max)
 608 {
 609         unsigned ht_unitid_base[4];
 610         unsigned offset_unitid = 1;
 611         return hypertransport_scan_chain(bus, min_devfn, max_devfn, max, ht_unitid_base, offset_unitid);
 612 }
 613
 614 unsigned int ht_scan_bridge(struct device *dev, unsigned int max)
 615 {
 616         return do_pci_scan_bridge(dev, max, hypertransport_scan_chain_x);
 617 }
 618
 619
 620 /** Default device operations for hypertransport bridges */
 621 static struct pci_operations ht_bus_ops_pci = {
 622         .set_subsystem = 0,
 623 };
 624
 625 struct device_operations default_ht_ops_bus = {
 626         .read_resources   = pci_bus_read_resources,
 627         .set_resources    = pci_dev_set_resources,
 628         .enable_resources = pci_bus_enable_resources,
 629         .init             = 0,
 630         .scan_bus         = ht_scan_bridge,
 631         .enable           = 0,
 632         .reset_bus        = pci_bus_reset,
 633         .ops_pci          = &ht_bus_ops_pci,
 634 };