src/devices/hypertransport.c

   1 /*
   2         2005.11 yhlu add let the real sb to use small uintid
   3
   4 */
   5
   6
   7 #include <bitops.h>
   8 #include <console/console.h>
   9 #include <device/device.h>
  10 #include <device/path.h>
  11 #include <device/pci.h>
  12 #include <device/pci_ids.h>
  13 #include <device/hypertransport.h>
  14 #include <part/hard_reset.h>
  15 #include <part/fallback_boot.h>
  16
  17 #define OPT_HT_LINK 0
  18
  19 #if OPT_HT_LINK == 1
  20 #include <cpu/amd/model_fxx_rev.h>
  21 #endif
  22
  23 static device_t ht_scan_get_devs(device_t *old_devices)
  24 {
  25         device_t first, last;
  26         first = *old_devices;
  27         last = first;
  28         /* Extract the chain of devices to (first through last)
  29          * for the next hypertransport device.
  30          */
  31         while(last && last->sibling &&
  32                 (last->sibling->path.type == DEVICE_PATH_PCI) &&
  33                 (last->sibling->path.u.pci.devfn > last->path.u.pci.devfn))
  34         {
  35                 last = last->sibling;
  36         }
  37         if (first) {
  38                 device_t child;
  39                 /* Unlink the chain from the list of old devices */
  40                 *old_devices = last->sibling;
  41                 last->sibling = 0;
  42
  43                 /* Now add the device to the list of devices on the bus.
  44                  */
  45                 /* Find the last child of our parent */
  46                 for(child = first->bus->children; child && child->sibling; ) {
  47                         child = child->sibling;
  48                 }
  49                 /* Place the chain on the list of children of their parent. */
  50                 if (child) {
  51                         child->sibling = first;
  52                 } else {
  53                         first->bus->children = first;
  54                 }
  55         }
  56         return first;
  57 }
  58
  59 #if OPT_HT_LINK == 1
  60 static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
  61 {
  62         /* Handle bugs in valid hypertransport frequency reporting */
  63         unsigned freq_cap;
  64
  65         freq_cap = pci_read_config16(dev, pos);
  66         freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
  67
  68         /* AMD 8131 Errata 48 */
  69         if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
  70                 (dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
  71                 freq_cap &= ~(1 << HT_FREQ_800Mhz);
  72         }
  73         /* AMD 8151 Errata 23 */
  74         if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
  75                 (dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
  76                 freq_cap &= ~(1 << HT_FREQ_800Mhz);
  77         }
  78         /* AMD K8 Unsupported 1Ghz? */
  79         if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
  80 #if K8_HT_FREQ_1G_SUPPORT == 1
  81                 if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
  82                         freq_cap &= ~(1 << HT_FREQ_1000Mhz);
  83                 }
  84 #else
  85                 freq_cap &= ~(1 << HT_FREQ_1000Mhz);
  86 #endif
  87
  88         }
  89         return freq_cap;
  90 }
  91 #endif
  92
  93 struct ht_link {
  94         struct device *dev;
  95         unsigned pos;
  96         unsigned char ctrl_off, config_off, freq_off, freq_cap_off;
  97 };
  98
  99 static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
 100 {
 101         static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
 102         static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
 103         struct ht_link cur[1];
 104         unsigned present_width_cap,    upstream_width_cap;
 105         unsigned present_freq_cap,     upstream_freq_cap;
 106         unsigned ln_present_width_in,  ln_upstream_width_in;
 107         unsigned ln_present_width_out, ln_upstream_width_out;
 108         unsigned freq, old_freq;
 109         unsigned present_width, upstream_width, old_width;
 110         int reset_needed;
 111         int linkb_to_host;
 112
 113         /* Set the hypertransport link width and frequency */
 114         reset_needed = 0;
 115         /* See which side of the device our previous write to
 116          * set the unitid came from.
 117          */
 118         cur->dev = dev;
 119         cur->pos = pos;
 120         linkb_to_host = (pci_read_config16(cur->dev, cur->pos + PCI_CAP_FLAGS) >> 10) & 1;
 121         if (!linkb_to_host) {
 122                 cur->ctrl_off     = PCI_HT_CAP_SLAVE_CTRL0;
 123                 cur->config_off   = PCI_HT_CAP_SLAVE_WIDTH0;
 124                 cur->freq_off     = PCI_HT_CAP_SLAVE_FREQ0;
 125                 cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
 126         }
 127         else {
 128                 cur->ctrl_off     = PCI_HT_CAP_SLAVE_CTRL1;
 129                 cur->config_off   = PCI_HT_CAP_SLAVE_WIDTH1;
 130                 cur->freq_off     = PCI_HT_CAP_SLAVE_FREQ1;
 131                 cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
 132         }
 133 #if OPT_HT_LINK == 1
 134         /* Read the capabilities */
 135         present_freq_cap   = ht_read_freq_cap(cur->dev, cur->pos + cur->freq_cap_off);
 136         upstream_freq_cap  = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
 137         present_width_cap  = pci_read_config8(cur->dev, cur->pos + cur->config_off);
 138         upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
 139
 140         /* Calculate the highest useable frequency */
 141         freq = log2(present_freq_cap & upstream_freq_cap);
 142
 143         /* Calculate the highest width */
 144         ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
 145         ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
 146         if (ln_upstream_width_in > ln_present_width_out) {
 147                 ln_upstream_width_in = ln_present_width_out;
 148         }
 149         upstream_width = pow2_to_link_width[ln_upstream_width_in];
 150         present_width  = pow2_to_link_width[ln_upstream_width_in] << 4;
 151
 152         ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7];
 153         ln_present_width_in   = link_width_to_pow2[present_width_cap & 7];
 154         if (ln_upstream_width_out > ln_present_width_in) {
 155                 ln_upstream_width_out = ln_present_width_in;
 156         }
 157         upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
 158         present_width  |= pow2_to_link_width[ln_upstream_width_out];
 159
 160         /* Set the current device */
 161         old_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
 162         old_freq &= 0x0f;
 163         if (freq != old_freq) {
 164                 unsigned new_freq;
 165                 pci_write_config8(cur->dev, cur->pos + cur->freq_off, freq);
 166                 reset_needed = 1;
 167                 printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq);
 168                 new_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
 169                 new_freq &= 0x0f;
 170                 if (new_freq != freq) {
 171                         printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
 172                                 dev_path(dev), freq, new_freq);
 173                 }
 174         }
 175         old_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
 176         if (present_width != old_width) {
 177                 unsigned new_width;
 178                 pci_write_config8(cur->dev, cur->pos + cur->config_off + 1,
 179                         present_width);
 180                 reset_needed = 1;
 181                 printk_spew("HyperT widthP old %x new %x\n",old_width, present_width);
 182                 new_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
 183                 if (new_width != present_width) {
 184                         printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
 185                                 dev_path(dev), present_width, new_width);
 186                 }
 187         }
 188
 189         /* Set the upstream device */
 190         old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
 191         old_freq &= 0x0f;
 192         if (freq != old_freq) {
 193                 unsigned new_freq;
 194                 pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
 195                 reset_needed = 1;
 196                 printk_spew("HyperT freqU old %x new %x\n", old_freq, freq);
 197                 new_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
 198                 new_freq &= 0x0f;
 199                 if (new_freq != freq) {
 200                         printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
 201                                 dev_path(prev->dev), freq, new_freq);
 202                 }
 203         }
 204         old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
 205         if (upstream_width != old_width) {
 206                 unsigned new_width;
 207                 pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
 208                 reset_needed = 1;
 209                 printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width);
 210                 new_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
 211                 if (new_width != upstream_width) {
 212                         printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
 213                                 dev_path(prev->dev), upstream_width, new_width);
 214                 }
 215         }
 216 #endif
 217
 218         /* Remember the current link as the previous link,
 219          * But look at the other offsets.
 220          */
 221         prev->dev = cur->dev;
 222         prev->pos = cur->pos;
 223         if (cur->ctrl_off == PCI_HT_CAP_SLAVE_CTRL0) {
 224                 prev->ctrl_off     = PCI_HT_CAP_SLAVE_CTRL1;
 225                 prev->config_off   = PCI_HT_CAP_SLAVE_WIDTH1;
 226                 prev->freq_off     = PCI_HT_CAP_SLAVE_FREQ1;
 227                 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
 228         } else {
 229                 prev->ctrl_off     = PCI_HT_CAP_SLAVE_CTRL0;
 230                 prev->config_off   = PCI_HT_CAP_SLAVE_WIDTH0;
 231                 prev->freq_off     = PCI_HT_CAP_SLAVE_FREQ0;
 232                 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
 233         }
 234
 235         return reset_needed;
 236
 237 }
 238
 239 static unsigned ht_lookup_slave_capability(struct device *dev)
 240 {
 241         unsigned pos;
 242         pos = 0;
 243         do {
 244                 pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos);
 245                 if (pos) {
 246                         unsigned flags;
 247                         flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
 248                         printk_spew("flags: 0x%04x\n", flags);
 249                         if ((flags >> 13) == 0) {
 250                                 /* Entry is a Slave secondary, success... */
 251                                 break;
 252                         }
 253                 }
 254         } while(pos);
 255         return pos;
 256 }
 257
 258 static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_unitid)
 259 {
 260         unsigned int devfn;
 261         struct ht_link prev;
 262         unsigned ctrl;
 263
 264         /* Initialize the hypertransport enumeration state */
 265         prev.dev = bus->dev;
 266         prev.pos = bus->cap;
 267         prev.ctrl_off     = PCI_HT_CAP_HOST_CTRL;
 268         prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
 269         prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
 270         prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
 271
 272         /* Wait until the link initialization is complete */
 273         do {
 274                 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
 275                 /* Is this the end of the hypertransport chain */
 276                 if (ctrl & (1 << 6)) {
 277                         return;
 278                 }
 279                 /* Has the link failed? */
 280                 if (ctrl & (1 << 4)) {
 281                         /*
 282                          * Either the link has failed, or we have
 283                          * a CRC error.
 284                          * Sometimes this can happen due to link
 285                          * retrain, so lets knock it down and see
 286                          * if its transient
 287                          */
 288                         ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
 289                         pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
 290                         ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
 291                         if (ctrl & ((1 << 4) | (1 << 8))) {
 292                                 printk_alert("Detected error on Hypertransport Link\n");
 293                                 return;
 294                         }
 295                 }
 296         } while((ctrl & (1 << 5)) == 0);
 297
 298                 //actually, only for one HT device HT chain, and unitid is 0
 299 #if HT_CHAIN_UNITID_BASE == 0
 300         if(offset_unitid) {
 301                 return;
 302         }
 303 #endif
 304
 305         /* Check if is already collapsed */
 306         if((!offset_unitid)|| (offset_unitid && (!((HT_CHAIN_END_UNITID_BASE == 0) && (HT_CHAIN_END_UNITID_BASE <HT_CHAIN_UNITID_BASE))))) {
 307                 struct device dummy;
 308                 uint32_t id;
 309                 dummy.bus              = bus;
 310                 dummy.path.type        = DEVICE_PATH_PCI;
 311                 dummy.path.u.pci.devfn = PCI_DEVFN(0, 0);
 312                 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
 313                 if ( ! ( (id == 0xffffffff) || (id == 0x00000000) ||
 314                     (id == 0x0000ffff) || (id == 0xffff0000) ) ) {
 315                              return;
 316                 }
 317         }
 318
 319         /* Spin through the devices and collapse any early
 320          * hypertransport enumeration.
 321          */
 322         for(devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
 323                 struct device dummy;
 324                 uint32_t id;
 325                 unsigned pos, flags;
 326                 dummy.bus              = bus;
 327                 dummy.path.type        = DEVICE_PATH_PCI;
 328                 dummy.path.u.pci.devfn = devfn;
 329                 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
 330                 if (    (id == 0xffffffff) || (id == 0x00000000) ||
 331                         (id == 0x0000ffff) || (id == 0xffff0000)) {
 332                         continue;
 333                 }
 334                 dummy.vendor = id & 0xffff;
 335                 dummy.device = (id >> 16) & 0xffff;
 336                 dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
 337                 pos = ht_lookup_slave_capability(&dummy);
 338                 if (!pos){
 339                         continue;
 340                 }
 341
 342                 /* Clear the unitid */
 343                 flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
 344                 flags &= ~0x1f;
 345                 pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
 346                 printk_spew("Collapsing %s [%04x/%04x]\n",
 347                         dev_path(&dummy), dummy.vendor, dummy.device);
 348         }
 349 }
 350
 351 unsigned int hypertransport_scan_chain(struct bus *bus,
 352         unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
 353 {
 354         //even HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
 355         unsigned next_unitid, last_unitid;
 356         device_t old_devices, dev, func;
 357         unsigned min_unitid = (offset_unitid) ? HT_CHAIN_UNITID_BASE:1;
 358         struct ht_link prev;
 359         device_t last_func = 0;
 360         int ht_dev_num = 0;
 361
 362 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 363         //let't record the device of last ht device, So we can set the Unitid to HT_CHAIN_END_UNITID_BASE
 364         unsigned real_last_unitid;
 365         uint8_t real_last_pos;
 366         device_t real_last_dev;
 367 #endif
 368
 369         /* Restore the hypertransport chain to it's unitialized state */
 370         ht_collapse_early_enumeration(bus, offset_unitid);
 371
 372         /* See which static device nodes I have */
 373         old_devices = bus->children;
 374         bus->children = 0;
 375
 376         /* Initialize the hypertransport enumeration state */
 377         prev.dev = bus->dev;
 378         prev.pos = bus->cap;
 379         prev.ctrl_off     = PCI_HT_CAP_HOST_CTRL;
 380         prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
 381         prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
 382         prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
 383
 384         /* If present assign unitid to a hypertransport chain */
 385         last_unitid = min_unitid -1;
 386         next_unitid = min_unitid;
 387         do {
 388                 uint8_t pos;
 389                 uint16_t flags;
 390                 unsigned count, static_count;
 391                 unsigned ctrl;
 392
 393                 last_unitid = next_unitid;
 394
 395                 /* Wait until the link initialization is complete */
 396                 do {
 397                         ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
 398
 399                         if (ctrl & (1 << 6))
 400                                 goto end_of_chain;      // End of chain
 401
 402                         if (ctrl & ((1 << 4) | (1 << 8))) {
 403                                 /*
 404                                  * Either the link has failed, or we have
 405                                  * a CRC error.
 406                                  * Sometimes this can happen due to link
 407                                  * retrain, so lets knock it down and see
 408                                  * if its transient
 409                                  */
 410                                 ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
 411                                 pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
 412                                 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
 413                                 if (ctrl & ((1 << 4) | (1 << 8))) {
 414                                         printk_alert("Detected error on Hypertransport Link\n");
 415                                         goto end_of_chain;
 416                                 }
 417                         }
 418                 } while((ctrl & (1 << 5)) == 0);
 419
 420
 421                 /* Get and setup the device_structure */
 422                 dev = ht_scan_get_devs(&old_devices);
 423
 424                 /* See if a device is present and setup the
 425                  * device structure.
 426                  */
 427                 dev = pci_probe_dev(dev, bus, 0);
 428                 if (!dev || !dev->enabled) {
 429                         break;
 430                 }
 431
 432                 /* Find the hypertransport link capability */
 433                 pos = ht_lookup_slave_capability(dev);
 434                 if (pos == 0) {
 435                         printk_err("%s Hypertransport link capability not found",
 436                                 dev_path(dev));
 437                         break;
 438                 }
 439
 440                 /* Update the Unitid of the current device */
 441                 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
 442
 443                 /* If the devices has a unitid set and is at devfn 0 we are done.
 444                  * This can happen with shadow hypertransport devices,
 445                  * or if we have reached the bottom of a
 446                  * hypertransport device chain.
 447                  */
 448                 if (flags & 0x1f) {
 449                         break;
 450                 }
 451
 452                 flags &= ~0x1f; /* mask out base Unit ID */
 453                        flags |= next_unitid & 0x1f;
 454                        pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
 455
 456                 /* Update the Unitd id in the device structure */
 457                 static_count = 1;
 458                 for(func = dev; func; func = func->sibling) {
 459                         func->path.u.pci.devfn += (next_unitid << 3);
 460                         static_count = (func->path.u.pci.devfn >> 3)
 461                                 - (dev->path.u.pci.devfn >> 3) + 1;
 462                         last_func = func;
 463                 }
 464
 465                 /* Compute the number of unitids consumed */
 466                 count = (flags >> 5) & 0x1f; /* get unit count */
 467                 printk_spew("%s count: %04x static_count: %04x\n",
 468                         dev_path(dev), count, static_count);
 469                 if (count < static_count) {
 470                         count = static_count;
 471                 }
 472
 473                 /* Update the Unitid of the next device */
 474                 ht_unitid_base[ht_dev_num] = next_unitid;
 475                 ht_dev_num++;
 476 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 477                 if(offset_unitid) {
 478                         real_last_unitid = next_unitid;
 479                         real_last_pos = pos;
 480                         real_last_dev = dev;
 481                 }
 482 #endif
 483                 next_unitid += count;
 484
 485                 /* Setup the hypetransport link */
 486                 bus->reset_needed |= ht_setup_link(&prev, dev, pos);
 487
 488                 printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",
 489                         dev_path(dev),
 490                         dev->vendor, dev->device,
 491                         (dev->enabled? "enabled": "disabled"), next_unitid);
 492
 493
 494         } while((last_unitid != next_unitid) && (next_unitid <= (max_devfn >> 3)));
 495  end_of_chain:
 496 #if OPT_HT_LINK == 1
 497         if(bus->reset_needed) {
 498                 printk_info("HyperT reset needed\n");
 499         }
 500         else {
 501                 printk_debug("HyperT reset not needed\n");
 502         }
 503 #endif
 504
 505 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
 506         if(offset_unitid && (ht_dev_num>0)) {
 507                 uint16_t flags;
 508                 int i;
 509                 device_t last_func = 0;
 510                 flags = pci_read_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS);
 511                 flags &= ~0x1f;
 512                 flags |= HT_CHAIN_END_UNITID_BASE & 0x1f;
 513                 pci_write_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS, flags);
 514
 515                 for(func = real_last_dev; func; func = func->sibling) {
 516                         func->path.u.pci.devfn -= ((real_last_unitid - HT_CHAIN_END_UNITID_BASE) << 3);
 517                         last_func = func;
 518                 }
 519
 520                 ht_unitid_base[ht_dev_num-1] = HT_CHAIN_END_UNITID_BASE; // update last one
 521
 522                 next_unitid = real_last_unitid;
 523         }
 524 #endif
 525
 526         if (next_unitid > 0x1f) {
 527                 next_unitid = 0x1f;
 528         }
 529
 530         /* Die if any leftover Static devices are are found.
 531          * There's probably a problem in the Config.lb.
 532          */
 533         if(old_devices) {
 534                 device_t left;
 535                 for(left = old_devices; left; left = left->sibling) {
 536                         printk_debug("%s\n", dev_path(left));
 537                 }
 538                 printk_err("HT: Left over static devices.  Check your Config.lb\n");
 539                 if(last_func  && !last_func->sibling) // put back the left over static device, and let pci_scan_bus disable it
 540                         last_func->sibling = old_devices;
 541         }
 542
 543         /* Now that nothing is overlapping it is safe to scan the
 544          * children.
 545          */
 546         max = pci_scan_bus(bus, 0x00, (next_unitid << 3)|7, max);
 547         return max;
 548 }
 549
 550 /**
 551  * @brief Scan a PCI bridge and the buses behind the bridge.
 552  *
 553  * Determine the existence of buses behind the bridge. Set up the bridge
 554  * according to the result of the scan.
 555  *
 556  * This function is the default scan_bus() method for PCI bridge devices.
 557  *
 558  * @param dev pointer to the bridge device
 559  * @param max the highest bus number assgined up to now
 560  *
 561  * @return The maximum bus number found, after scanning all subordinate busses
 562  */
 563 unsigned int ht_scan_bridge(struct device *dev, unsigned int max)
 564 {
 565         return do_pci_scan_bridge(dev, max, hypertransport_scan_chain);
 566 }
 567
 568
 569 /** Default device operations for hypertransport bridges */
 570 static struct pci_operations ht_bus_ops_pci = {
 571         .set_subsystem = 0,
 572 };
 573
 574 struct device_operations default_ht_ops_bus = {
 575         .read_resources   = pci_bus_read_resources,
 576         .set_resources    = pci_dev_set_resources,
 577         .enable_resources = pci_bus_enable_resources,
 578         .init             = 0,
 579         .scan_bus         = ht_scan_bridge,
 580         .enable           = 0,
 581         .reset_bus        = pci_bus_reset,
 582         .ops_pci          = &ht_bus_ops_pci,
 583 };