2 2005.11 yhlu add let the real sb to use small uintid
8 #include <console/console.h>
9 #include <device/device.h>
10 #include <device/path.h>
11 #include <device/pci.h>
12 #include <device/pci_ids.h>
13 #include <device/hypertransport.h>
14 #include <part/hard_reset.h>
15 #include <part/fallback_boot.h>
20 #include <cpu/amd/model_fxx_rev.h>
23 static device_t ht_scan_get_devs(device_t *old_devices)
28 /* Extract the chain of devices to (first through last)
29 * for the next hypertransport device.
31 while(last && last->sibling &&
32 (last->sibling->path.type == DEVICE_PATH_PCI) &&
33 (last->sibling->path.u.pci.devfn > last->path.u.pci.devfn))
39 /* Unlink the chain from the list of old devices */
40 *old_devices = last->sibling;
43 /* Now add the device to the list of devices on the bus.
45 /* Find the last child of our parent */
46 for(child = first->bus->children; child && child->sibling; ) {
47 child = child->sibling;
49 /* Place the chain on the list of children of their parent. */
51 child->sibling = first;
53 first->bus->children = first;
60 static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
62 /* Handle bugs in valid hypertransport frequency reporting */
65 freq_cap = pci_read_config16(dev, pos);
66 freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
68 /* AMD 8131 Errata 48 */
69 if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
70 (dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
71 freq_cap &= ~(1 << HT_FREQ_800Mhz);
73 /* AMD 8151 Errata 23 */
74 if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
75 (dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
76 freq_cap &= ~(1 << HT_FREQ_800Mhz);
78 /* AMD K8 Unsupported 1Ghz? */
79 if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
80 #if K8_HT_FREQ_1G_SUPPORT == 1
81 if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
82 freq_cap &= ~(1 << HT_FREQ_1000Mhz);
85 freq_cap &= ~(1 << HT_FREQ_1000Mhz);
96 unsigned char ctrl_off, config_off, freq_off, freq_cap_off;
99 static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
101 static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
102 static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
103 struct ht_link cur[1];
104 unsigned present_width_cap, upstream_width_cap;
105 unsigned present_freq_cap, upstream_freq_cap;
106 unsigned ln_present_width_in, ln_upstream_width_in;
107 unsigned ln_present_width_out, ln_upstream_width_out;
108 unsigned freq, old_freq;
109 unsigned present_width, upstream_width, old_width;
113 /* Set the hypertransport link width and frequency */
115 /* See which side of the device our previous write to
116 * set the unitid came from.
120 linkb_to_host = (pci_read_config16(cur->dev, cur->pos + PCI_CAP_FLAGS) >> 10) & 1;
121 if (!linkb_to_host) {
122 cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL0;
123 cur->config_off = PCI_HT_CAP_SLAVE_WIDTH0;
124 cur->freq_off = PCI_HT_CAP_SLAVE_FREQ0;
125 cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
128 cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL1;
129 cur->config_off = PCI_HT_CAP_SLAVE_WIDTH1;
130 cur->freq_off = PCI_HT_CAP_SLAVE_FREQ1;
131 cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
134 /* Read the capabilities */
135 present_freq_cap = ht_read_freq_cap(cur->dev, cur->pos + cur->freq_cap_off);
136 upstream_freq_cap = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
137 present_width_cap = pci_read_config8(cur->dev, cur->pos + cur->config_off);
138 upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
140 /* Calculate the highest useable frequency */
141 freq = log2(present_freq_cap & upstream_freq_cap);
143 /* Calculate the highest width */
144 ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
145 ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
146 if (ln_upstream_width_in > ln_present_width_out) {
147 ln_upstream_width_in = ln_present_width_out;
149 upstream_width = pow2_to_link_width[ln_upstream_width_in];
150 present_width = pow2_to_link_width[ln_upstream_width_in] << 4;
152 ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7];
153 ln_present_width_in = link_width_to_pow2[present_width_cap & 7];
154 if (ln_upstream_width_out > ln_present_width_in) {
155 ln_upstream_width_out = ln_present_width_in;
157 upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
158 present_width |= pow2_to_link_width[ln_upstream_width_out];
160 /* Set the current device */
161 old_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
163 if (freq != old_freq) {
165 pci_write_config8(cur->dev, cur->pos + cur->freq_off, freq);
167 printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq);
168 new_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
170 if (new_freq != freq) {
171 printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
172 dev_path(dev), freq, new_freq);
175 old_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
176 if (present_width != old_width) {
178 pci_write_config8(cur->dev, cur->pos + cur->config_off + 1,
181 printk_spew("HyperT widthP old %x new %x\n",old_width, present_width);
182 new_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
183 if (new_width != present_width) {
184 printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
185 dev_path(dev), present_width, new_width);
189 /* Set the upstream device */
190 old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
192 if (freq != old_freq) {
194 pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
196 printk_spew("HyperT freqU old %x new %x\n", old_freq, freq);
197 new_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
199 if (new_freq != freq) {
200 printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
201 dev_path(prev->dev), freq, new_freq);
204 old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
205 if (upstream_width != old_width) {
207 pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
209 printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width);
210 new_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
211 if (new_width != upstream_width) {
212 printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
213 dev_path(prev->dev), upstream_width, new_width);
218 /* Remember the current link as the previous link,
219 * But look at the other offsets.
221 prev->dev = cur->dev;
222 prev->pos = cur->pos;
223 if (cur->ctrl_off == PCI_HT_CAP_SLAVE_CTRL0) {
224 prev->ctrl_off = PCI_HT_CAP_SLAVE_CTRL1;
225 prev->config_off = PCI_HT_CAP_SLAVE_WIDTH1;
226 prev->freq_off = PCI_HT_CAP_SLAVE_FREQ1;
227 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
229 prev->ctrl_off = PCI_HT_CAP_SLAVE_CTRL0;
230 prev->config_off = PCI_HT_CAP_SLAVE_WIDTH0;
231 prev->freq_off = PCI_HT_CAP_SLAVE_FREQ0;
232 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
239 static unsigned ht_lookup_slave_capability(struct device *dev)
244 pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos);
247 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
248 printk_spew("flags: 0x%04x\n", flags);
249 if ((flags >> 13) == 0) {
250 /* Entry is a Slave secondary, success... */
258 static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_unitid)
264 /* Initialize the hypertransport enumeration state */
267 prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
268 prev.config_off = PCI_HT_CAP_HOST_WIDTH;
269 prev.freq_off = PCI_HT_CAP_HOST_FREQ;
270 prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
272 /* Wait until the link initialization is complete */
274 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
275 /* Is this the end of the hypertransport chain */
276 if (ctrl & (1 << 6)) {
279 /* Has the link failed? */
280 if (ctrl & (1 << 4)) {
283 } while((ctrl & (1 << 5)) == 0);
285 //actually, only for one HT device HT chain, and unitid is 0
286 #if HT_CHAIN_UNITID_BASE == 0
292 /* Check if is already collapsed */
293 if((!offset_unitid)|| (offset_unitid && (!((HT_CHAIN_END_UNITID_BASE == 0) && (HT_CHAIN_END_UNITID_BASE <HT_CHAIN_UNITID_BASE))))) {
297 dummy.path.type = DEVICE_PATH_PCI;
298 dummy.path.u.pci.devfn = PCI_DEVFN(0, 0);
299 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
300 if ( ! ( (id == 0xffffffff) || (id == 0x00000000) ||
301 (id == 0x0000ffff) || (id == 0xffff0000) ) ) {
306 /* Spin through the devices and collapse any early
307 * hypertransport enumeration.
309 for(devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
314 dummy.path.type = DEVICE_PATH_PCI;
315 dummy.path.u.pci.devfn = devfn;
316 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
317 if ( (id == 0xffffffff) || (id == 0x00000000) ||
318 (id == 0x0000ffff) || (id == 0xffff0000)) {
321 dummy.vendor = id & 0xffff;
322 dummy.device = (id >> 16) & 0xffff;
323 dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
324 pos = ht_lookup_slave_capability(&dummy);
329 /* Clear the unitid */
330 flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
332 pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
333 printk_spew("Collapsing %s [%04x/%04x]\n",
334 dev_path(&dummy), dummy.vendor, dummy.device);
338 unsigned int hypertransport_scan_chain(struct bus *bus,
339 unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
341 //even HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
342 unsigned next_unitid, last_unitid;
343 device_t old_devices, dev, func;
344 unsigned min_unitid = (offset_unitid) ? HT_CHAIN_UNITID_BASE:1;
346 device_t last_func = 0;
349 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
350 //let't record the device of last ht device, So we can set the Unitid to HT_CHAIN_END_UNITID_BASE
351 unsigned real_last_unitid;
352 uint8_t real_last_pos;
353 device_t real_last_dev;
356 /* Restore the hypertransport chain to it's unitialized state */
357 ht_collapse_early_enumeration(bus, offset_unitid);
359 /* See which static device nodes I have */
360 old_devices = bus->children;
363 /* Initialize the hypertransport enumeration state */
366 prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
367 prev.config_off = PCI_HT_CAP_HOST_WIDTH;
368 prev.freq_off = PCI_HT_CAP_HOST_FREQ;
369 prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
371 /* If present assign unitid to a hypertransport chain */
372 last_unitid = min_unitid -1;
373 next_unitid = min_unitid;
377 unsigned count, static_count;
380 last_unitid = next_unitid;
382 /* Wait until the link initialization is complete */
384 ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
385 /* Is this the end of the hypertransport chain?
386 * Has the link failed?
387 * If so further scanning is pointless.
389 if (ctrl & ((1 << 6) | (1 << 4))) {
392 } while((ctrl & (1 << 5)) == 0);
395 /* Get and setup the device_structure */
396 dev = ht_scan_get_devs(&old_devices);
398 /* See if a device is present and setup the
401 dev = pci_probe_dev(dev, bus, 0);
402 if (!dev || !dev->enabled) {
406 /* Find the hypertransport link capability */
407 pos = ht_lookup_slave_capability(dev);
409 printk_err("%s Hypertransport link capability not found",
414 /* Update the Unitid of the current device */
415 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
417 /* If the devices has a unitid set and is at devfn 0 we are done.
418 * This can happen with shadow hypertransport devices,
419 * or if we have reached the bottom of a
420 * hypertransport device chain.
426 flags &= ~0x1f; /* mask out base Unit ID */
427 #if CK804_DEVN_BASE==0
428 if((dev->vendor == 0x10de) && (dev->device == 0x005e)) {
433 flags |= next_unitid & 0x1f;
434 pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
435 #if CK804_DEVN_BASE==0
439 /* Update the Unitd id in the device structure */
441 for(func = dev; func; func = func->sibling) {
442 func->path.u.pci.devfn += (next_unitid << 3);
443 static_count = (func->path.u.pci.devfn >> 3)
444 - (dev->path.u.pci.devfn >> 3) + 1;
448 /* Compute the number of unitids consumed */
449 count = (flags >> 5) & 0x1f; /* get unit count */
450 printk_spew("%s count: %04x static_count: %04x\n",
451 dev_path(dev), count, static_count);
452 if (count < static_count) {
453 count = static_count;
456 /* Update the Unitid of the next device */
457 ht_unitid_base[ht_dev_num] = next_unitid;
459 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
461 real_last_unitid = next_unitid;
466 next_unitid += count;
468 /* Setup the hypetransport link */
469 bus->reset_needed |= ht_setup_link(&prev, dev, pos);
471 printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",
473 dev->vendor, dev->device,
474 (dev->enabled? "enabled": "disabled"), next_unitid);
476 #if CK804_DEVN_BASE==0
477 if ((dev->vendor == 0x10de) && (dev->device == 0x005e)) {
478 break; // CK804 can not change unitid, so it only can be alone in the link
482 } while((last_unitid != next_unitid) && (next_unitid <= (max_devfn >> 3)));
485 if(bus->reset_needed) {
486 printk_info("HyperT reset needed\n");
489 printk_debug("HyperT reset not needed\n");
493 #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
494 if(offset_unitid && (ht_dev_num>0)) {
497 device_t last_func = 0;
498 flags = pci_read_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS);
500 flags |= HT_CHAIN_END_UNITID_BASE & 0x1f;
501 pci_write_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS, flags);
503 for(func = real_last_dev; func; func = func->sibling) {
504 func->path.u.pci.devfn -= ((real_last_unitid - HT_CHAIN_END_UNITID_BASE) << 3);
508 ht_unitid_base[ht_dev_num-1] = HT_CHAIN_END_UNITID_BASE; // update last one
510 next_unitid = real_last_unitid;
514 if (next_unitid > 0x1f) {
518 /* Die if any leftover Static devices are are found.
519 * There's probably a problem in the Config.lb.
523 for(left = old_devices; left; left = left->sibling) {
524 printk_debug("%s\n", dev_path(left));
526 printk_err("HT: Left over static devices. Check your Config.lb\n");
527 if(last_func && !last_func->sibling) // put back the left over static device, and let pci_scan_bus disable it
528 last_func->sibling = old_devices;
531 /* Now that nothing is overlapping it is safe to scan the
534 max = pci_scan_bus(bus, 0x00, (next_unitid << 3)|7, max);
539 * @brief Scan a PCI bridge and the buses behind the bridge.
541 * Determine the existence of buses behind the bridge. Set up the bridge
542 * according to the result of the scan.
544 * This function is the default scan_bus() method for PCI bridge devices.
546 * @param dev pointer to the bridge device
547 * @param max the highest bus number assgined up to now
549 * @return The maximum bus number found, after scanning all subordinate busses
551 unsigned int ht_scan_bridge(struct device *dev, unsigned int max)
553 return do_pci_scan_bridge(dev, max, hypertransport_scan_chain);
557 /** Default device operations for hypertransport bridges */
558 static struct pci_operations ht_bus_ops_pci = {
562 struct device_operations default_ht_ops_bus = {
563 .read_resources = pci_bus_read_resources,
564 .set_resources = pci_dev_set_resources,
565 .enable_resources = pci_bus_enable_resources,
567 .scan_bus = ht_scan_bridge,
569 .reset_bus = pci_bus_reset,
570 .ops_pci = &ht_bus_ops_pci,