- Minor bugfixes
[coreboot.git] / src / devices / hypertransport.c
1 #include <bitops.h>
2 #include <console/console.h>
3 #include <device/device.h>
4 #include <device/path.h>
5 #include <device/pci.h>
6 #include <device/hypertransport.h>
7 #include <device/chip.h>
8 #include <part/hard_reset.h>
9 #include <part/fallback_boot.h>
10
11 static device_t ht_scan_get_devs(device_t *old_devices)
12 {
13         device_t first, last;
14         first = *old_devices;
15         last = first;
16         while(last && last->sibling && 
17                 (last->sibling->path.type == DEVICE_PATH_PCI) &&
18                 (last->sibling->path.u.pci.devfn > last->path.u.pci.devfn)) {
19                 last = last->sibling;
20         }
21         if (first) {
22                 *old_devices = last->sibling;
23                 last->sibling = 0;
24         }
25         return first;
26 }
27
28
29 struct prev_link {
30         struct device *dev;
31         unsigned pos;
32         unsigned char config_off, freq_off, freq_cap_off;
33 };
34
35 static int ht_setup_link(struct prev_link *prev, device_t dev, unsigned pos)
36 {
37         static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
38         static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
39         unsigned present_width_cap,    upstream_width_cap;
40         unsigned present_freq_cap,     upstream_freq_cap;
41         unsigned ln_present_width_in,  ln_upstream_width_in; 
42         unsigned ln_present_width_out, ln_upstream_width_out;
43         unsigned freq, old_freq;
44         unsigned present_width, upstream_width, old_width;
45         int reset_needed;
46
47         /* Set the hypertransport link width and frequency */
48         reset_needed = 0;
49
50         /* Read the capabilities */
51         present_freq_cap   = pci_read_config16(dev, pos + PCI_HT_CAP_SLAVE_FREQ_CAP0);
52         upstream_freq_cap  = pci_read_config16(prev->dev, prev->pos + prev->freq_cap_off);
53         present_width_cap  = pci_read_config8(dev, pos + PCI_HT_CAP_SLAVE_WIDTH0);
54         upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
55         
56         /* Calculate the highest useable frequency */
57 #if 0
58         freq = log2(present_freq_cap & upstream_freq_cap);
59 #else
60         /* Errata for 8131 - freq 5 has hardware problems don't support it */
61         freq = log2(present_freq_cap & upstream_freq_cap & 0x1f);
62 #endif
63
64         /* Calculate the highest width */
65         ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
66         ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
67         if (ln_upstream_width_in > ln_present_width_out) {
68                 ln_upstream_width_in = ln_present_width_out;
69         }
70         upstream_width = pow2_to_link_width[ln_upstream_width_in];
71         present_width  = pow2_to_link_width[ln_upstream_width_in] << 4;
72
73         ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7];
74         ln_present_width_in   = link_width_to_pow2[present_width_cap & 7];
75         if (ln_upstream_width_out > ln_present_width_in) {
76                 ln_upstream_width_out = ln_present_width_in;
77         }
78         upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
79         present_width  |= pow2_to_link_width[ln_upstream_width_out];
80
81         /* Set the current device */
82         old_freq = pci_read_config8(dev, pos + PCI_HT_CAP_SLAVE_FREQ0);
83         if (freq != old_freq) {
84                 pci_write_config8(dev, pos + PCI_HT_CAP_SLAVE_FREQ0, freq);
85                 reset_needed = 1;
86                 printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq);
87         }
88         old_width = pci_read_config8(dev, pos + PCI_HT_CAP_SLAVE_WIDTH0 + 1);
89         if (present_width != old_width) {
90                 pci_write_config8(dev, pos + PCI_HT_CAP_SLAVE_WIDTH0 + 1, present_width);
91                 reset_needed = 1;
92                 printk_spew("HyperT widthP old %x new %x\n",old_width, present_width);
93         }
94
95         /* Set the upstream device */
96         old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
97         old_freq &= 0x0f;
98         if (freq != old_freq) {
99                 pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
100                 reset_needed = 1;
101                 printk_spew("HyperT freqU old %x new %x\n", old_freq, freq);
102         }
103         old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
104         if (upstream_width != old_width) {
105                 pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
106                 reset_needed = 1;
107                 printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width);
108         }
109         
110         /* Remember the current link as the previous link */
111         prev->dev = dev;
112         prev->pos = pos;
113         prev->config_off   = PCI_HT_CAP_SLAVE_WIDTH1;
114         prev->freq_off     = PCI_HT_CAP_SLAVE_FREQ1;
115         prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
116
117         return reset_needed;
118                 
119 }
120
121 static unsigned ht_lookup_slave_capability(struct device *dev)
122 {
123         unsigned pos;
124         pos = 0;
125         switch(dev->hdr_type & 0x7f) {
126         case PCI_HEADER_TYPE_NORMAL:
127         case PCI_HEADER_TYPE_BRIDGE:
128                 pos = PCI_CAPABILITY_LIST;
129                 break;
130         }
131         if (pos > PCI_CAP_LIST_NEXT) {
132                 pos = pci_read_config8(dev, pos);
133         }
134         while(pos != 0) {   /* loop through the linked list */
135                 uint8_t cap;
136                 cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID);
137                 printk_spew("Capability: 0x%02x @ 0x%02x\n", cap, pos);
138                 if (cap == PCI_CAP_ID_HT) {
139                         unsigned flags;
140                         flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
141                         printk_spew("flags: 0x%04x\n", (unsigned)flags);
142                         if ((flags >> 13) == 0) {
143                                 /* Entry is a Slave secondary, success...*/
144                                 break;
145                         }
146                 }
147                 if(pos) {
148                         pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT);
149                 }
150         }
151         return pos;
152 }
153
154 static void ht_collapse_early_enumeration(struct bus *bus)
155 {
156         unsigned int devfn;
157
158         /* Spin through the devices and collapse any early
159          * hypertransport enumeration.
160          */
161         for(devfn = 0; devfn <= 0xff; devfn += 8) {
162                 struct device dummy;
163                 uint32_t id;
164                 unsigned pos, flags;
165                 dummy.bus              = bus;
166                 dummy.path.type        = DEVICE_PATH_PCI;
167                 dummy.path.u.pci.devfn = devfn;
168                 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
169                 if (id == 0xffffffff || id == 0x00000000 || 
170                         id == 0x0000ffff || id == 0xffff0000) {
171                         continue;
172                 }
173                 dummy.vendor = id & 0xffff;
174                 dummy.device = (id >> 16) & 0xffff;
175                 dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
176                 pos = ht_lookup_slave_capability(&dummy);
177                 if (!pos){
178                         continue;
179                 }
180
181                 /* Clear the unitid */
182                 flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
183                 flags &= ~0x1f;
184                 pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
185                 printk_spew("Collapsing %s [%04x/%04x]\n", 
186                         dev_path(&dummy), dummy.vendor, dummy.device);
187         }
188 }
189
190 unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max)
191 {
192         unsigned next_unitid, last_unitid, previous_unitid;
193         uint8_t previous_pos;
194         device_t old_devices, dev, func, *chain_last;
195         unsigned min_unitid = 1;
196         int reset_needed;
197         struct prev_link prev;
198
199         /* Restore the hypertransport chain to it's unitialized state */
200         ht_collapse_early_enumeration(bus);
201
202         /* See which static device nodes I have */
203         old_devices = bus->children;
204         bus->children = 0;
205         chain_last = &bus->children;
206
207         /* Initialize the hypertransport enumeration state */
208         reset_needed = 0;
209         prev.dev = bus->dev;
210         prev.pos = bus->cap;
211         prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
212         prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
213         prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
214         
215         /* If present assign unitid to a hypertransport chain */
216         last_unitid = min_unitid -1;
217         next_unitid = min_unitid;
218         previous_pos = 0;
219         do {
220                 uint32_t id, class;
221                 uint8_t hdr_type, pos;
222                 uint16_t flags;
223                 unsigned count, static_count;
224
225                 previous_unitid = last_unitid;
226                 last_unitid = next_unitid;
227
228                 /* Get setup the device_structure */
229                 dev = ht_scan_get_devs(&old_devices);
230
231                 if (!dev) {
232                         struct device dummy;
233                         dummy.bus              = bus;
234                         dummy.path.type        = DEVICE_PATH_PCI;
235                         dummy.path.u.pci.devfn = 0;
236                         id = pci_read_config32(&dummy, PCI_VENDOR_ID);
237                         /* If the chain is fully enumerated quit */
238                         if (id == 0xffffffff || id == 0x00000000 ||
239                                 id == 0x0000ffff || id == 0xffff0000) {
240                                 break;
241                         }
242                         dev = alloc_dev(bus, &dummy.path);
243                 }
244                 else {
245                         /* Add this device to the pci bus chain */
246                         *chain_last = dev;
247                         /* Run the magice enable/disable sequence for the device */
248                         if (dev->chip && dev->chip->control && dev->chip->control->enable_dev) {
249                                 dev->chip->control->enable_dev(dev);
250                         }
251                         /* Now read the vendor and device id */
252                         id = pci_read_config32(dev, PCI_VENDOR_ID);
253
254                         /* If the chain is fully enumerated quit */
255                         if (id == 0xffffffff || id == 0x00000000 ||
256                                 id == 0x0000ffff || id == 0xffff0000) {
257                                 printk_err("Missing static device: %s\n",
258                                         dev_path(dev));
259                                 break;
260                         }
261                 }
262                 /* Update the device chain tail */
263                 for(func = dev; func; func = func->sibling) {
264                         chain_last = &func->sibling;
265                 }
266                 
267                 /* Read the rest of the pci configuration information */
268                 hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
269                 class = pci_read_config32(dev, PCI_CLASS_REVISION);
270                 
271                 /* Store the interesting information in the device structure */
272                 dev->vendor = id & 0xffff;
273                 dev->device = (id >> 16) & 0xffff;
274                 dev->hdr_type = hdr_type;
275                 /* class code, the upper 3 bytes of PCI_CLASS_REVISION */
276                 dev->class = class >> 8;
277
278                 /* Find the hypertransport link capability */
279                 pos = ht_lookup_slave_capability(dev);
280                 if (pos == 0) {
281                         printk_err("%s Hypertransport link capability not found", 
282                                 dev_path(dev));
283                         break;
284                 }
285                 
286                 /* Update the Unitid of the current device */
287                 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
288                 flags &= ~0x1f; /* mask out base Unit ID */
289                 flags |= next_unitid & 0x1f;
290                 pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
291
292                 /* Update the Unitd id in the device structure */
293                 static_count = 1;
294                 for(func = dev; func; func = func->sibling) {
295                         func->path.u.pci.devfn += (next_unitid << 3);
296                         static_count = (func->path.u.pci.devfn >> 3) 
297                                 - (dev->path.u.pci.devfn >> 3) + 1;
298                 }
299
300                 /* Compute the number of unitids consumed */
301                 count = (flags >> 5) & 0x1f; /* get unit count */
302                 printk_spew("%s count: %04x static_count: %04x\n", 
303                         dev_path(dev), count, static_count);
304                 if (count < static_count) {
305                         count = static_count;
306                 }
307
308                 /* Update the Unitid of the next device */
309                 next_unitid += count;
310
311                 /* Setup the hypetransport link */
312                 reset_needed |= ht_setup_link(&prev, dev, pos);
313
314                 printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",
315                         dev_path(dev),
316                         dev->vendor, dev->device, 
317                         (dev->enable? "enabled": "disabled"), next_unitid);
318
319         } while((last_unitid != next_unitid) && (next_unitid <= 0x1f));
320 #if HAVE_HARD_RESET == 1
321         if(reset_needed) {
322                 printk_info("HyperT reset needed\n");
323                 hard_reset();
324         }
325         printk_debug("HyperT reset not needed\n");
326 #endif
327         if (next_unitid > 0x1f) {
328                 next_unitid = 0x1f;
329         }
330         return pci_scan_bus(bus, 0x00, (next_unitid << 3)|7, max);
331 }