src/devices/hypertransport.c

   1 #include <bitops.h>
   2 #include <console/console.h>
   3 #include <device/device.h>
   4 #include <device/path.h>
   5 #include <device/pci.h>
   6 #include <device/pci_ids.h>
   7 #include <device/hypertransport.h>
   8 #include <part/hard_reset.h>
   9 #include <part/fallback_boot.h>
  10
  11 #define OPT_HT_LINK 0
  12
  13 static device_t ht_scan_get_devs(device_t *old_devices)
  14 {
  15         device_t first, last;
  16         first = *old_devices;
  17         last = first;
  18         while(last && last->sibling &&
  19                 (last->sibling->path.type == DEVICE_PATH_PCI) &&
  20                 (last->sibling->path.u.pci.devfn > last->path.u.pci.devfn)) {
  21                 last = last->sibling;
  22         }
  23         if (first) {
  24                 *old_devices = last->sibling;
  25                 last->sibling = 0;
  26         }
  27         return first;
  28 }
  29 #if OPT_HT_LINK == 1
  30 static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
  31 {
  32         /* Handle bugs in valid hypertransport frequency reporting */
  33         unsigned freq_cap;
  34
  35         freq_cap = pci_read_config16(dev, pos);
  36         freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
  37
  38         /* AMD 8131 Errata 48 */
  39         if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
  40                 (dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
  41                 freq_cap &= ~(1 << HT_FREQ_800Mhz);
  42         } else
  43         /* AMD 8151 Errata 23 */
  44         if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
  45                 (dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
  46                 freq_cap &= ~(1 << HT_FREQ_800Mhz);
  47         } else
  48         /* AMD K8 Unsupported 1Ghz? */
  49         if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
  50                         freq_cap &= ~(1 << HT_FREQ_1000Mhz);
  51         }
  52         return freq_cap;
  53 }
  54
  55 struct prev_link {
  56         struct device *dev;
  57         unsigned pos;
  58         unsigned char config_off, freq_off, freq_cap_off;
  59 };
  60
  61 static int ht_setup_link(struct prev_link *prev, device_t dev, unsigned pos)
  62 {
  63         static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
  64         static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
  65         unsigned present_width_cap,    upstream_width_cap;
  66         unsigned present_freq_cap,     upstream_freq_cap;
  67         unsigned ln_present_width_in,  ln_upstream_width_in;
  68         unsigned ln_present_width_out, ln_upstream_width_out;
  69         unsigned freq, old_freq;
  70         unsigned present_width, upstream_width, old_width;
  71         int reset_needed;
  72         int linkb_to_host;
  73
  74         /* Set the hypertransport link width and frequency */
  75         reset_needed = 0;
  76         linkb_to_host = (pci_read_config16(dev, pos + PCI_CAP_FLAGS) >> 10) & 1;
  77
  78         /* Read the capabilities */
  79         present_freq_cap   = ht_read_freq_cap(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_FREQ_CAP1: PCI_HT_CAP_SLAVE_FREQ_CAP0));
  80         upstream_freq_cap  = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
  81         present_width_cap  = pci_read_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_WIDTH1: PCI_HT_CAP_SLAVE_WIDTH0));
  82         upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
  83
  84         /* Calculate the highest useable frequency */
  85         freq = log2(present_freq_cap & upstream_freq_cap);
  86
  87         /* Calculate the highest width */
  88         ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
  89         ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
  90         if (ln_upstream_width_in > ln_present_width_out) {
  91                 ln_upstream_width_in = ln_present_width_out;
  92         }
  93         upstream_width = pow2_to_link_width[ln_upstream_width_in];
  94         present_width  = pow2_to_link_width[ln_upstream_width_in] << 4;
  95
  96         ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7];
  97         ln_present_width_in   = link_width_to_pow2[present_width_cap & 7];
  98         if (ln_upstream_width_out > ln_present_width_in) {
  99                 ln_upstream_width_out = ln_present_width_in;
 100         }
 101         upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
 102         present_width  |= pow2_to_link_width[ln_upstream_width_out];
 103
 104         /* Set the current device */
 105         old_freq = pci_read_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_FREQ1:PCI_HT_CAP_SLAVE_FREQ0));
 106         if (freq != old_freq) {
 107                 pci_write_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_FREQ1:PCI_HT_CAP_SLAVE_FREQ0), freq);
 108                 reset_needed = 1;
 109                 printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq);
 110         }
 111         old_width = pci_read_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_WIDTH1: PCI_HT_CAP_SLAVE_WIDTH0) + 1);
 112         if (present_width != old_width) {
 113                 pci_write_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_WIDTH1: PCI_HT_CAP_SLAVE_WIDTH0) + 1, present_width);
 114                 reset_needed = 1;
 115                 printk_spew("HyperT widthP old %x new %x\n",old_width, present_width);
 116         }
 117
 118         /* Set the upstream device */
 119         old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
 120         old_freq &= 0x0f;
 121         if (freq != old_freq) {
 122                 pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
 123                 reset_needed = 1;
 124                 printk_spew("HyperT freqU old %x new %x\n", old_freq, freq);
 125         }
 126         old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
 127         if (upstream_width != old_width) {
 128                 pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
 129                 reset_needed = 1;
 130                 printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width);
 131         }
 132
 133         /* Remember the current link as the previous link */
 134         prev->dev = dev;
 135         prev->pos = pos;
 136         if(linkb_to_host) {
 137                 prev->config_off   = PCI_HT_CAP_SLAVE_WIDTH0;
 138                 prev->freq_off     = PCI_HT_CAP_SLAVE_FREQ0;
 139                 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
 140         }
 141         else {
 142                 prev->config_off   = PCI_HT_CAP_SLAVE_WIDTH1;
 143                 prev->freq_off     = PCI_HT_CAP_SLAVE_FREQ1;
 144                 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
 145         }
 146
 147         return reset_needed;
 148
 149 }
 150 #endif
 151
 152 static unsigned ht_lookup_slave_capability(struct device *dev)
 153 {
 154         unsigned pos;
 155         pos = 0;
 156         switch(dev->hdr_type & 0x7f) {
 157         case PCI_HEADER_TYPE_NORMAL:
 158         case PCI_HEADER_TYPE_BRIDGE:
 159                 pos = PCI_CAPABILITY_LIST;
 160                 break;
 161         }
 162         if (pos > PCI_CAP_LIST_NEXT) {
 163                 pos = pci_read_config8(dev, pos);
 164         }
 165         while(pos != 0) {   /* loop through the linked list */
 166                 uint8_t cap;
 167                 cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID);
 168                 printk_spew("Capability: 0x%02x @ 0x%02x\n", cap, pos);
 169                 if (cap == PCI_CAP_ID_HT) {
 170                         unsigned flags;
 171                         flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
 172                         printk_spew("flags: 0x%04x\n", (unsigned)flags);
 173                         if ((flags >> 13) == 0) {
 174                                 /* Entry is a Slave secondary, success...*/
 175                                 break;
 176                         }
 177                 }
 178                 pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT);
 179         }
 180         return pos;
 181 }
 182
 183 static void ht_collapse_early_enumeration(struct bus *bus)
 184 {
 185         unsigned int devfn;
 186
 187         /* Spin through the devices and collapse any early
 188          * hypertransport enumeration.
 189          */
 190         for(devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
 191                 struct device dummy;
 192                 uint32_t id;
 193                 unsigned pos, flags;
 194                 dummy.bus              = bus;
 195                 dummy.path.type        = DEVICE_PATH_PCI;
 196                 dummy.path.u.pci.devfn = devfn;
 197                 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
 198                 if (id == 0xffffffff || id == 0x00000000 ||
 199                         id == 0x0000ffff || id == 0xffff0000) {
 200                         continue;
 201                 }
 202
 203 #if 0
 204 #if CK804_DEVN_BASE==0
 205                 //CK804 workaround:
 206                 // CK804 UnitID changes not use
 207                 if(id == 0x005e10de) {
 208                         break;
 209                 }
 210 #endif
 211 #endif
 212
 213                 dummy.vendor = id & 0xffff;
 214                 dummy.device = (id >> 16) & 0xffff;
 215                 dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
 216                 pos = ht_lookup_slave_capability(&dummy);
 217                 if (!pos){
 218                         continue;
 219                 }
 220
 221                 /* Clear the unitid */
 222                 flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
 223                 flags &= ~0x1f;
 224                 pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
 225                 printk_spew("Collapsing %s [%04x/%04x]\n",
 226                         dev_path(&dummy), dummy.vendor, dummy.device);
 227         }
 228 }
 229
 230 unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max)
 231 {
 232         unsigned next_unitid, last_unitid, previous_unitid;
 233         device_t old_devices, dev, func, *chain_last;
 234         unsigned min_unitid = 1;
 235 #if OPT_HT_LINK == 1
 236         int reset_needed;
 237         struct prev_link prev;
 238 #endif
 239
 240         /* Restore the hypertransport chain to it's unitialized state */
 241         ht_collapse_early_enumeration(bus);
 242
 243         /* See which static device nodes I have */
 244         old_devices = bus->children;
 245         bus->children = 0;
 246         chain_last = &bus->children;
 247
 248         /* Initialize the hypertransport enumeration state */
 249 #if OPT_HT_LINK == 1
 250         reset_needed = 0;
 251         prev.dev = bus->dev;
 252         prev.pos = bus->cap;
 253         prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
 254         prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
 255         prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
 256 #endif
 257
 258         /* If present assign unitid to a hypertransport chain */
 259         last_unitid = min_unitid -1;
 260         next_unitid = min_unitid;
 261         do {
 262                 uint32_t id, class;
 263                 uint8_t hdr_type;
 264                 unsigned pos;
 265                 uint16_t flags;
 266                 unsigned count, static_count;
 267
 268                 previous_unitid = last_unitid;
 269                 last_unitid = next_unitid;
 270
 271                 /* Get setup the device_structure */
 272                 dev = ht_scan_get_devs(&old_devices);
 273
 274                 if (!dev) {
 275                         struct device dummy;
 276                         dummy.bus              = bus;
 277                         dummy.path.type        = DEVICE_PATH_PCI;
 278                         dummy.path.u.pci.devfn = 0;
 279                         id = pci_read_config32(&dummy, PCI_VENDOR_ID);
 280                         /* If the chain is fully enumerated quit */
 281                         if (id == 0xffffffff || id == 0x00000000 ||
 282                                 id == 0x0000ffff || id == 0xffff0000) {
 283                                 break;
 284                         }
 285                         dev = alloc_dev(bus, &dummy.path);
 286                 }
 287                 else {
 288                         /* Add this device to the pci bus chain */
 289                         *chain_last = dev;
 290                         /* Run the magice enable sequence for the device */
 291                         if (dev->chip_ops && dev->chip_ops->enable_dev) {
 292                                 dev->chip_ops->enable_dev(dev);
 293                         }
 294                         /* Now read the vendor and device id */
 295                         id = pci_read_config32(dev, PCI_VENDOR_ID);
 296
 297                         /* If the chain is fully enumerated quit */
 298                         if (id == 0xffffffff || id == 0x00000000 ||
 299                                 id == 0x0000ffff || id == 0xffff0000) {
 300                                        if (dev->enabled) {
 301                                                printk_info("Disabling static device: %s\n",
 302                                                        dev_path(dev));
 303                                                dev->enabled = 0;
 304                                 }
 305                                 break;
 306                         }
 307                 }
 308                 /* Update the device chain tail */
 309                 for(func = dev; func; func = func->sibling) {
 310                         chain_last = &func->sibling;
 311                 }
 312
 313                 /* Find the hypertransport link capability */
 314                 pos = ht_lookup_slave_capability(dev);
 315                 if (pos == 0) {
 316                         printk_err("%s Hypertransport link capability not found",
 317                                 dev_path(dev));
 318                         break;
 319                 }
 320
 321
 322                 /* Update the Unitid of the current device */
 323                 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
 324                 flags &= ~0x1f; /* mask out base Unit ID */
 325 #if CK804_DEVN_BASE==0
 326                 if(id == 0x005e10de) {
 327                         next_unitid = 0;
 328                 }
 329                 else {
 330 #endif
 331                         flags |= next_unitid & 0x1f;
 332                         pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
 333 #if CK804_DEVN_BASE==0
 334                 }
 335 #endif
 336
 337                 /* Update the Unitd id in the device structure */
 338                 static_count = 1;
 339                 for(func = dev; func; func = func->sibling) {
 340                         func->path.u.pci.devfn += (next_unitid << 3);
 341                         static_count = (func->path.u.pci.devfn >> 3)
 342                                 - (dev->path.u.pci.devfn >> 3) + 1;
 343                 }
 344
 345                 /* Read the rest of the pci configuration information */
 346                 hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
 347                 class = pci_read_config32(dev, PCI_CLASS_REVISION);
 348
 349                 /* Store the interesting information in the device structure */
 350                 dev->vendor = id & 0xffff;
 351                 dev->device = (id >> 16) & 0xffff;
 352                 dev->hdr_type = hdr_type;
 353                 /* class code, the upper 3 bytes of PCI_CLASS_REVISION */
 354                 dev->class = class >> 8;
 355
 356                 /* Compute the number of unitids consumed */
 357                 count = (flags >> 5) & 0x1f; /* get unit count */
 358                 printk_spew("%s count: %04x static_count: %04x\n",
 359                         dev_path(dev), count, static_count);
 360                 if (count < static_count) {
 361                         count = static_count;
 362                 }
 363
 364                 /* Update the Unitid of the next device */
 365                 next_unitid += count;
 366
 367 #if OPT_HT_LINK == 1
 368                 /* Setup the hypetransport link */
 369                 reset_needed |= ht_setup_link(&prev, dev, pos);
 370 #endif
 371
 372                 printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",
 373                         dev_path(dev),
 374                         dev->vendor, dev->device,
 375                         (dev->enabled? "enabled": "disabled"), next_unitid);
 376 #if CK804_DEVN_BASE==0
 377                 if(id == 0x005e10de) {
 378                         break; // CK804 can not change unitid, so it only can be alone in the link
 379                 }
 380 #endif
 381
 382         } while((last_unitid != next_unitid) && (next_unitid <= 0x1f));
 383
 384 #if OPT_HT_LINK == 1
 385 #if HAVE_HARD_RESET == 1
 386         if(reset_needed) {
 387                 printk_info("HyperT reset needed\n");
 388                 hard_reset();
 389         }
 390         else {
 391                 printk_debug("HyperT reset not needed\n");
 392         }
 393 #endif
 394 #endif
 395         if (next_unitid > 0x1f) {
 396                 next_unitid = 0x1f;
 397         }
 398         return pci_scan_bus(bus, 0x00, (next_unitid << 3)|7, max);
 399 }