src/devices/hypertransport.c

   1 #include <bitops.h>
   2 #include <console/console.h>
   3 #include <device/device.h>
   4 #include <device/path.h>
   5 #include <device/pci.h>
   6 #include <device/pci_ids.h>
   7 #include <device/hypertransport.h>
   8 #include <part/hard_reset.h>
   9 #include <part/fallback_boot.h>
  10
  11 static device_t ht_scan_get_devs(device_t *old_devices)
  12 {
  13         device_t first, last;
  14         first = *old_devices;
  15         last = first;
  16         while(last && last->sibling &&
  17                 (last->sibling->path.type == DEVICE_PATH_PCI) &&
  18                 (last->sibling->path.u.pci.devfn > last->path.u.pci.devfn)) {
  19                 last = last->sibling;
  20         }
  21         if (first) {
  22                 *old_devices = last->sibling;
  23                 last->sibling = 0;
  24         }
  25         return first;
  26 }
  27
  28 static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
  29 {
  30         /* Handle bugs in valid hypertransport frequency reporting */
  31         unsigned freq_cap;
  32
  33         freq_cap = pci_read_config16(dev, pos);
  34         freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
  35
  36         /* AMD 8131 Errata 48 */
  37         if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
  38                 (dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
  39                 freq_cap &= ~(1 << HT_FREQ_800Mhz);
  40         }
  41         /* AMD 8151 Errata 23 */
  42         if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
  43                 (dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
  44                 freq_cap &= ~(1 << HT_FREQ_800Mhz);
  45         }
  46         /* AMD K8 Unsupported 1Ghz? */
  47         if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
  48                 freq_cap &= ~(1 << HT_FREQ_1000Mhz);
  49         }
  50         return freq_cap;
  51 }
  52
  53 struct prev_link {
  54         struct device *dev;
  55         unsigned pos;
  56         unsigned char config_off, freq_off, freq_cap_off;
  57 };
  58
  59 static int ht_setup_link(struct prev_link *prev, device_t dev, unsigned pos)
  60 {
  61         static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
  62         static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
  63         unsigned present_width_cap,    upstream_width_cap;
  64         unsigned present_freq_cap,     upstream_freq_cap;
  65         unsigned ln_present_width_in,  ln_upstream_width_in;
  66         unsigned ln_present_width_out, ln_upstream_width_out;
  67         unsigned freq, old_freq;
  68         unsigned present_width, upstream_width, old_width;
  69         int reset_needed;
  70         int linkb_to_host;
  71
  72         /* Set the hypertransport link width and frequency */
  73         reset_needed = 0;
  74         linkb_to_host = pci_read_config16(dev, pos + PCI_CAP_FLAGS) & (1<<10);
  75
  76         /* Read the capabilities */
  77         present_freq_cap   = ht_read_freq_cap(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_FREQ_CAP1: PCI_HT_CAP_SLAVE_FREQ_CAP0));
  78         upstream_freq_cap  = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
  79         present_width_cap  = pci_read_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_WIDTH1: PCI_HT_CAP_SLAVE_WIDTH0));
  80         upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
  81
  82         /* Calculate the highest useable frequency */
  83         freq = log2(present_freq_cap & upstream_freq_cap);
  84
  85         /* Calculate the highest width */
  86         ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
  87         ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
  88         if (ln_upstream_width_in > ln_present_width_out) {
  89                 ln_upstream_width_in = ln_present_width_out;
  90         }
  91         upstream_width = pow2_to_link_width[ln_upstream_width_in];
  92         present_width  = pow2_to_link_width[ln_upstream_width_in] << 4;
  93
  94         ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7];
  95         ln_present_width_in   = link_width_to_pow2[present_width_cap & 7];
  96         if (ln_upstream_width_out > ln_present_width_in) {
  97                 ln_upstream_width_out = ln_present_width_in;
  98         }
  99         upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
 100         present_width  |= pow2_to_link_width[ln_upstream_width_out];
 101
 102         /* Set the current device */
 103         old_freq = pci_read_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_FREQ1:PCI_HT_CAP_SLAVE_FREQ0));
 104         if (freq != old_freq) {
 105                 pci_write_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_FREQ1:PCI_HT_CAP_SLAVE_FREQ0), freq);
 106                 reset_needed = 1;
 107                 printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq);
 108         }
 109         old_width = pci_read_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_WIDTH1: PCI_HT_CAP_SLAVE_WIDTH0) + 1);
 110         if (present_width != old_width) {
 111                 pci_write_config8(dev, pos + (linkb_to_host ? PCI_HT_CAP_SLAVE_WIDTH1: PCI_HT_CAP_SLAVE_WIDTH0) + 1, present_width);
 112                 reset_needed = 1;
 113                 printk_spew("HyperT widthP old %x new %x\n",old_width, present_width);
 114         }
 115
 116         /* Set the upstream device */
 117         old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
 118         old_freq &= 0x0f;
 119         if (freq != old_freq) {
 120                 pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
 121                 reset_needed = 1;
 122                 printk_spew("HyperT freqU old %x new %x\n", old_freq, freq);
 123         }
 124         old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
 125         if (upstream_width != old_width) {
 126                 pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
 127                 reset_needed = 1;
 128                 printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width);
 129         }
 130
 131         /* Remember the current link as the previous link */
 132         prev->dev = dev;
 133         prev->pos = pos;
 134         if(linkb_to_host) {
 135                 prev->config_off   = PCI_HT_CAP_SLAVE_WIDTH0;
 136                 prev->freq_off     = PCI_HT_CAP_SLAVE_FREQ0;
 137                 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
 138         }
 139         else {
 140                 prev->config_off   = PCI_HT_CAP_SLAVE_WIDTH1;
 141                 prev->freq_off     = PCI_HT_CAP_SLAVE_FREQ1;
 142                 prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
 143         }
 144
 145         return reset_needed;
 146
 147 }
 148
 149 static unsigned ht_lookup_slave_capability(struct device *dev)
 150 {
 151         unsigned pos;
 152         pos = 0;
 153         switch(dev->hdr_type & 0x7f) {
 154         case PCI_HEADER_TYPE_NORMAL:
 155         case PCI_HEADER_TYPE_BRIDGE:
 156                 pos = PCI_CAPABILITY_LIST;
 157                 break;
 158         }
 159         if (pos > PCI_CAP_LIST_NEXT) {
 160                 pos = pci_read_config8(dev, pos);
 161         }
 162         while(pos != 0) {   /* loop through the linked list */
 163                 uint8_t cap;
 164                 cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID);
 165                 printk_spew("Capability: 0x%02x @ 0x%02x\n", cap, pos);
 166                 if (cap == PCI_CAP_ID_HT) {
 167                         unsigned flags;
 168                         flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
 169                         printk_spew("flags: 0x%04x\n", (unsigned)flags);
 170                         if ((flags >> 13) == 0) {
 171                                 /* Entry is a Slave secondary, success...*/
 172                                 break;
 173                         }
 174                 }
 175                 pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT);
 176         }
 177         return pos;
 178 }
 179
 180 static void ht_collapse_early_enumeration(struct bus *bus)
 181 {
 182         unsigned int devfn;
 183
 184         /* Spin through the devices and collapse any early
 185          * hypertransport enumeration.
 186          */
 187         for(devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
 188                 struct device dummy;
 189                 uint32_t id;
 190                 unsigned pos, flags;
 191                 dummy.bus              = bus;
 192                 dummy.path.type        = DEVICE_PATH_PCI;
 193                 dummy.path.u.pci.devfn = devfn;
 194                 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
 195                 if (id == 0xffffffff || id == 0x00000000 ||
 196                         id == 0x0000ffff || id == 0xffff0000) {
 197                         continue;
 198                 }
 199
 200                 dummy.vendor = id & 0xffff;
 201                 dummy.device = (id >> 16) & 0xffff;
 202                 dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
 203                 pos = ht_lookup_slave_capability(&dummy);
 204                 if (!pos){
 205                         continue;
 206                 }
 207
 208                 /* Clear the unitid */
 209                 flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
 210                 flags &= ~0x1f;
 211                 pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
 212                 printk_spew("Collapsing %s [%04x/%04x]\n",
 213                         dev_path(&dummy), dummy.vendor, dummy.device);
 214         }
 215 }
 216
 217 unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max)
 218 {
 219         unsigned next_unitid, last_unitid, previous_unitid;
 220         uint8_t previous_pos;
 221         device_t old_devices, dev, func, *chain_last;
 222         unsigned min_unitid = 1;
 223         int reset_needed;
 224         struct prev_link prev;
 225
 226         /* Restore the hypertransport chain to it's unitialized state */
 227         ht_collapse_early_enumeration(bus);
 228
 229         /* See which static device nodes I have */
 230         old_devices = bus->children;
 231         bus->children = 0;
 232         chain_last = &bus->children;
 233
 234         /* Initialize the hypertransport enumeration state */
 235         reset_needed = 0;
 236         prev.dev = bus->dev;
 237         prev.pos = bus->cap;
 238         prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
 239         prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
 240         prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
 241
 242         /* If present assign unitid to a hypertransport chain */
 243         last_unitid = min_unitid -1;
 244         next_unitid = min_unitid;
 245         previous_pos = 0;
 246         do {
 247                 uint32_t id, class;
 248                 uint8_t hdr_type, pos;
 249                 uint16_t flags;
 250                 unsigned count, static_count;
 251
 252                 previous_unitid = last_unitid;
 253                 last_unitid = next_unitid;
 254
 255                 /* Get setup the device_structure */
 256                 dev = ht_scan_get_devs(&old_devices);
 257
 258                 if (!dev) {
 259                         struct device dummy;
 260                         dummy.bus              = bus;
 261                         dummy.path.type        = DEVICE_PATH_PCI;
 262                         dummy.path.u.pci.devfn = 0;
 263                         id = pci_read_config32(&dummy, PCI_VENDOR_ID);
 264                         /* If the chain is fully enumerated quit */
 265                         if (id == 0xffffffff || id == 0x00000000 ||
 266                                 id == 0x0000ffff || id == 0xffff0000) {
 267                                 break;
 268                         }
 269                         dev = alloc_dev(bus, &dummy.path);
 270                 }
 271                 else {
 272                         /* Add this device to the pci bus chain */
 273                         *chain_last = dev;
 274                         /* Run the magice enable sequence for the device */
 275                         if (dev->chip_ops && dev->chip_ops->enable_dev) {
 276                                 dev->chip_ops->enable_dev(dev);
 277                         }
 278                         /* Now read the vendor and device id */
 279                         id = pci_read_config32(dev, PCI_VENDOR_ID);
 280
 281                         /* If the chain is fully enumerated quit */
 282                         if (id == 0xffffffff || id == 0x00000000 ||
 283                                 id == 0x0000ffff || id == 0xffff0000) {
 284                                        if (dev->enabled) {
 285                                                printk_info("Disabling static device: %s\n",
 286                                                        dev_path(dev));
 287                                                dev->enabled = 0;
 288                                 }
 289                                 break;
 290                         }
 291                 }
 292                 /* Update the device chain tail */
 293                 for(func = dev; func; func = func->sibling) {
 294                         chain_last = &func->sibling;
 295                 }
 296
 297                 /* Read the rest of the pci configuration information */
 298                 hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
 299                 class = pci_read_config32(dev, PCI_CLASS_REVISION);
 300
 301                 /* Store the interesting information in the device structure */
 302                 dev->vendor = id & 0xffff;
 303                 dev->device = (id >> 16) & 0xffff;
 304                 dev->hdr_type = hdr_type;
 305                 /* class code, the upper 3 bytes of PCI_CLASS_REVISION */
 306                 dev->class = class >> 8;
 307
 308                 /* Find the hypertransport link capability */
 309                 pos = ht_lookup_slave_capability(dev);
 310                 if (pos == 0) {
 311                         printk_err("%s Hypertransport link capability not found",
 312                                 dev_path(dev));
 313                         break;
 314                 }
 315
 316
 317                 /* Update the Unitid of the current device */
 318                 flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
 319                 flags &= ~0x1f; /* mask out base Unit ID */
 320                 flags |= next_unitid & 0x1f;
 321                 pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
 322
 323                 /* Update the Unitd id in the device structure */
 324                 static_count = 1;
 325                 for(func = dev; func; func = func->sibling) {
 326                         func->path.u.pci.devfn += (next_unitid << 3);
 327                         static_count = (func->path.u.pci.devfn >> 3)
 328                                 - (dev->path.u.pci.devfn >> 3) + 1;
 329                 }
 330
 331                 /* Compute the number of unitids consumed */
 332                 count = (flags >> 5) & 0x1f; /* get unit count */
 333                 printk_spew("%s count: %04x static_count: %04x\n",
 334                         dev_path(dev), count, static_count);
 335                 if (count < static_count) {
 336                         count = static_count;
 337                 }
 338
 339                 /* Update the Unitid of the next device */
 340                 next_unitid += count;
 341
 342                 /* Setup the hypetransport link */
 343                 reset_needed |= ht_setup_link(&prev, dev, pos);
 344
 345                 printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",
 346                         dev_path(dev),
 347                         dev->vendor, dev->device,
 348                         (dev->enabled? "enabled": "disabled"), next_unitid);
 349
 350         } while((last_unitid != next_unitid) && (next_unitid <= 0x1f));
 351 #if HAVE_HARD_RESET == 1
 352         if(reset_needed) {
 353                 printk_info("HyperT reset needed\n");
 354                 hard_reset();
 355         }
 356         else {
 357                 printk_debug("HyperT reset not needed\n");
 358         }
 359 #endif
 360         if (next_unitid > 0x1f) {
 361                 next_unitid = 0x1f;
 362         }
 363         return pci_scan_bus(bus, 0x00, (next_unitid << 3)|7, max);
 364 }