src/cpu/x86/smm/smihandler.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  19  * MA 02110-1301 USA
  20  */
  21
  22 #include <arch/io.h>
  23 #include <arch/romcc_io.h>
  24 #include <console/console.h>
  25 #include <cpu/x86/cache.h>
  26 #include <cpu/x86/smm.h>
  27
  28 void southbridge_smi_set_eos(void);
  29
  30 /* To enable SMI define DEBUG_SMI in smiutil.c */
  31
  32 typedef enum { SMI_LOCKED, SMI_UNLOCKED } smi_semaphore;
  33
  34 /* SMI multiprocessing semaphore */
  35 static volatile smi_semaphore smi_handler_status = SMI_UNLOCKED;
  36
  37 static int smi_obtain_lock(void)
  38 {
  39         u8 ret = SMI_LOCKED;
  40
  41         asm volatile (
  42                 "movb %2, %%al\n"
  43                 "xchgb %%al, %1\n"
  44                 "movb %%al, %0\n"
  45                 : "=g" (ret), "=m" (smi_handler_status)
  46                 : "g" (SMI_LOCKED)
  47                 : "eax"
  48         );
  49
  50         return (ret == SMI_UNLOCKED);
  51 }
  52
  53 static void smi_release_lock(void)
  54 {
  55         asm volatile (
  56                 "movb %1, %%al\n"
  57                 "xchgb %%al, %0\n"
  58                 : "=m" (smi_handler_status)
  59                 : "g" (SMI_UNLOCKED)
  60                 : "eax"
  61         );
  62 }
  63
  64 #define LAPIC_ID 0xfee00020
  65 static inline __attribute__((always_inline)) unsigned long nodeid(void)
  66 {
  67         return (*((volatile unsigned long *)(LAPIC_ID)) >> 24);
  68 }
  69
  70 void io_trap_handler(int smif)
  71 {
  72         /* If a handler function handled a given IO trap, it
  73          * shall return a non-zero value
  74          */
  75         printk_debug("SMI function trap 0x%x: ", smif);
  76
  77         if (southbridge_io_trap_handler(smif))
  78                 return;
  79
  80         if (mainboard_io_trap_handler(smif))
  81                 return;
  82
  83         printk_debug("Unknown function\n");
  84 }
  85
  86 /**
  87  * @brief Set the EOS bit
  88  */
  89 static void smi_set_eos(void)
  90 {
  91         southbridge_smi_set_eos();
  92 }
  93
  94 /**
  95  * @brief Interrupt handler for SMI#
  96  *
  97  * @param smm_revision revision of the smm state save map
  98  */
  99
 100 void smi_handler(u32 smm_revision)
 101 {
 102         unsigned int node;
 103         smm_state_save_area_t state_save;
 104
 105         /* Are we ok to execute the handler? */
 106         if (!smi_obtain_lock()) {
 107                 /* For security reasons we don't release the other CPUs
 108                  * until the CPU with the lock is actually done
 109                  */
 110                 while (smi_handler_status == SMI_LOCKED) /* wait */ ;
 111                 return;
 112         }
 113
 114         node=nodeid();
 115
 116         console_init();
 117
 118         printk_spew("\nSMI# #%d\n", node);
 119
 120         switch (smm_revision) {
 121         case 0x00030002:
 122         case 0x00030007:
 123                 state_save.type = LEGACY;
 124                 state_save.legacy_state_save = (legacy_smm_state_save_area_t *)
 125                         (0xa8000 + 0x7e00 - (node * 0x400));
 126                 break;
 127         case 0x00030100:
 128                 state_save.type = EM64T;
 129                 state_save.em64t_state_save = (em64t_smm_state_save_area_t *)
 130                         (0xa8000 + 0x7d00 - (node * 0x400));
 131                 break;
 132         case 0x00030064:
 133                 state_save.type = AMD64;
 134                 state_save.amd64_state_save = (amd64_smm_state_save_area_t *)
 135                         (0xa8000 + 0x7e00 - (node * 0x400));
 136                 break;
 137         default:
 138                 printk_debug("smm_revision: 0x%08x\n", smm_revision);
 139                 printk_debug("SMI# not supported on your CPU\n");
 140                 /* Don't release lock, so no further SMI will happen,
 141                  * if we don't handle it anyways.
 142                  */
 143                 return;
 144         }
 145
 146         /* Call chipset specific SMI handlers. This would be the place to
 147          * add a CPU or northbridge specific SMI handler, too
 148          */
 149         if (cpu_smi_handler)
 150                 cpu_smi_handler(node, &state_save);
 151         if (northbridge_smi_handler)
 152                 northbridge_smi_handler(node, &state_save);
 153         if (southbridge_smi_handler)
 154                 southbridge_smi_handler(node, &state_save);
 155
 156         smi_release_lock();
 157
 158         /* De-assert SMI# signal to allow another SMI */
 159         smi_set_eos();
 160 }