src/cpu/x86/smm/smihandler.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  19  * MA 02110-1301 USA
  20  */
  21
  22 #include <arch/io.h>
  23 #include <arch/romcc_io.h>
  24 #include <console/console.h>
  25 #include <cpu/x86/cache.h>
  26 #include <cpu/x86/smm.h>
  27
  28 void southbridge_smi_set_eos(void);
  29
  30 typedef enum { SMI_LOCKED, SMI_UNLOCKED } smi_semaphore;
  31
  32 /* SMI multiprocessing semaphore */
  33 static volatile smi_semaphore smi_handler_status = SMI_UNLOCKED;
  34
  35 static int smi_obtain_lock(void)
  36 {
  37         u8 ret = SMI_LOCKED;
  38
  39         asm volatile (
  40                 "movb %2, %%al\n"
  41                 "xchgb %%al, %1\n"
  42                 "movb %%al, %0\n"
  43                 : "=g" (ret), "=m" (smi_handler_status)
  44                 : "g" (SMI_LOCKED)
  45                 : "eax"
  46         );
  47
  48         return (ret == SMI_UNLOCKED);
  49 }
  50
  51 static void smi_release_lock(void)
  52 {
  53         asm volatile (
  54                 "movb %1, %%al\n"
  55                 "xchgb %%al, %0\n"
  56                 : "=m" (smi_handler_status)
  57                 : "g" (SMI_UNLOCKED)
  58                 : "eax"
  59         );
  60 }
  61
  62 #define LAPIC_ID 0xfee00020
  63 static inline __attribute__((always_inline)) unsigned long nodeid(void)
  64 {
  65         return (*((volatile unsigned long *)(LAPIC_ID)) >> 24);
  66 }
  67
  68 void io_trap_handler(int smif)
  69 {
  70         /* If a handler function handled a given IO trap, it
  71          * shall return a non-zero value
  72          */
  73         printk_debug("SMI function trap 0x%x: ", smif);
  74
  75         if (southbridge_io_trap_handler(smif))
  76                 return;
  77
  78         if (mainboard_io_trap_handler(smif))
  79                 return;
  80
  81         printk_debug("Unknown function\n");
  82 }
  83
  84 /**
  85  * @brief Set the EOS bit
  86  */
  87 static void smi_set_eos(void)
  88 {
  89         southbridge_smi_set_eos();
  90 }
  91
  92 /**
  93  * @brief Interrupt handler for SMI#
  94  *
  95  * @param smm_revision revision of the smm state save map
  96  */
  97
  98 void smi_handler(u32 smm_revision)
  99 {
 100         unsigned int node;
 101         smm_state_save_area_t state_save;
 102
 103         /* Are we ok to execute the handler? */
 104         if (!smi_obtain_lock()) {
 105                 /* For security reasons we don't release the other CPUs
 106                  * until the CPU with the lock is actually done
 107                  */
 108                 while (smi_handler_status == SMI_LOCKED) /* wait */ ;
 109                 return;
 110         }
 111
 112         node=nodeid();
 113
 114         console_init();
 115
 116         printk_spew("\nSMI# #%d\n", node);
 117
 118         switch (smm_revision) {
 119         case 0x00030002:
 120         case 0x00030007:
 121                 state_save.type = LEGACY;
 122                 state_save.legacy_state_save = (legacy_smm_state_save_area_t *)
 123                         (0xa8000 + 0x7e00 - (node * 0x400));
 124                 break;
 125         case 0x00030100:
 126                 state_save.type = EM64T;
 127                 state_save.em64t_state_save = (em64t_smm_state_save_area_t *)
 128                         (0xa8000 + 0x7d00 - (node * 0x400));
 129                 break;
 130         case 0x00030064:
 131                 state_save.type = AMD64;
 132                 state_save.amd64_state_save = (amd64_smm_state_save_area_t *)
 133                         (0xa8000 + 0x7e00 - (node * 0x400));
 134                 break;
 135         default:
 136                 printk_debug("smm_revision: 0x%08x\n", smm_revision);
 137                 printk_debug("SMI# not supported on your CPU\n");
 138                 /* Don't release lock, so no further SMI will happen,
 139                  * if we don't handle it anyways.
 140                  */
 141                 return;
 142         }
 143
 144         /* Call chipset specific SMI handlers. */
 145         if (cpu_smi_handler)
 146                 cpu_smi_handler(node, &state_save);
 147         if (northbridge_smi_handler)
 148                 northbridge_smi_handler(node, &state_save);
 149         if (southbridge_smi_handler)
 150                 southbridge_smi_handler(node, &state_save);
 151
 152         smi_release_lock();
 153
 154         /* De-assert SMI# signal to allow another SMI */
 155         smi_set_eos();
 156 }