2 * intel_mtrr.c: setting MTRR to decent values for cache initialization on P6
4 * Derived from intel_set_mtrr in intel_subr.c and mtrr.c in linux kernel
6 * Copyright 2000 Silicon Integrated System Corporation
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * Reference: Intel Architecture Software Developer's Manual, Volume 3: System Programming
26 2005.1 yhlu add NC support to spare mtrrs for 64G memory stored
29 #include <console/console.h>
30 #include <device/device.h>
31 #include <cpu/x86/msr.h>
32 #include <cpu/x86/mtrr.h>
33 #include <cpu/x86/cache.h>
35 #warning "FIXME I do not properly handle address more than 36 physical address bits"
41 # define ADDRESS_BITS 40
43 # define ADDRESS_BITS 36
45 #define ADDRESS_BITS_HIGH (ADDRESS_BITS - 32)
46 #define ADDRESS_MASK_HIGH ((1u << ADDRESS_BITS_HIGH) - 1)
48 static unsigned int mtrr_msr[] = {
49 MTRRfix64K_00000_MSR, MTRRfix16K_80000_MSR, MTRRfix16K_A0000_MSR,
50 MTRRfix4K_C0000_MSR, MTRRfix4K_C8000_MSR, MTRRfix4K_D0000_MSR, MTRRfix4K_D8000_MSR,
51 MTRRfix4K_E0000_MSR, MTRRfix4K_E8000_MSR, MTRRfix4K_F0000_MSR, MTRRfix4K_F8000_MSR,
55 static void enable_fixed_mtrr(void)
59 msr = rdmsr(MTRRdefType_MSR);
61 wrmsr(MTRRdefType_MSR, msr);
64 static void enable_var_mtrr(void)
68 msr = rdmsr(MTRRdefType_MSR);
70 wrmsr(MTRRdefType_MSR, msr);
73 /* setting variable mtrr, comes from linux kernel source */
74 static void set_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek, unsigned char type)
78 base.hi = basek >> 22;
79 base.lo = basek << 10;
81 //printk_debug("ADDRESS_MASK_HIGH=%#x\n", ADDRESS_MASK_HIGH);
83 if (sizek < 4*1024*1024) {
84 mask.hi = ADDRESS_MASK_HIGH;
85 mask.lo = ~((sizek << 10) -1);
88 mask.hi = ADDRESS_MASK_HIGH & (~((sizek >> 22) -1));
95 // it is recommended that we disable and enable cache when we
100 zero.lo = zero.hi = 0;
101 /* The invalid bit is kept in the mask, so we simply clear the
102 relevant mask register to disable a range. */
103 wrmsr (MTRRphysMask_MSR(reg), zero);
105 /* Bit 32-35 of MTRRphysMask should be set to 1 */
108 wrmsr (MTRRphysBase_MSR(reg), base);
109 wrmsr (MTRRphysMask_MSR(reg), mask);
114 /* fms: find most sigificant bit set, stolen from Linux Kernel Source. */
115 static inline unsigned int fms(unsigned int x)
119 __asm__("bsrl %1,%0\n\t"
122 "1:" : "=r" (r) : "g" (x));
126 /* fms: find least sigificant bit set */
127 static inline unsigned int fls(unsigned int x)
131 __asm__("bsfl %1,%0\n\t"
134 "1:" : "=r" (r) : "g" (x));
138 /* setting up variable and fixed mtrr
140 * From Intel Vol. III Section 9.12.4, the Range Size and Base Alignment has some kind of requirement:
141 * 1. The range size must be 2^N byte for N >= 12 (i.e 4KB minimum).
142 * 2. The base address must be 2^N aligned, where the N here is equal to the N in previous
143 * requirement. So a 8K range must be 8K aligned not 4K aligned.
145 * These requirement is meet by "decompositing" the ramsize into Sum(Cn * 2^n, n = [0..N], Cn = [0, 1]).
146 * For Cm = 1, there is a WB range of 2^m size at base address Sum(Cm * 2^m, m = [N..n]).
147 * A 124MB (128MB - 4MB SMA) example:
148 * ramsize = 124MB == 64MB (at 0MB) + 32MB (at 64MB) + 16MB (at 96MB ) + 8MB (at 112MB) + 4MB (120MB).
149 * But this wastes a lot of MTRR registers so we use another more "aggresive" way with Uncacheable Regions.
151 * In the Uncacheable Region scheme, we try to cover the whole ramsize by one WB region as possible,
152 * If (an only if) this can not be done we will try to decomposite the ramesize, the mathematical formula
153 * whould be ramsize = Sum(Cn * 2^n, n = [0..N], Cn = [-1, 0, 1]). For Cn = -1, a Uncachable Region is used.
154 * The same 124MB example:
155 * ramsize = 124MB == 128MB WB (at 0MB) + 4MB UC (at 124MB)
156 * or a 156MB (128MB + 32MB - 4MB SMA) example:
157 * ramsize = 156MB == 128MB WB (at 0MB) + 32MB WB (at 128MB) + 4MB UC (at 156MB)
159 /* 2 MTRRS are reserved for the operating system */
167 #define MTRRS (BIOS_MTRRS + OS_MTRRS)
170 static void set_fixed_mtrrs(unsigned int first, unsigned int last, unsigned char type)
173 unsigned int fixed_msr = NUM_FIXED_RANGES >> 3;
175 msr.lo = msr.hi = 0; /* Shut up gcc */
176 for(i = first; i < last; i++) {
177 /* When I switch to a new msr read it in */
178 if (fixed_msr != i >> 3) {
179 /* But first write out the old msr */
180 if (fixed_msr < (NUM_FIXED_RANGES >> 3)) {
182 wrmsr(mtrr_msr[fixed_msr], msr);
186 msr = rdmsr(mtrr_msr[fixed_msr]);
189 msr.lo &= ~(0xff << ((i&3)*8));
190 msr.lo |= type << ((i&3)*8);
192 msr.hi &= ~(0xff << ((i&3)*8));
193 msr.hi |= type << ((i&3)*8);
196 /* Write out the final msr */
197 if (fixed_msr < (NUM_FIXED_RANGES >> 3)) {
199 wrmsr(mtrr_msr[fixed_msr], msr);
204 static unsigned fixed_mtrr_index(unsigned long addrk)
207 index = (addrk - 0) >> 6;
209 index = ((addrk - 8*64) >> 4) + 8;
212 index = ((addrk - (8*64 + 16*16)) >> 2) + 24;
214 if (index > NUM_FIXED_RANGES) {
215 index = NUM_FIXED_RANGES;
220 static unsigned int range_to_mtrr(unsigned int reg,
221 unsigned long range_startk, unsigned long range_sizek,
222 unsigned long next_range_startk, unsigned char type)
224 if (!range_sizek || (reg >= BIOS_MTRRS)) {
228 unsigned long max_align, align;
230 /* Compute the maximum size I can make a range */
231 max_align = fls(range_startk);
232 align = fms(range_sizek);
233 if (align > max_align) {
237 printk_debug("Setting variable MTRR %d, base: %4dMB, range: %4dMB, type %s\n",
238 reg, range_startk >>10, sizek >> 10,
239 (type==MTRR_TYPE_UNCACHEABLE) ? "NC" :
240 ((type==MTRR_TYPE_WRBACK) ? "WB" : "Other")
242 set_var_mtrr(reg++, range_startk, sizek, type);
243 range_startk += sizek;
244 range_sizek -= sizek;
245 if (reg >= BIOS_MTRRS)
251 static unsigned long resk(uint64_t value)
253 unsigned long resultk;
254 if (value < (1ULL << 42)) {
255 resultk = value >> 10;
258 resultk = 0xffffffff;
263 static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resource *res)
265 unsigned int start_mtrr;
266 unsigned int last_mtrr;
267 start_mtrr = fixed_mtrr_index(resk(res->base));
268 last_mtrr = fixed_mtrr_index(resk((res->base + res->size)));
269 if (start_mtrr >= NUM_FIXED_RANGES) {
272 printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n",
273 start_mtrr, last_mtrr);
274 set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK);
278 struct var_mtrr_state {
279 unsigned long range_startk, range_sizek;
281 unsigned long hole_startk, hole_sizek;
284 void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res)
286 struct var_mtrr_state *state = gp;
287 unsigned long basek, sizek;
288 if (state->reg >= BIOS_MTRRS)
290 basek = resk(res->base);
291 sizek = resk(res->size);
292 /* See if I can merge with the last range
293 * Either I am below 1M and the fixed mtrrs handle it, or
296 if ((basek <= 1024) || (state->range_startk + state->range_sizek == basek)) {
297 unsigned long endk = basek + sizek;
298 state->range_sizek = endk - state->range_startk;
301 /* Write the range mtrrs */
302 if (state->range_sizek != 0) {
303 if(state->hole_sizek == 0) {
304 // we need to put that on to hole.
305 unsigned long endk = basek + sizek;
306 state->hole_startk = state->range_startk + state->range_sizek;
307 state->hole_sizek = basek - state->hole_startk;
308 state->range_sizek = endk - state->range_startk;
311 state->reg = range_to_mtrr(state->reg, state->range_startk, state->range_sizek, basek, MTRR_TYPE_WRBACK);
312 state->reg = range_to_mtrr(state->reg, state->hole_startk, state->hole_sizek, basek, MTRR_TYPE_UNCACHEABLE);
313 state->range_startk = 0;
314 state->range_sizek = 0;
315 state->hole_startk = 0;
316 state->hole_sizek = 0;
318 /* Allocate an msr */
319 state->range_startk = basek;
320 state->range_sizek = sizek;
323 void x86_setup_mtrrs(void)
325 /* Try this the simple way of incrementally adding together
326 * mtrrs. If this doesn't work out we can get smart again
327 * and clear out the mtrrs.
329 struct var_mtrr_state var_state;
332 /* Initialized the fixed_mtrrs to uncached */
333 printk_debug("Setting fixed MTRRs(%d-%d) type: UC\n",
334 0, NUM_FIXED_RANGES);
335 set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
337 /* Now see which of the fixed mtrrs cover ram.
339 search_global_resources(
340 IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
341 set_fixed_mtrr_resource, NULL);
342 printk_debug("DONE fixed MTRRs\n");
345 /* Cache as many memory areas as possible */
346 /* FIXME is there an algorithm for computing the optimal set of mtrrs?
347 * In some cases it is definitely possible to do better.
349 var_state.range_startk = 0;
350 var_state.range_sizek = 0;
351 var_state.hole_startk = 0;
352 var_state.hole_sizek = 0;
354 search_global_resources(
355 IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
356 set_var_mtrr_resource, &var_state);
358 /* Write the last range */
359 var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk, var_state.range_sizek, 0, MTRR_TYPE_WRBACK);
360 var_state.reg = range_to_mtrr(var_state.reg, var_state.hole_startk, var_state.hole_sizek, 0, MTRR_TYPE_UNCACHEABLE);
361 printk_debug("DONE variable MTRRs\n");
362 printk_debug("Clear out the extra MTRR's\n");
363 /* Clear out the extra MTRR's */
364 while(var_state.reg < MTRRS) {
365 set_var_mtrr(var_state.reg++, 0, 0, 0);
367 /* enable fixed MTRR */
368 printk_spew("call enable_fixed_mtrr()\n");
370 printk_spew("call enable_var_mtrr()\n");
372 printk_spew("Leave %s\n", __FUNCTION__);
376 int x86_mtrr_check(void)
378 /* Only Pentium Pro and later have MTRR */
380 printk_debug("\nMTRR check\n");
385 printk_debug("Fixed MTRRs : ");
387 printk_debug("Enabled\n");
389 printk_debug("Disabled\n");
391 printk_debug("Variable MTRRs: ");
393 printk_debug("Enabled\n");
395 printk_debug("Disabled\n");
400 return ((int) msr.lo);