1 #include <cpu/x86/mtrr.h>
2 #include <cpu/x86/lapic_def.h>
5 .globl _secondary_start, _secondary_start_end
11 movl %eax, %cr3 /* Invalidate TLB*/
13 /* On hyper threaded cpus, invalidating the cache here is
14 * very very bad. Don't.
17 /* setup the data segment */
21 data32 lgdt gdtaddr - _secondary_start
24 andl $0x7FFAFFD1, %eax /* PG,AM,WP,NE,TS,EM,MP = 0 */
25 orl $0x60000001, %eax /* CD, NW, PE = 1 */
38 /* Load the Interrupt descriptor table */
41 /* Set the stack pointer, and flag that we are done */
43 movl secondary_stack, %esp
44 movl %eax, secondary_stack
46 call secondary_cpu_init
51 .word gdt_limit /* the table limit */
52 .long gdt /* we know the offset */