First shot at factoring SMM code into generic parts and southbridge specific
[coreboot.git] / src / cpu / intel / model_f1x / Config.lb
1 uses HAVE_MOVNTI
2 default HAVE_MOVNTI=1
3 dir /cpu/x86/tsc
4 dir /cpu/x86/mtrr
5 dir /cpu/x86/fpu
6 dir /cpu/x86/mmx
7 dir /cpu/x86/sse
8 dir /cpu/x86/lapic
9 dir /cpu/x86/cache
10 dir /cpu/x86/smm
11 dir /cpu/intel/microcode
12 driver model_f1x_init.o