MTRR: get physical address size from CPUID
[coreboot.git] / src / cpu / intel / model_68x / model_68x_init.c
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2007-2009 coresystems GmbH
5  * Copyright (C) 2010 Joseph Smith <joe@settoplinux.org>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; version 2 of
10  * the License.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
20  * MA 02110-1301 USA
21  */
22
23 #include <console/console.h>
24 #include <device/device.h>
25 #include <device/pci.h>
26 #include <string.h>
27 #include <cpu/cpu.h>
28 #include <cpu/x86/mtrr.h>
29 #include <cpu/x86/msr.h>
30 #include <cpu/x86/lapic.h>
31 #include <cpu/intel/microcode.h>
32 #include <cpu/x86/cache.h>
33 #include <cpu/x86/name.h>
34 #include <usbdebug.h>
35
36 static const uint32_t microcode_updates[] = {
37         #include "microcode-534-MU16810d.h"
38         #include "microcode-535-MU16810e.h"
39         #include "microcode-536-MU16810f.h"
40         #include "microcode-537-MU268110.h"
41         #include "microcode-538-MU168111.h"
42         #include "microcode-550-MU168307.h"
43         #include "microcode-551-MU168308.h"
44         #include "microcode-727-MU168313.h"
45         #include "microcode-728-MU168314.h"
46         #include "microcode-729-MU268310.h"
47         #include "microcode-611-MU168607.h"
48         #include "microcode-612-MU168608.h"
49         #include "microcode-615-MU16860a.h"
50         #include "microcode-617-MU16860c.h"
51         #include "microcode-618-MU268602.h"
52         #include "microcode-662-MU168a01.h"
53         #include "microcode-691-MU168a04.h"
54         #include "microcode-692-MU168a05.h"
55         /*  Dummy terminator  */
56         0x0, 0x0, 0x0, 0x0,
57         0x0, 0x0, 0x0, 0x0,
58         0x0, 0x0, 0x0, 0x0,
59         0x0, 0x0, 0x0, 0x0,
60 };
61
62 #if CONFIG_USBDEBUG
63 static unsigned ehci_debug_addr;
64 #endif
65
66 static void model_68x_init(device_t cpu)
67 {
68         char processor_name[49];
69
70         /* Turn on caching if we haven't already */
71         x86_enable_cache();
72
73         /* Update the microcode */
74         intel_update_microcode(microcode_updates);
75
76         /* Print processor name */
77         fill_processor_name(processor_name);
78         printk(BIOS_INFO, "CPU: %s.\n", processor_name);
79
80 #if CONFIG_USBDEBUG
81         // Is this caution really needed?
82         if(!ehci_debug_addr)
83                 ehci_debug_addr = get_ehci_debug();
84         set_ehci_debug(0);
85 #endif
86
87         /* Setup MTRRs */
88         x86_setup_mtrrs();
89         x86_mtrr_check();
90
91 #if CONFIG_USBDEBUG
92         set_ehci_debug(ehci_debug_addr);
93 #endif
94
95         /* Enable the local cpu apics */
96         setup_lapic();
97 }
98
99 static struct device_operations cpu_dev_ops = {
100         .init     = model_68x_init,
101 };
102
103 /*
104  * Intel Celeron Processor Identification Information
105  * http://www.intel.com/design/celeron/qit/update.pdf
106  *
107  * Intel Pentium III Processor Identification and Package Information
108  * http://www.intel.com/design/pentiumiii/qit/update.pdf
109  *
110  * Intel Pentium III Processor Specification Update
111  * http://download.intel.com/design/intarch/specupdt/24445358.pdf
112  *
113  * Mobile Intel Pentium III/III-M Processor Specification Update
114  * http://download.intel.com/design/intarch/specupdt/24530663.pdf
115  */
116 static struct cpu_device_id cpu_table[] = {
117         { X86_VENDOR_INTEL, 0x0680 },
118         { X86_VENDOR_INTEL, 0x0681 }, /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */
119         { X86_VENDOR_INTEL, 0x0683 }, /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/
120         { X86_VENDOR_INTEL, 0x0686 }, /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */
121         { X86_VENDOR_INTEL, 0x068a }, /* PIII/Celeron, cD0/D0/BD0/PD0 */
122
123         { 0, 0 },
124 };
125
126 static const struct cpu_driver driver __cpu_driver = {
127         .ops      = &cpu_dev_ops,
128         .id_table = cpu_table,
129 };
130