2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Arastra, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
25 #include <cpu/x86/mtrr.h>
26 #include <cpu/x86/msr.h>
27 #include <cpu/x86/lapic.h>
28 #include <cpu/intel/microcode.h>
29 #include <cpu/x86/cache.h>
30 #include <cpu/x86/mtrr.h>
32 static u32 microcode_updates[] = {
33 /* Dummy terminator */
40 static void ep80579_init(device_t dev)
42 /* Turn on caching if we haven't already */
47 /* Update the microcode */
48 intel_update_microcode(microcode_updates);
50 /* Enable the local cpu apics */
54 static struct device_operations cpu_dev_ops = {
58 static struct cpu_device_id cpu_table[] = {
59 { X86_VENDOR_INTEL, 0x10650 }, /* EP80579 */
63 static const struct cpu_driver driver __cpu_driver = {
65 .id_table = cpu_table,