Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / cpu / amd / socket_F_1207 / Kconfig
1 config CPU_AMD_SOCKET_F_1207
2         bool
3         select CPU_AMD_MODEL_10XXX
4         select PCI_IO_CFG_EXT
5         select CACHE_AS_RAM
6
7 config CPU_SOCKET_TYPE
8         hex
9         default 0x10
10         depends on CPU_AMD_SOCKET_F_1207
11
12 config EXT_RT_TBL_SUPPORT
13         bool
14         default n
15         depends on CPU_AMD_SOCKET_F_1207
16
17 config EXT_CONF_SUPPORT
18         bool
19         default n
20         depends on CPU_AMD_SOCKET_F_1207
21
22 config CBB
23         hex
24         default 0x0
25         depends on CPU_AMD_SOCKET_F_1207
26
27 config CDB
28         hex
29         default 0x18
30         depends on CPU_AMD_SOCKET_F_1207
31
32 config XIP_ROM_BASE
33         hex
34         default 0xfff80000
35         depends on CPU_AMD_SOCKET_F_1207
36
37 config XIP_ROM_SIZE
38         hex
39         default 0x80000
40         depends on CPU_AMD_SOCKET_F_1207