Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / cpu / amd / socket_AM2r2 / Kconfig
1 config CPU_AMD_SOCKET_AM2R2
2         bool
3         select CPU_AMD_MODEL_10XXX
4         select HT3_SUPPORT
5         select PCI_IO_CFG_EXT
6         select CACHE_AS_RAM
7
8 config CPU_SOCKET_TYPE
9         hex
10         default 0x11
11         depends on CPU_AMD_SOCKET_AM2R2
12
13 config EXT_RT_TBL_SUPPORT
14         bool
15         default n
16         depends on CPU_AMD_SOCKET_AM2R2
17
18 config EXT_CONF_SUPPORT
19         bool
20         default n
21         depends on CPU_AMD_SOCKET_AM2R2
22
23 config CBB
24         hex
25         default 0x0
26         depends on CPU_AMD_SOCKET_AM2R2
27
28 config CDB
29         hex
30         default 0x18
31         depends on CPU_AMD_SOCKET_AM2R2
32
33 config XIP_ROM_BASE
34         hex
35         default 0xfff80000
36         depends on CPU_AMD_SOCKET_AM2R2
37
38 config XIP_ROM_SIZE
39         hex
40         default 0x80000
41         depends on CPU_AMD_SOCKET_AM2R2