3 #define K8_SET_FIDVID_DEBUG 0
5 #define K8_SET_FIDVID_ONE_BY_ONE 1
7 #define K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST 1
15 static inline void print_debug_fv(const char *str, unsigned val)
17 #if K8_SET_FIDVID_DEBUG == 1
18 #if CONFIG_USE_PRINTK_IN_CAR
19 printk_debug("%s%x\r\n", str, val);
21 print_debug(str); print_debug_hex32(val); print_debug("\r\n");
26 static inline void print_debug_fv_8(const char *str, unsigned val)
28 #if K8_SET_FIDVID_DEBUG == 1
29 #if CONFIG_USE_PRINTK_IN_CAR
30 printk_debug("%s%02x\r\n", str, val);
32 print_debug(str); print_debug_hex8(val); print_debug("\r\n");
37 static inline void print_debug_fv_64(const char *str, unsigned val, unsigned val2)
39 #if K8_SET_FIDVID_DEBUG == 1
40 #if CONFIG_USE_PRINTK_IN_CAR
41 printk_debug("%s%x%x\r\n", str, val, val2);
43 print_debug(str); print_debug_hex32(val); print_debug_hex32(val2); print_debug("\r\n");
49 static void enable_fid_change(void)
55 nodes = ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
57 for(i=0; i<nodes; i++) {
58 dword = pci_read_config32(PCI_DEV(0, 0x18+i, 3), 0xd8);
60 dword |= (2<<28) | (0x02710);
61 pci_write_config32(PCI_DEV(0, 0x18+i, 3), 0xd8, dword);
64 pci_write_config32(PCI_DEV(0, 0x18+i, 3), 0xd4, dword);
66 dword = pci_read_config32(PCI_DEV(0, 0x18+i, 2), 0x94);
67 dword |= (1<<14);// disable the DRAM interface at first, it will be enabled by raminit again
68 pci_write_config32(PCI_DEV(0, 0x18+i, 2), 0x94, dword);
70 dword = 0x23070700; //enable FID/VID change
71 // dword = 0x00070000; //enable FID/VID change
72 pci_write_config32(PCI_DEV(0, 0x18+i, 3), 0x80, dword);
75 pci_write_config32(PCI_DEV(0, 0x18+i, 3), 0x84, dword);
80 #if K8_SET_FIDVID_ONE_BY_ONE == 0
81 static unsigned set_fidvid_without_init(unsigned fidvid)
88 fid = (fidvid >> 8) & 0x3f;
89 vid = (fidvid >> 16) & 0x3f;
93 msr.lo = (vid<<8) | fid;
94 wrmsr(0xc0010041, msr);
99 static unsigned set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
101 //for (cur, new) there is one <1600MHz x8 to find out next_fid
102 static const uint8_t next_fid_a[] = {
103 /* x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 */ // 0:x4, 2:x5....BASE=4, MIN=4, MAX=25, INC=2 result = (xX-BASE)*INC
104 /* x4 */ 0, 9, 9, 8, 9, 9, 9, 9, 9, 9, 9, 9,
105 /* x5 */ 9, 0, 11, 11, 9, 9, 10, 11, 11, 11, 11, 11,
106 /* x6 */ 11, 11, 0, 13, 11, 11, 11, 11, 12, 13, 13, 13,
107 /* x7 */ 13, 13, 13, 0, 13, 13, 13, 13, 13, 13, 14, 15,
108 /* x8 */ 4, 9, 9, 9, 0, 9, 9, 9, 9, 9, 9, 9,
109 /* x9 */ 4, 5, 10, 10, 8, 0, 0, 0, 0, 0, 0, 0,
110 /*x10 */ 9, 5, 11, 11, 9, 0, 0, 0, 0, 0, 0, 0,
111 /*x11 */ 10, 5, 6, 12, 10, 0, 0, 0, 0, 0, 0, 0,
112 /*x12 */ 11, 11, 6, 13, 11, 0, 0, 0, 0, 0, 0, 0,
113 /*x13 */ 12, 12, 6, 7, 12, 0, 0, 0, 0, 0, 0, 0,
114 /*x14 */ 13, 13, 13, 7, 13, 0, 0, 0, 0, 0, 0, 0,
115 /*x15 */ 14, 14, 14, 7, 14, 0, 0, 0, 0, 0, 0, 0,
132 if(apicid!=apicidx) {
133 #if CONFIG_USE_PRINTK_IN_CAR
134 printk_err("wrong apicid, we want change %x, but it is %x\r\n", apicid, apicidx);
136 print_err("wrong apicid, we want change "); print_err_hex8(apicid); print_err(" but it is "); print_err_hex8(apicidx); print_err("\r\n");
141 fid = (fidvid >> 8) & 0x3f;
142 vid = (fidvid >> 16) & 0x3f;
144 msr = rdmsr(0xc0010042);
146 vid_cur = msr.hi & 0x3f;
147 fid_cur = msr.lo & 0x3f;
149 if((vid_cur==vid) && (fid_cur==fid)) return fidvid;
151 vid_max = (msr.hi>>(48-32)) & 0x3f;
152 fid_max = ((msr.lo>>16) & 0x3f); //max fid
154 if(fid_max>=((25-4)*2)) { // FX max fid is 5G
155 fid_max = ((msr.lo>>8) & 0x3f) + 5*2; // max FID is min fid + 1G
156 if(fid_max >= ((25-4)*2)) {
157 fid_max = (10-4)*2; // hard set to 2G
164 msr.lo = (vid_max<<8) | (fid_cur);
166 msr.lo |= (1<<16); // init changes
168 wrmsr(0xc0010041, msr);
174 for(loop=0;loop<100000;loop++){
175 msr = rdmsr(0xc0010042);
176 if(!(msr.lo & (1<<31))) break;
178 vid_cur = msr.hi & 0x3f;
181 while((fid_cur!=fid) && (steps-->0)) {
183 if((fid_cur > (8-4)*2) && (fid> (8-4)*2)) {
185 fid_temp = fid_cur + 2;
187 fid_temp = fid_cur - 2;
190 else { //there is one < 8, So we need to lookup the table to find the fid_cur
192 temp = next_fid_a[(fid_cur/2)*12+(fid/2)];
194 fid_temp = (temp-4) * 2;
196 if(fid_temp>fid_max) break;
202 msr.lo = (vid_cur<<8) | fid_cur;
204 msr.lo |= (1<<16); // init changes
206 wrmsr(0xc0010041, msr);
212 #if K8_SET_FIDVID_DEBUG == 1
214 print_debug_fv_8("\tapicid in set_fidvid = ", apicid);
215 print_debug_fv_64("ctrl msr fid, vid ", msr.hi, msr.lo);
219 for(loop=0;loop<100000;loop++){
220 msr = rdmsr(0xc0010042);
221 if(!(msr.lo & (1<<31))) break;
223 fid_cur = msr.lo & 0x3f;
225 #if K8_SET_FIDVID_DEBUG == 1
227 print_debug_fv_64("status msr fid, vid ", msr.hi, msr.lo);
234 msr.lo = (vid<<8) | (fid_cur);
236 msr.lo |= (1<<16); // init changes
238 wrmsr(0xc0010041, msr);
243 for(loop=0;loop<100000;loop++){
244 msr = rdmsr(0xc0010042);
245 if(!(msr.lo & (1<<31))) break;
247 vid_cur = msr.hi & 0x3f;
249 fidvid = (vid_cur<< 16) | (fid_cur<<8);
253 print_err("set vid failed for apicid ="); print_err_hex8(apicidx); print_err("\r\n");
256 print_err("set fid failed for apicid ="); print_err_hex8(apicidx); print_err("\r\n");
264 static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
268 uint32_t readback = 0;
269 unsigned timeout = 1;
276 msr = rdmsr(0xc0010042);
277 fid_max = ((msr.lo>>16) & 0x3f); //max fid
279 if(fid_max>=((25-4)*2)) { // FX max fid is 5G
280 fid_max = ((msr.lo>>8) & 0x3f) + 5*2; // max FID is min fid + 1G
281 if(fid_max >= ((25-4)*2)) {
282 fid_max = (10-4)*2; // hard set to 2G
288 send |= ((msr.hi>>(48-32)) & 0x3f) << 16; //max vid
289 send |= (apicid<<24); // ap apicid
291 #if K8_SET_FIDVID_ONE_BY_ONE == 1
292 vid_cur = msr.hi & 0x3f;
293 fid_cur = msr.lo & 0x3f;
297 msr.lo = (vid_cur<<8) | (fid_cur);
298 wrmsr(0xc0010041, msr);
301 timeout = wait_cpu_state(bsp_apicid, 1);
303 print_initcpu8("fidvid_ap_stage1: time out while reading from BSP on ", apicid);
305 //send signal to BSP about this AP max fid and vid
306 lapic_write(LAPIC_MSG_REG, send | 1); //AP at state 1 that sent our fid and vid
308 // wait_cpu_state(bsp_apicid, 2);// don't need we can use apicid directly
311 //remote read BSP signal that include vid and fid that need to set
312 if(lapic_remote_read(bsp_apicid, LAPIC_MSG_REG, &readback)!=0) continue;
313 if(((readback>>24) & 0xff) == apicid) break; // it is this cpu turn
317 #if K8_SET_FIDVID_ONE_BY_ONE == 1
318 readback = set_fidvid(apicid, readback & 0xffff00, 1); // this AP
320 readback = set_fidvid_without_init(readback & 0xffff00); // this AP
322 //send signal to BSP that this AP fid/vid is set // allow to change state2 is together with apicid
323 send = (apicid<<24) | (readback & 0x00ffff00); // AP at state that We set the requested fid/vid
325 print_initcpu8("fidvid_ap_stage2: time out while reading from BSP on ", apicid);
328 lapic_write(LAPIC_MSG_REG, send | 2);
330 timeout = wait_cpu_state(bsp_apicid, 3);
332 print_initcpu8("fidvid_ap_stage3: time out while reading from BSP on ", apicid);
336 static unsigned calc_common_fidvid(unsigned fidvid, unsigned fidvidx)
338 /* FIXME: need to check the change path to verify if it is reachable when common fid is small than 1.6G */
339 if((fidvid & 0xff00)<=(fidvidx & 0xff00)) {
348 unsigned common_fidvid;
351 static void init_fidvid_bsp_stage1(unsigned ap_apicid, void *gp )
353 unsigned readback = 0;
354 unsigned timeout = 1;
356 struct fidvid_st *fvp = gp;
359 print_debug_fv("state 1: ap_apicid=", ap_apicid);
363 if(lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback)!=0) continue;
364 if((readback & 0xff) == 1) {
366 break; //target ap is in stage 1
370 print_initcpu8("fidvid_bsp_stage1: time out while reading from ap ", ap_apicid);
374 print_debug_fv("\treadback=", readback);
376 fvp->common_fidvid = calc_common_fidvid(fvp->common_fidvid, readback & 0xffff00);
378 print_debug_fv("\tcommon_fidvid=", fvp->common_fidvid);
381 static void init_fidvid_bsp_stage2(unsigned ap_apicid, void *gp)
383 unsigned readback = 0;
384 unsigned timeout = 1;
386 struct fidvid_st *fvp = gp;
389 print_debug_fv("state 2: ap_apicid=", ap_apicid);
391 lapic_write(LAPIC_MSG_REG, fvp->common_fidvid | (ap_apicid<<24) | 2); // all set to state2
395 if(lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback)!=0) continue;
396 if((readback & 0xff) == 2) {
398 break; // target ap is stage 2, and it'd FID has beed set
403 print_initcpu8("fidvid_bsp_stage2: time out while reading from ap ", ap_apicid);
407 print_debug_fv("\treadback=", readback);
410 #if K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
411 struct ap_apicid_st {
413 unsigned apicid[16]; // 8 way dual core need 16
414 /* FIXME: 32 node quad core, may need 128 */
417 static void store_ap_apicid(unsigned ap_apicid, void *gp)
419 struct ap_apicid_st *p = gp;
421 p->apicid[p->num++] = ap_apicid;
426 static void init_fidvid_bsp(unsigned bsp_apicid)
433 #if K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
434 struct ap_apicid_st ap_apicidx;
440 msr = rdmsr(0xc0010042);
441 fid_max = ((msr.lo>>16) & 0x3f); //max fid
443 if(fid_max>=((25-4)*2)) { // FX max fid is 5G
444 fid_max = ((msr.lo>>8) & 0x3f) + 5*2; // max FID is min fid + 1G
445 if(fid_max >= ((25-4)*2)) {
446 fid_max = (10-4)*2; // hard set to 2G
450 vid_max = ((msr.hi>>(48-32)) & 0x3f); //max vid
451 fv.common_fidvid = (fid_max<<8)|(vid_max<<16);
454 // for all APs (We know the APIC ID of all APs even the APIC ID is lifted)
455 // remote read from AP about max fid/vid
457 //let all ap trains to state 1
458 lapic_write(LAPIC_MSG_REG, (bsp_apicid<<24) | 1);
460 // calculate the common max fid/vid that could be used for all APs and BSP
461 #if K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
464 for_each_ap(bsp_apicid, K8_SET_FIDVID_CORE0_ONLY, store_ap_apicid, &ap_apicidx);
466 for(i=0;i<ap_apicidx.num;i++) {
467 init_fidvid_bsp_stage1(ap_apicidx.apicid[i], &fv);
470 for_each_ap(bsp_apicid, K8_SET_FIDVID_CORE0_ONLY, init_fidvid_bsp_stage1, &fv);
476 // Can we use max only? So we can only set fid in one around, otherwise we need to set that to max after raminit
477 // set fid vid to DQS training required
478 fid = (fv.common_fidvid >> 8) & 0x3f;
479 vid = (fv.common_fidvid >> 16) & 0x3f;
482 fid = (10-4)*2; //x10
486 vid+= 4; //unit is 12.5mV
488 vid+= 2; //unit is 25mV
491 fv.common_fidvid = (fid<<8) | (vid<<16);
493 print_debug_fv("common_fidvid=", fv.common_fidvid);
497 #if K8_SET_FIDVID_ONE_BY_ONE == 1
498 // set BSP fid and vid
499 print_debug_fv("bsp apicid=", bsp_apicid);
500 fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
501 print_debug_fv("common_fidvid=", fv.common_fidvid);
505 //for all APs ( We know the APIC ID of all AP even the APIC ID is lifted)
506 // send signal to the AP it could change it's fid/vid
507 // remote read singnal from AP that AP is done
509 fv.common_fidvid &= 0xffff00;
511 //set state 2 allow is in init_fidvid_bsp_stage2
512 #if K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
513 for(i=0;i<ap_apicidx.num;i++) {
514 init_fidvid_bsp_stage2(ap_apicidx.apicid[i], &fv);
517 for_each_ap(bsp_apicid, K8_SET_FIDVID_CORE0_ONLY, init_fidvid_bsp_stage2, &fv);
520 #if K8_SET_FIDVID_ONE_BY_ONE == 0
521 // set BSP fid and vid
522 print_debug_fv("bsp apicid=", bsp_apicid);
523 fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
524 print_debug_fv("common_fidvid=", fv.common_fidvid);
528 lapic_write(LAPIC_MSG_REG, fv.common_fidvid | (bsp_apicid<<24) | 3); // clear the state
530 //here wait a while, so last ap could read pack, and stop it, don't call init_timer too early or just don't use init_timer