3 #define K8_SET_FIDVID_DEBUG 0
5 #define K8_SET_FIDVID_ONE_BY_ONE 1
7 #define K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST 1
15 static inline void print_debug_fv(const char *str, unsigned val)
17 #if K8_SET_FIDVID_DEBUG == 1
18 printk_debug("%s%x\r\n", str, val);
22 static inline void print_debug_fv_8(const char *str, unsigned val)
24 #if K8_SET_FIDVID_DEBUG == 1
25 printk_debug("%s%02x\r\n", str, val);
29 static inline void print_debug_fv_64(const char *str, unsigned val, unsigned val2)
31 #if K8_SET_FIDVID_DEBUG == 1
32 printk_debug("%s%x%x\r\n", str, val, val2);
37 static void enable_fid_change(void)
43 nodes = ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60) >> 4) & 7) + 1;
45 for (i = 0; i < nodes; i++) {
46 dword = pci_read_config32(PCI_DEV(0, 0x18+i, 3), 0xd8);
48 dword |= (2 << 28) | (0x02710);
49 pci_write_config32(PCI_DEV(0, 0x18+i, 3), 0xd8, dword);
52 pci_write_config32(PCI_DEV(0, 0x18+i, 3), 0xd4, dword);
54 /* disable the DRAM interface at first, it will be enabled
56 dword = pci_read_config32(PCI_DEV(0, 0x18+i, 2), 0x94);
58 pci_write_config32(PCI_DEV(0, 0x18+i, 2), 0x94, dword);
60 dword = 0x23070700; /* enable FID/VID change */
61 // dword = 0x00070000; /* enable FID/VID change */
62 pci_write_config32(PCI_DEV(0, 0x18+i, 3), 0x80, dword);
64 #if CONFIG_HAVE_ACPI_RESUME
69 pci_write_config32(PCI_DEV(0, 0x18+i, 3), 0x84, dword);
74 #if K8_SET_FIDVID_ONE_BY_ONE == 0
75 static unsigned set_fidvid_without_init(unsigned fidvid)
81 fid = (fidvid >> 8) & 0x3f;
82 vid = (fidvid >> 16) & 0x3f;
86 msr.lo = (vid<<8) | fid;
87 wrmsr(0xc0010041, msr);
92 static u32 set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
95 /* CurrentFID--> 4x(00h) 5x(02h) 6x(04h) 7x(06h) ...
96 * --------------------------------------
97 * TargetFID | Next_FID, Next_FID, Next_FID, Next_FID ...
98 * | | Next_FID, Next_FID, Next_FID, Next_FID ...
99 * \|/ | Next_FID, Next_FID, Next_FID, Next_FID ...
101 static const u8 next_fid_200[] = {
102 /* x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 x16 */
103 /* x4 */ 0, -1, -1, -1, 0, 0, 9, 10, 11, 12, 13, 14, 15, /* 800 */
104 /* x5 */ -1, 0, -1, -1, -1, 5, 5, 5, 11, 12, 13, 14, 15, /* 1000 */
105 /* x6 */ -1, -1, 0, -1, -1, -1, -1, 6, 6, 6, 13, 14, 15, /* 1200 */
106 /* x7 */ -1, -1, -1, 0, -1, -1, -1, -1, -1, 7, 7, 7, 15, /* 1400 */
107 /* lower table to upper table boarder (table 70 and 71 in BKDG) */
108 /* x8 */ 8, -1, -1, -1, 0, 8, 9, 10, 11, 12, 13, 14, 15, /* 1600 */
109 /* x9 */ 9, 9, -1, -1, 9, 0, 9, 10, 11, 12, 13, 14, 15, /* 1800 */
110 /*x10 */ 9, 10, -1, -1, 9, 10, 0, 10, 11, 12, 13, 14, 15, /* 2000 */
111 /*x11 */ 9, 11, 11, -1, 9, 10, 11, 0, 11, 12, 13, 14, 15, /* 2200 */
112 /*x12 */ 9, 11, 12, -1, 9, 10, 11, 12, 0, 12, 13, 14, 15, /* 2400 */
113 /*x13 */ 9, 11, 13, 13, 9, 10, 11, 12, 13, 0, 13, 14, 15, /* 2600 */
114 /*x14 */ 9, 11, 13, 14, 9, 10, 11, 12, 13, 14, 0, 14, 15, /* 2800 */
115 /*x15 */ 9, 11, 13, 15, 9, 10, 11, 12, 13, 14, 15, 0, 15, /* 3000 */
116 /*x15 */ 9, 11, 13, 15, 9, 10, 11, 12, 13, 14, 15, 16, 0, /* 3200 */
133 if (apicid != apicidx) {
134 printk_err("wrong apicid, we want change %x, but it is %x\r\n", apicid, apicidx);
138 fid_new = (fidvid >> 8) & 0x3f;
139 vid_new = (fidvid >> 16) & 0x3f;
141 msr = rdmsr(0xc0010042);
143 vid_cur = msr.hi & 0x3f;
144 fid_cur = msr.lo & 0x3f;
146 if ((vid_cur == vid_new) && (fid_cur == fid_new))
149 vid_max = (msr.hi >> (48-32)) & 0x3f;
150 fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */
153 if (fid_max >= ((25 - 4) * 2)) { /* FX max fid is 5G */
154 fid_max = ((msr.lo >> 8) & 0x3f) + 5 * 2; /* max FID is min fid + 1G */
155 if (fid_max >= ((25-4) * 2)) {
156 fid_max = (10-4) * 2; /* hard set to 2G */
162 /* TODO - make this more correct. Not a big deal for setting max...
164 * if TargetFID > InitialFID
165 * TargetVID = FinalVID - RVO
167 * if CurrentVID > FinalVID
168 * TargetVID = FinalVID - RVO
170 * TargetVID = CurrentVIDD - RVO
173 msr.lo = (vid_max << 8) | (fid_cur);
175 msr.lo |= (1 << 16); /* init changes */
177 wrmsr(0xc0010041, msr);
183 for (loop=0; loop < 100000; loop++){
184 msr = rdmsr(0xc0010042);
185 if (!(msr.lo & (1 << 31)))
188 vid_cur = msr.hi & 0x3f;
190 /* BKDG figure 12 and 13
191 * if current fid is odd
192 * current fid -1 (next lower and even fid)(odd fid for rev G)
193 * if current fid in high-freq table
194 * while current fid < target fid
195 * transition to next higher fid in table
196 * else if target fid > VCO portal of current fid
197 * transition to highest portal fid in higher fid table
198 * while current fid < target fid
199 * transition to next higher fid in table
201 * transition to target fid
204 printk_debug("Current fid_cur: 0x%x, fid_max: 0x%x\n", fid_cur, fid_max);
205 printk_debug("Requested fid_new: 0x%x\n", fid_new);
207 step_limit = 8; /* max 8 steps just in case... */
208 while ((fid_cur != fid_new) && (step_limit--)) {
212 if (fid_cur < fid_new)
213 /* Force Fid steps even. step == 0 means 100MHz step */
214 step = ((fid_new/2) - (fid_cur/2)) * 2;
216 step = ((fid_cur/2) - (fid_new/2)) * 2;
218 /* If 200Mhz step OR past 3200 max table value */
219 if ((step == 2) || (fid_new >= 0x18 || fid_cur >= 0x18)) {
221 printk_debug("200MHZ step ");
223 /* Step +/- 200MHz at a time */
224 if (fid_cur < fid_new)
225 fid_temp = fid_cur + 2;
227 fid_temp = fid_cur - 2;
230 } else if ( step > 2) { /* If more than a 200Mhz step */
233 /* look it up in the table */
234 printk_debug("FidVid table step ");
236 temp = next_fid_200[((fid_new/2) * 13) + (fid_cur/2)];
239 fid_temp = (temp-4) * 2; /* Table 108 */
243 break; /* table error */
245 } else { /* step < 2 (100MHZ) */
246 printk_debug("100MHZ step ");
248 /* The table adjust in 200MHz increments. If requested,
249 * do the 100MHz increment if the CPU supports it.*/
250 if (cpuid_edx(0x80000007) & (1 << 6)) {
251 fid_temp = fid_cur + 1;
253 /* 100 MHZ not supported. Get out of the loop */
254 printk_debug("is not supported.\n");
259 if(fid_temp > fid_max) {
260 printk_debug("fid_temp 0x%x > fid_max 0x%x\n", fid_temp, fid_max);
264 printk_debug("fidvid: 0x%x\n", fid_temp);
267 msr.hi = 0x190; /* 2 us for AMD NPT Family 0Fh Processors */
268 msr.lo = (vid_cur << 8) | fid_temp;
270 msr.lo |= (1 << 16); /* init changes */
272 wrmsr(0xc0010041, msr);
278 #if K8_SET_FIDVID_DEBUG == 1
280 print_debug_fv_8("set_fidvid APICID = ", apicid);
281 print_debug_fv_64("fidvid ctrl msr ", msr.hi, msr.lo);
285 for (loop = 0; loop < 100000; loop++){
286 msr = rdmsr(0xc0010042);
287 if (!(msr.lo & (1 << 31)))
290 fid_cur = msr.lo & 0x3f;
292 #if K8_SET_FIDVID_DEBUG == 1
294 print_debug_fv_64("fidvid status msr ", msr.hi, msr.lo);
299 /* set vid to final */
300 /* TODO - make this more correct. Not a big deal for setting max...
302 * if TargetFID > InitialFID
303 * TargetVID = FinalVID - RVO
305 * if CurrentVID > FinalVID
306 * TargetVID = FinalVID - RVO
308 * TargetVID = CurrentVIDD - RVO
311 msr.lo = (vid_new << 8) | (fid_cur);
313 msr.lo |= (1 << 16); // init changes
315 wrmsr(0xc0010041, msr);
320 for (loop = 0; loop < 100000; loop++){
321 msr = rdmsr(0xc0010042);
322 if (!(msr.lo & (1 << 31)))
325 vid_cur = msr.hi & 0x3f;
327 fidvid = (vid_cur << 16) | (fid_cur << 8);
330 if (vid_new != vid_cur) {
331 print_err("set vid failed for apicid ="); print_err_hex8(apicidx); print_err("\r\n");
333 if (fid_new != fid_cur) {
334 print_err("set fid failed for apicid ="); print_err_hex8(apicidx); print_err("\r\n");
342 static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
345 uint32_t readback = 0;
346 unsigned timeout = 1;
353 msr = rdmsr(0xc0010042);
354 fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */
356 if (fid_max >= ((25-4) * 2)) { /* FX max fid is 5G */
357 fid_max = ((msr.lo>>8) & 0x3f) + 5*2; /* maxFID = minFID + 1G */
358 if (fid_max >= ((25-4) * 2)) {
359 fid_max = (10-4) * 2; // hard set to 2G
365 send |= ((msr.hi >> (48-32)) & 0x3f) << 16; /* max vid */
366 send |= (apicid << 24); /* ap apicid */
368 #if K8_SET_FIDVID_ONE_BY_ONE == 1
369 vid_cur = msr.hi & 0x3f;
370 fid_cur = msr.lo & 0x3f;
374 msr.lo = (vid_cur << 8) | (fid_cur);
375 wrmsr(0xc0010041, msr);
378 timeout = wait_cpu_state(bsp_apicid, 1);
380 print_initcpu8("fidvid_ap_stage1: time out while reading from BSP on ", apicid);
382 /* send signal to BSP about this AP max fid and vid */
383 /* AP at state 1 that sent our fid and vid */
384 lapic_write(LAPIC_MSG_REG, send | 1);
386 // wait_cpu_state(bsp_apicid, 2); /* don't need we can use apicid directly */
389 /* remote read BSP signal that include vid/fid that need to set */
390 if (lapic_remote_read(bsp_apicid, LAPIC_MSG_REG, &readback)!=0)
392 if (((readback >> 24) & 0xff) == apicid)
393 break; /* it is this cpu turn */
397 #if K8_SET_FIDVID_ONE_BY_ONE == 1
398 readback = set_fidvid(apicid, readback & 0xffff00, 1); // this AP
400 readback = set_fidvid_without_init(readback & 0xffff00); // this AP
402 /* send signal to BSP that this AP fid/vid is set */
403 /* allow to change state2 is together with apicid */
404 /* AP at state that We set the requested fid/vid */
405 send = (apicid<<24) | (readback & 0x00ffff00);
407 print_initcpu8("fidvid_ap_stage2: time out while reading from BSP on ", apicid);
410 lapic_write(LAPIC_MSG_REG, send | 2);
412 timeout = wait_cpu_state(bsp_apicid, 3);
414 print_initcpu8("fidvid_ap_stage3: time out while reading from BSP on ", apicid);
418 static unsigned calc_common_fidvid(unsigned fidvid, unsigned fidvidx)
420 /* FIXME: need to check the change path to verify if it is reachable
421 * when common fid is small than 1.6G */
422 if ((fidvid & 0xff00) <= (fidvidx & 0xff00)) {
431 unsigned common_fidvid;
434 static void init_fidvid_bsp_stage1(unsigned ap_apicid, void *gp )
436 unsigned readback = 0;
437 unsigned timeout = 1;
439 struct fidvid_st *fvp = gp;
442 print_debug_fv("state 1: ap_apicid=", ap_apicid);
446 if (lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback)!=0)
448 if ((readback & 0xff) == 1) {
450 break; /* target ap is in stage 1 */
454 print_initcpu8("fidvid_bsp_stage1: time out while reading from ap ", ap_apicid);
458 print_debug_fv("\treadback=", readback);
460 fvp->common_fidvid = calc_common_fidvid(fvp->common_fidvid, readback & 0xffff00);
462 print_debug_fv("\tcommon_fidvid=", fvp->common_fidvid);
465 static void init_fidvid_bsp_stage2(unsigned ap_apicid, void *gp)
467 unsigned readback = 0;
468 unsigned timeout = 1;
470 struct fidvid_st *fvp = gp;
473 print_debug_fv("state 2: ap_apicid=", ap_apicid);
475 /* all set to state2 */
476 lapic_write(LAPIC_MSG_REG, fvp->common_fidvid | (ap_apicid<<24) | 2);
480 if (lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback)!=0)
482 if ((readback & 0xff) == 2) {
484 break; /* target ap is stage 2, it's FID has beed set */
489 print_initcpu8("fidvid_bsp_stage2: time out while reading from ap ", ap_apicid);
493 print_debug_fv("\treadback=", readback);
496 #if K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
497 struct ap_apicid_st {
499 unsigned apicid[16]; /* 8 way dual core need 16 */
500 /* FIXME: 32 node quad core, may need 128 */
503 static void store_ap_apicid(unsigned ap_apicid, void *gp)
505 struct ap_apicid_st *p = gp;
507 p->apicid[p->num++] = ap_apicid;
512 static void init_fidvid_bsp(unsigned bsp_apicid)
519 #if K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
520 struct ap_apicid_st ap_apicidx;
525 msr = rdmsr(0xc0010042);
526 fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */
528 if (fid_max >= ((25-4) * 2)) { /* FX max fid is 5G */
529 fid_max = ((msr.lo >> 8) & 0x3f) + 5*2; /* maxFID = minFID + 1G */
530 if (fid_max >= ((25-4) * 2)) {
531 fid_max = (10-4) * 2; /* hard set to 2G */
535 vid_max = ((msr.hi>>(48-32)) & 0x3f); //max vid
536 fv.common_fidvid = (fid_max << 8)|(vid_max << 16);
539 /* for all APs (We know the APIC ID of all APs even the APIC ID is lifted)
540 * remote read from AP about max fid/vid */
542 /* let all ap trains to state 1 */
543 lapic_write(LAPIC_MSG_REG, (bsp_apicid << 24) | 1);
545 /* calculate the common max fid/vid that could be used for
547 #if K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
550 for_each_ap(bsp_apicid, K8_SET_FIDVID_CORE0_ONLY, store_ap_apicid, &ap_apicidx);
552 for (i = 0; i < ap_apicidx.num; i++) {
553 init_fidvid_bsp_stage1(ap_apicidx.apicid[i], &fv);
556 for_each_ap(bsp_apicid, K8_SET_FIDVID_CORE0_ONLY, init_fidvid_bsp_stage1, &fv);
562 /* Can we use max only? So we can only set fid in one around,
563 * otherwise we need to set that to max after raminit */
564 /* set fid vid to DQS training required */
565 fid = (fv.common_fidvid >> 8) & 0x3f;
566 vid = (fv.common_fidvid >> 16) & 0x3f;
568 if (fid > (10-4) * 2) {
569 fid = (10-4) * 2; // x10
573 vid += 4; /* unit is 12.5mV */
575 vid += 2; /* unit is 25mV */
578 fv.common_fidvid = (fid<<8) | (vid<<16);
580 print_debug_fv("common_fidvid=", fv.common_fidvid);
584 #if K8_SET_FIDVID_ONE_BY_ONE == 1
585 /* set BSP fid and vid */
586 print_debug_fv("bsp apicid=", bsp_apicid);
587 fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
588 print_debug_fv("common_fidvid=", fv.common_fidvid);
591 /* For all APs ( We know the APIC ID of all AP even the APIC ID is lifted)
592 * send signal to the AP it could change it's fid/vid */
593 /* remote read singnal from AP that AP is done */
595 fv.common_fidvid &= 0xffff00;
597 /* set state 2 allow is in init_fidvid_bsp_stage2 */
598 #if K8_SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
599 for (i = 0; i < ap_apicidx.num; i++) {
600 init_fidvid_bsp_stage2(ap_apicidx.apicid[i], &fv);
603 for_each_ap(bsp_apicid, K8_SET_FIDVID_CORE0_ONLY, init_fidvid_bsp_stage2, &fv);
606 #if K8_SET_FIDVID_ONE_BY_ONE == 0
607 /* set BSP fid and vid */
608 print_debug_fv("bsp apicid=", bsp_apicid);
609 fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
610 print_debug_fv("common_fidvid=", fv.common_fidvid);
614 /* clear the state */
615 lapic_write(LAPIC_MSG_REG, fv.common_fidvid | (bsp_apicid << 24) | 3);
617 /* here wait a while, so last ap could read pack, and stop it, don't
618 * call init_timer too early or just don't use init_timer */