9 static inline void print_debug_fv(const char *str, u32 val)
11 #if CONFIG_SET_FIDVID_DEBUG
12 printk(BIOS_DEBUG, "%s%x\n", str, val);
16 static inline void print_debug_fv_8(const char *str, u8 val)
18 #if CONFIG_SET_FIDVID_DEBUG
19 printk(BIOS_DEBUG, "%s%02x\n", str, val);
23 static inline void print_debug_fv_64(const char *str, u32 val, u32 val2)
25 #if CONFIG_SET_FIDVID_DEBUG
26 printk(BIOS_DEBUG, "%s%x%x\n", str, val, val2);
30 static void enable_fid_change(void)
36 nodes = ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60) >> 4) & 7) + 1;
38 for (i = 0; i < nodes; i++) {
39 dword = pci_read_config32(PCI_DEV(0, 0x18 + i, 3), 0xd8);
41 dword |= (2 << 28) | (0x02710);
42 pci_write_config32(PCI_DEV(0, 0x18 + i, 3), 0xd8, dword);
45 pci_write_config32(PCI_DEV(0, 0x18 + i, 3), 0xd4, dword);
47 /* disable the DRAM interface at first, it will be enabled
48 * by raminit again (see also erratum #181) */
49 #if CONFIG_K8_REV_F_SUPPORT
50 dword = pci_read_config32(PCI_DEV(0, 0x18 + i, 2), 0x94);
52 pci_write_config32(PCI_DEV(0, 0x18 + i, 2), 0x94, dword);
54 dword = pci_read_config32(PCI_DEV(0, 0x18 + i, 2), 0x90);
56 pci_write_config32(PCI_DEV(0, 0x18 + i, 2), 0x90, dword);
57 dword = pci_read_config32(PCI_DEV(0, 0x18 + i, 2), 0x94);
59 pci_write_config32(PCI_DEV(0, 0x18 + i, 2), 0x94, dword);
62 dword = 0x23070700; /* enable FID/VID change */
63 // dword = 0x00070000; /* enable FID/VID change */
64 pci_write_config32(PCI_DEV(0, 0x18 + i, 3), 0x80, dword);
66 #if CONFIG_HAVE_ACPI_RESUME
71 pci_write_config32(PCI_DEV(0, 0x18 + i, 3), 0x84, dword);
76 #if !CONFIG_SET_FIDVID_ONE_BY_ONE
77 static unsigned set_fidvid_without_init(unsigned fidvid)
83 fid = (fidvid >> 8) & 0x3f;
84 vid = (fidvid >> 16) & 0x3f;
88 msr.lo = (vid << 8) | fid;
89 wrmsr(0xc0010041, msr);
94 static u32 set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
97 /* CurrentFID--> 4x(00h) 5x(02h) 6x(04h) 7x(06h) ...
98 * --------------------------------------
99 * TargetFID | Next_FID, Next_FID, Next_FID, Next_FID ...
100 * | | Next_FID, Next_FID, Next_FID, Next_FID ...
101 * \|/ | Next_FID, Next_FID, Next_FID, Next_FID ...
103 static const u8 next_fid_200[] = {
104 /* x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 x16 */
105 /* x4 */ 0, -1, -1, -1, 0, 0, 9, 10, 11, 12, 13, 14, 15, /* 800 */
106 /* x5 */ -1, 0, -1, -1, -1, 5, 5, 5, 11, 12, 13, 14, 15, /* 1000 */
107 /* x6 */ -1, -1, 0, -1, -1, -1, -1, 6, 6, 6, 13, 14, 15, /* 1200 */
108 /* x7 */ -1, -1, -1, 0, -1, -1, -1, -1, -1, 7, 7, 7, 15, /* 1400 */
109 /* lower table to upper table boarder (table 70 and 71 in BKDG) */
110 /* x8 */ 8, -1, -1, -1, 0, 8, 9, 10, 11, 12, 13, 14, 15, /* 1600 */
111 /* x9 */ 9, 9, -1, -1, 9, 0, 9, 10, 11, 12, 13, 14, 15, /* 1800 */
112 /*x10 */ 9, 10, -1, -1, 9, 10, 0, 10, 11, 12, 13, 14, 15, /* 2000 */
113 /*x11 */ 9, 11, 11, -1, 9, 10, 11, 0, 11, 12, 13, 14, 15, /* 2200 */
114 /*x12 */ 9, 11, 12, -1, 9, 10, 11, 12, 0, 12, 13, 14, 15, /* 2400 */
115 /*x13 */ 9, 11, 13, 13, 9, 10, 11, 12, 13, 0, 13, 14, 15, /* 2600 */
116 /*x14 */ 9, 11, 13, 14, 9, 10, 11, 12, 13, 14, 0, 14, 15, /* 2800 */
117 /*x15 */ 9, 11, 13, 15, 9, 10, 11, 12, 13, 14, 15, 0, 15, /* 3000 */
118 /*x15 */ 9, 11, 13, 15, 9, 10, 11, 12, 13, 14, 15, 16, 0, /* 3200 */
135 if (apicid != apicidx) {
137 "wrong apicid, we want change %x, but it is %x\n",
142 fid_new = (fidvid >> 8) & 0x3f;
143 vid_new = (fidvid >> 16) & 0x3f;
145 msr = rdmsr(0xc0010042);
147 vid_cur = msr.hi & 0x3f;
148 fid_cur = msr.lo & 0x3f;
150 if ((vid_cur == vid_new) && (fid_cur == fid_new))
153 vid_max = (msr.hi >> (48 - 32)) & 0x3f;
154 fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */
157 if (fid_max >= ((25 - 4) * 2)) { /* FX max fid is 5G */
158 fid_max = ((msr.lo >> 8) & 0x3f) + 5 * 2; /* max FID is min fid + 1G */
159 if (fid_max >= ((25 - 4) * 2)) {
160 fid_max = (10 - 4) * 2; /* hard set to 2G */
166 /* TODO - make this more correct. Not a big deal for setting max...
168 * if TargetFID > InitialFID
169 * TargetVID = FinalVID - RVO
171 * if CurrentVID > FinalVID
172 * TargetVID = FinalVID - RVO
174 * TargetVID = CurrentVIDD - RVO
177 msr.lo = (vid_max << 8) | (fid_cur);
179 msr.lo |= (1 << 16); /* init changes */
181 wrmsr(0xc0010041, msr);
186 for (loop = 0; loop < 100000; loop++) {
187 msr = rdmsr(0xc0010042);
188 if (!(msr.lo & (1 << 31)))
191 vid_cur = msr.hi & 0x3f;
193 /* BKDG figure 12 and 13
194 * if current fid is odd
195 * current fid -1 (next lower and even fid)(odd fid for rev G)
196 * if current fid in high-freq table
197 * while current fid < target fid
198 * transition to next higher fid in table
199 * else if target fid > VCO portal of current fid
200 * transition to highest portal fid in higher fid table
201 * while current fid < target fid
202 * transition to next higher fid in table
204 * transition to target fid
207 printk(BIOS_DEBUG, "Current fid_cur: 0x%x, fid_max: 0x%x\n", fid_cur,
209 printk(BIOS_DEBUG, "Requested fid_new: 0x%x\n", fid_new);
211 step_limit = 8; /* max 8 steps just in case... */
212 while ((fid_cur != fid_new) && (step_limit--)) {
216 if (fid_cur < fid_new)
217 /* Force Fid steps even. step == 0 means 100MHz step */
218 step = ((fid_new / 2) - (fid_cur / 2)) * 2;
220 step = ((fid_cur / 2) - (fid_new / 2)) * 2;
222 /* If 200Mhz step OR past 3200 max table value */
223 if ((step == 2) || (fid_new >= 0x18 || fid_cur >= 0x18)) {
225 printk(BIOS_DEBUG, "200MHZ step ");
227 /* Step +/- 200MHz at a time */
228 if (fid_cur < fid_new)
229 fid_temp = fid_cur + 2;
231 fid_temp = fid_cur - 2;
233 } else if (step > 2) { /* If more than a 200Mhz step */
236 /* look it up in the table */
237 printk(BIOS_DEBUG, "FidVid table step ");
240 next_fid_200[((fid_new / 2) * 13) + (fid_cur / 2)];
243 fid_temp = (temp - 4) * 2; /* Table 108 */
247 break; /* table error */
249 } else { /* step < 2 (100MHZ) */
250 printk(BIOS_DEBUG, "100MHZ step ");
252 /* The table adjust in 200MHz increments. If requested,
253 * do the 100MHz increment if the CPU supports it.*/
254 if (cpuid_edx(0x80000007) & (1 << 6)) {
255 fid_temp = fid_cur + 1;
257 /* 100 MHZ not supported. Get out of the loop */
258 printk(BIOS_DEBUG, "is not supported.\n");
263 if (fid_temp > fid_max) {
264 printk(BIOS_DEBUG, "fid_temp 0x%x > fid_max 0x%x\n",
269 printk(BIOS_DEBUG, "fidvid: 0x%x\n", fid_temp);
272 msr.hi = 0x190; /* 2 us for AMD NPT Family 0Fh Processors */
273 msr.lo = (vid_cur << 8) | fid_temp;
275 msr.lo |= (1 << 16); /* init changes */
277 wrmsr(0xc0010041, msr);
282 #if CONFIG_SET_FIDVID_DEBUG
284 print_debug_fv_8("set_fidvid APICID = ", apicid);
285 print_debug_fv_64("fidvid ctrl msr ", msr.hi, msr.lo);
289 for (loop = 0; loop < 100000; loop++) {
290 msr = rdmsr(0xc0010042);
291 if (!(msr.lo & (1 << 31)))
294 fid_cur = msr.lo & 0x3f;
296 #if CONFIG_SET_FIDVID_DEBUG
298 print_debug_fv_64("fidvid status msr ", msr.hi, msr.lo);
303 /* set vid to final */
304 /* TODO - make this more correct. Not a big deal for setting max...
306 * if TargetFID > InitialFID
307 * TargetVID = FinalVID - RVO
309 * if CurrentVID > FinalVID
310 * TargetVID = FinalVID - RVO
312 * TargetVID = CurrentVIDD - RVO
315 msr.lo = (vid_new << 8) | (fid_cur);
317 msr.lo |= (1 << 16); // init changes
319 wrmsr(0xc0010041, msr);
324 for (loop = 0; loop < 100000; loop++) {
325 msr = rdmsr(0xc0010042);
326 if (!(msr.lo & (1 << 31)))
329 vid_cur = msr.hi & 0x3f;
331 fidvid = (vid_cur << 16) | (fid_cur << 8);
334 if (vid_new != vid_cur) {
335 printk(BIOS_ERR, "set vid failed for apicid =%02x\n",
338 if (fid_new != fid_cur) {
339 printk(BIOS_ERR, "set fid failed for apicid =%02x\n",
348 static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
352 unsigned timeout = 1;
359 if((cpuid_edx(0x80000007)&0x06)!=0x06) {
360 return; /* FID/VID change not supported */
363 msr = rdmsr(0xc0010042);
364 fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */
366 if (fid_max >= ((25 - 4) * 2)) { /* FX max fid is 5G */
367 fid_max = ((msr.lo >> 8) & 0x3f) + 5 * 2; /* maxFID = minFID + 1G */
368 if (fid_max >= ((25 - 4) * 2)) {
369 fid_max = (10 - 4) * 2; /* hard set to 2G */
375 send |= ((msr.hi >> (48 - 32)) & 0x3f) << 16; /* max vid */
376 send |= (apicid << 24); /* ap apicid */
378 #if CONFIG_SET_FIDVID_ONE_BY_ONE
379 vid_cur = msr.hi & 0x3f;
380 fid_cur = msr.lo & 0x3f;
384 msr.lo = (vid_cur << 8) | (fid_cur);
385 wrmsr(0xc0010041, msr);
388 timeout = wait_cpu_state(bsp_apicid, 1);
390 printk(BIOS_DEBUG, "fidvid_ap_stage1: time out while reading"
391 " from BSP on %02x\n", apicid);
393 /* send signal to BSP about this AP max fid and vid */
394 /* AP at state 1 that sent our fid and vid */
395 lapic_write(LAPIC_MSG_REG, send | 1);
397 // wait_cpu_state(bsp_apicid, 2); /* don't need we can use apicid directly */
400 /* remote read BSP signal that include vid/fid that need to set */
401 if (lapic_remote_read(bsp_apicid, LAPIC_MSG_REG, &readback) !=
404 if (((readback >> 24) & 0xff) == apicid)
405 break; /* it is this cpu turn */
409 #if CONFIG_SET_FIDVID_ONE_BY_ONE
410 readback = set_fidvid(apicid, readback & 0xffff00, 1); // this AP
412 readback = set_fidvid_without_init(readback & 0xffff00); // this AP
414 /* send signal to BSP that this AP fid/vid is set */
415 /* allow to change state2 is together with apicid */
416 /* AP at state that We set the requested fid/vid */
417 send = (apicid << 24) | (readback & 0x00ffff00);
419 printk(BIOS_DEBUG, "%s: time out while reading from BSP on %02x",
423 lapic_write(LAPIC_MSG_REG, send | 2);
425 timeout = wait_cpu_state(bsp_apicid, 3);
427 printk(BIOS_DEBUG, "%s: time out while reading from BSP on %02x",
432 static u32 calc_common_fidvid(unsigned fidvid, unsigned fidvidx)
434 /* FIXME: need to check the change path to verify if it is reachable
435 * when common fid is small than 1.6G */
436 if ((fidvid & 0xff00) <= (fidvidx & 0xff00)) {
444 unsigned common_fidvid;
447 static void init_fidvid_bsp_stage1(u32 ap_apicid, void *gp)
452 struct fidvid_st *fvp = gp;
455 print_debug_fv("state 1: ap_apicid=", ap_apicid);
459 if (lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback) != 0)
461 if ((readback & 0xff) == 1) {
463 break; /* target ap is in stage 1 */
468 printk(BIOS_DEBUG, "%s: timed out reading from ap %02x\n",
469 __func__, ap_apicid);
473 print_debug_fv("\treadback = ", readback);
475 fvp->common_fidvid = calc_common_fidvid(fvp->common_fidvid, readback & 0xffff00);
477 print_debug_fv("\tcommon_fidvid=", fvp->common_fidvid);
480 static void init_fidvid_bsp_stage2(unsigned ap_apicid, void *gp)
482 unsigned readback = 0;
483 unsigned timeout = 1;
485 struct fidvid_st *fvp = gp;
488 print_debug_fv("state 2: ap_apicid=", ap_apicid);
490 /* all set to state2 */
491 lapic_write(LAPIC_MSG_REG, fvp->common_fidvid | (ap_apicid << 24) | 2);
495 if (lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback) != 0)
497 if ((readback & 0xff) == 2) {
499 break; /* target ap is stage 2, it's FID has beed set */
504 printk(BIOS_DEBUG, "%s: time out while reading from ap %02x",
505 __func__, ap_apicid);
509 print_debug_fv("\treadback=", readback);
512 #if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST
513 struct ap_apicid_st {
515 unsigned apicid[16]; /* 8 way dual core need 16 */
518 static void store_ap_apicid(unsigned ap_apicid, void *gp)
520 struct ap_apicid_st *p = gp;
522 p->apicid[p->num++] = ap_apicid;
527 static void init_fidvid_bsp(unsigned bsp_apicid)
534 #if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST
535 struct ap_apicid_st ap_apicidx;
540 msr = rdmsr(0xc0010042);
541 fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */
543 if (fid_max >= ((25 - 4) * 2)) { /* FX max fid is 5G */
544 fid_max = ((msr.lo >> 8) & 0x3f) + 5 * 2; /* maxFID = minFID + 1G */
545 if (fid_max >= ((25 - 4) * 2)) {
546 fid_max = (10 - 4) * 2; /* hard set to 2G */
550 vid_max = ((msr.hi >> (48 - 32)) & 0x3f); //max vid
551 fv.common_fidvid = (fid_max << 8) | (vid_max << 16);
553 /* for all APs (We know the APIC ID of all APs even the APIC ID is lifted)
554 * remote read from AP about max fid/vid */
556 /* let all ap trains to state 1 */
557 lapic_write(LAPIC_MSG_REG, (bsp_apicid << 24) | 1);
559 /* calculate the common max fid/vid that could be used for
561 #if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST
564 for_each_ap(bsp_apicid, CONFIG_SET_FIDVID_CORE0_ONLY, store_ap_apicid, &ap_apicidx);
566 for (i = 0; i < ap_apicidx.num; i++) {
567 init_fidvid_bsp_stage1(ap_apicidx.apicid[i], &fv);
570 for_each_ap(bsp_apicid, CONFIG_SET_FIDVID_CORE0_ONLY, init_fidvid_bsp_stage1, &fv);
575 /* Can we use max only? So we can only set fid in one around,
576 * otherwise we need to set that to max after raminit */
577 /* set fid vid to DQS training required */
578 fid = (fv.common_fidvid >> 8) & 0x3f;
579 vid = (fv.common_fidvid >> 16) & 0x3f;
581 if (fid > (10 - 4) * 2) {
582 fid = (10 - 4) * 2; // x10
586 vid += 4; /* unit is 12.5mV */
588 vid += 2; /* unit is 25mV */
591 fv.common_fidvid = (fid << 8) | (vid << 16);
593 print_debug_fv("common_fidvid=", fv.common_fidvid);
597 #if CONFIG_SET_FIDVID_ONE_BY_ONE
598 /* set BSP fid and vid */
599 print_debug_fv("bsp apicid=", bsp_apicid);
600 fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
601 print_debug_fv("common_fidvid=", fv.common_fidvid);
604 /* For all APs ( We know the APIC ID of all AP even the APIC ID is lifted)
605 * send signal to the AP it could change it's fid/vid */
606 /* remote read singnal from AP that AP is done */
608 fv.common_fidvid &= 0xffff00;
610 /* set state 2 allow is in init_fidvid_bsp_stage2 */
611 #if CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST
612 for (i = 0; i < ap_apicidx.num; i++) {
613 init_fidvid_bsp_stage2(ap_apicidx.apicid[i], &fv);
616 for_each_ap(bsp_apicid, CONFIG_SET_FIDVID_CORE0_ONLY, init_fidvid_bsp_stage2, &fv);
619 #if !CONFIG_SET_FIDVID_ONE_BY_ONE
620 /* set BSP fid and vid */
621 print_debug_fv("bsp apicid=", bsp_apicid);
622 fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
623 print_debug_fv("common_fidvid=", fv.common_fidvid);
627 /* clear the state */
628 lapic_write(LAPIC_MSG_REG, fv.common_fidvid | (bsp_apicid << 24) | 3);
630 /* here wait a while, so last ap could read pack, and stop it, don't
631 * call init_timer too early or just don't use init_timer */