2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 /******************************************************************************
21 * AMD Generic Encapsulated Software Architecture
23 * $Workfile:: cache_as_ram.inc
25 * Description: cache_as_ram.inc - AGESA Module Entry Point for GCC complier
27 ******************************************************************************
35 * xmm1: backup ebx -- cpu_init_detected
39 .globl cache_as_ram_setup, disable_cache_as_ram, cache_as_ram_setup_out
45 /* enable SSE2 128bit instructions */
46 /* Turn on OSFXSR [BIT9] and OSXMMEXCPT [BIT10] onto CR4 register */
52 /* Get the cpu_init_detected */
57 /* Save the BIST result */
60 /* for normal part %ebx already contain cpu_init_detected from fallback call */
62 /* Save the cpu_init_detected */
70 /* Restore the BIST result */
73 /* Restore the cpu_init_detected */
76 pushl %ebx /* init detected */
78 call cache_as_ram_main
80 /* Should never see this postcode */
86 /* Save return stack */
91 /* Restore the return stack */
96 cache_as_ram_setup_out: