3 * Macro: PCI_WRITE_CONFIG_BYTE
4 * Arguments: %eax address to write to (includes bus, device, function, &offset)
10 * Effects: writes a single byte to pci config space
12 * Notes: This routine is optimized for minimal register usage.
13 * And the tricks it does cannot scale beyond writing a single byte.
15 * What it does is almost simple.
16 * It preserves %eax (baring special bits) until it is written
17 * out to the appropriate port. And hides the data byte
18 * in the high half of edx.
20 * In %edx[3] it stores the byte to write.
21 * In %edx[2] it stores the lower three bits of the address.
25 #define PCI_WRITE_CONFIG_BYTE \
31 orl $0x80000000, %eax ; \
32 andl $0xfffffffc, %eax ; \
44 * Macro: PCI_WRITE_CONFIG_WORD
45 * Arguments: %eax address to write to (includes bus, device, function, &offset)
52 * Effects: writes a single byte to pci config space
54 * Notes: This routine is optimized for minimal register usage.
56 * What it does is almost simple.
57 * It preserves %eax (baring special bits) until it is written
58 * out to the appropriate port. And hides the least significant
59 * bits of the address in the high half of edx.
61 * In %edx[2] it stores the lower three bits of the address.
65 #define PCI_WRITE_CONFIG_WORD \
70 orl $0x80000000, %eax ; \
71 andl $0xfffffffc, %eax ; \
83 * Macro: PCI_WRITE_CONFIG_DWORD
84 * Arguments: %eax address to write to (includes bus, device, function, &offset)
91 * Effects: writes a single byte to pci config space
93 * Notes: This routine is optimized for minimal register usage.
95 * What it does is almost simple.
96 * It preserves %eax (baring special bits) until it is written
97 * out to the appropriate port. And hides the least significant
98 * bits of the address in the high half of edx.
100 * In %edx[2] it stores the lower three bits of the address.
104 #define PCI_WRITE_CONFIG_DWORD \
109 orl $0x80000000, %eax ; \
110 andl $0xfffffffc, %eax ; \
116 addl $0xcfc, %edx ; \
123 * Macro: PCI_READ_CONFIG_BYTE
124 * Arguments: %eax address to read from (includes bus, device, function, &offset)
126 * Results: %al Byte read
128 * Trashed: %eax, %edx
129 * Effects: reads a single byte from pci config space
131 * Notes: This routine is optimized for minimal register usage.
133 * What it does is almost simple.
134 * It preserves %eax (baring special bits) until it is written
135 * out to the appropriate port. And hides the least significant
136 * bits of the address in the high half of edx.
138 * In %edx[2] it stores the lower three bits of the address.
142 #define PCI_READ_CONFIG_BYTE \
147 orl $0x80000000, %eax ; \
148 andl $0xfffffffc, %eax ; \
153 addl $0xcfc, %edx ; \
159 * Macro: PCI_READ_CONFIG_WORD
160 * Arguments: %eax address to read from (includes bus, device, function, &offset)
162 * Results: %ax word read
164 * Trashed: %eax, %edx
165 * Effects: reads a 2 bytes from pci config space
167 * Notes: This routine is optimized for minimal register usage.
169 * What it does is almost simple.
170 * It preserves %eax (baring special bits) until it is written
171 * out to the appropriate port. And hides the least significant
172 * bits of the address in the high half of edx.
174 * In %edx[2] it stores the lower three bits of the address.
178 #define PCI_READ_CONFIG_WORD \
183 orl $0x80000000, %eax ; \
184 andl $0xfffffffc, %eax ; \
189 addl $0xcfc, %edx ; \
195 * Macro: PCI_READ_CONFIG_DWORD
196 * Arguments: %eax address to read from (includes bus, device, function, &offset)
201 * Effects: reads 4 bytes from pci config space
203 * Notes: This routine is optimized for minimal register usage.
205 * What it does is almost simple.
206 * It preserves %eax (baring special bits) until it is written
207 * out to the appropriate port. And hides the least significant
208 * bits of the address in the high half of edx.
210 * In %edx[2] it stores the lower three bits of the address.
214 #define PCI_READ_CONFIG_DWORD \
219 orl $0x80000000, %eax ; \
220 andl $0xfffffffc, %eax ; \
225 addl $0xcfc, %edx ; \