1 #include <console/console.h>
5 #include <cpu/x86/mtrr.h>
6 #include <cpu/x86/msr.h>
7 #include <cpu/x86/lapic.h>
9 #include <device/path.h>
10 #include <device/device.h>
11 #include <smp/spinlock.h>
13 /* Standard macro to see if a specific flag is changeable */
14 static inline int flag_is_changeable_p(uint32_t flag)
29 : "=&r" (f1), "=&r" (f2)
31 return ((f1^f2) & flag) != 0;
34 /* Probe for the CPUID instruction */
35 int cpu_have_cpuid(void)
37 return flag_is_changeable_p(X86_EFLAGS_ID);
41 * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected
42 * by the fact that they preserve the flags across the division of 5/2.
43 * PII and PPro exhibit this behavior too, but they have cpuid available.
47 * Perform the Cyrix 5/2 test. A Cyrix won't change
48 * the flags, while other 486 chips will.
50 static inline int test_cyrix_52div(void)
55 "sahf\n\t" /* clear flags (%eax = 0x0005) */
56 "div %b2\n\t" /* divide 5 by 2 */
57 "lahf" /* store flags into %ah */
62 /* AH is 0x02 on Cyrix after the divide.. */
63 return (unsigned char) (test >> 8) == 0x02;
67 * Detect a NexGen CPU running without BIOS hypercode new enough
68 * to have CPUID. (Thanks to Herbert Oppmann)
71 static int deep_magic_nexgen_probe(void)
75 __asm__ __volatile__ (
76 " movw $0x5555, %%ax\n"
84 : "=a" (ret) : : "cx", "dx" );
88 /* List of cpu vendor strings along with their normalized
95 { X86_VENDOR_INTEL, "GenuineIntel", },
96 { X86_VENDOR_CYRIX, "CyrixInstead", },
97 { X86_VENDOR_AMD, "AuthenticAMD", },
98 { X86_VENDOR_UMC, "UMC UMC UMC ", },
99 { X86_VENDOR_NEXGEN, "NexGenDriven", },
100 { X86_VENDOR_CENTAUR, "CentaurHauls", },
101 { X86_VENDOR_RISE, "RiseRiseRise", },
102 { X86_VENDOR_TRANSMETA, "GenuineTMx86", },
103 { X86_VENDOR_TRANSMETA, "TransmetaCPU", },
104 { X86_VENDOR_NSC, "Geode by NSC", },
105 { X86_VENDOR_SIS, "SiS SiS SiS ", },
108 static const char *x86_vendor_name[] = {
109 [X86_VENDOR_INTEL] = "Intel",
110 [X86_VENDOR_CYRIX] = "Cyrix",
111 [X86_VENDOR_AMD] = "AMD",
112 [X86_VENDOR_UMC] = "UMC",
113 [X86_VENDOR_NEXGEN] = "NexGen",
114 [X86_VENDOR_CENTAUR] = "Centaur",
115 [X86_VENDOR_RISE] = "Rise",
116 [X86_VENDOR_TRANSMETA] = "Transmeta",
117 [X86_VENDOR_NSC] = "NSC",
118 [X86_VENDOR_SIS] = "SiS",
121 static const char *cpu_vendor_name(int vendor)
124 name = "<invalid cpu vendor>";
125 if ((vendor < (ARRAY_SIZE(x86_vendor_name))) &&
126 (x86_vendor_name[vendor] != 0))
128 name = x86_vendor_name[vendor];
133 static int cpu_cpuid_extended_level(void)
135 return cpuid_eax(0x80000000);
138 #define CPUID_FEATURE_PAE (1 << 6)
139 #define CPUID_FEATURE_PSE36 (1 << 17)
141 int cpu_phys_address_size(void)
143 if (!(cpu_have_cpuid()))
146 if (cpu_cpuid_extended_level() >= 0x80000008)
147 return cpuid_eax(0x80000008) & 0xff;
149 if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36))
153 static void identify_cpu(struct device *cpu)
155 char vendor_name[16];
158 vendor_name[0] = '\0'; /* Unset */
160 /* Find the id and vendor_name */
161 if (!cpu_have_cpuid()) {
162 /* Its a 486 if we can modify the AC flag */
163 if (flag_is_changeable_p(X86_EFLAGS_AC)) {
164 cpu->device = 0x00000400; /* 486 */
166 cpu->device = 0x00000300; /* 386 */
168 if ((cpu->device == 0x00000400) && test_cyrix_52div()) {
169 memcpy(vendor_name, "CyrixInstead", 13);
170 /* If we ever care we can enable cpuid here */
172 /* Detect NexGen with old hypercode */
173 else if (deep_magic_nexgen_probe()) {
174 memcpy(vendor_name, "NexGenDriven", 13);
177 if (cpu_have_cpuid()) {
179 struct cpuid_result result;
180 result = cpuid(0x00000000);
181 cpuid_level = result.eax;
182 vendor_name[ 0] = (result.ebx >> 0) & 0xff;
183 vendor_name[ 1] = (result.ebx >> 8) & 0xff;
184 vendor_name[ 2] = (result.ebx >> 16) & 0xff;
185 vendor_name[ 3] = (result.ebx >> 24) & 0xff;
186 vendor_name[ 4] = (result.edx >> 0) & 0xff;
187 vendor_name[ 5] = (result.edx >> 8) & 0xff;
188 vendor_name[ 6] = (result.edx >> 16) & 0xff;
189 vendor_name[ 7] = (result.edx >> 24) & 0xff;
190 vendor_name[ 8] = (result.ecx >> 0) & 0xff;
191 vendor_name[ 9] = (result.ecx >> 8) & 0xff;
192 vendor_name[10] = (result.ecx >> 16) & 0xff;
193 vendor_name[11] = (result.ecx >> 24) & 0xff;
194 vendor_name[12] = '\0';
196 /* Intel-defined flags: level 0x00000001 */
197 if (cpuid_level >= 0x00000001) {
198 cpu->device = cpuid_eax(0x00000001);
201 /* Have CPUID level 0 only unheard of */
202 cpu->device = 0x00000400;
205 cpu->vendor = X86_VENDOR_UNKNOWN;
206 for(i = 0; i < ARRAY_SIZE(x86_vendors); i++) {
207 if (memcmp(vendor_name, x86_vendors[i].name, 12) == 0) {
208 cpu->vendor = x86_vendors[i].vendor;
214 static void set_cpu_ops(struct device *cpu)
216 struct cpu_driver *driver;
218 for (driver = cpu_drivers; driver < ecpu_drivers; driver++) {
219 struct cpu_device_id *id;
220 for(id = driver->id_table; id->vendor != X86_VENDOR_INVALID; id++) {
221 if ((cpu->vendor == id->vendor) &&
222 (cpu->device == id->device))
230 cpu->ops = driver->ops;
233 void cpu_initialize(void)
235 /* Because we busy wait at the printk spinlock.
236 * It is important to keep the number of printed messages
237 * from secondary cpus to a minimum, when debugging is
241 struct cpu_info *info;
242 struct cpuinfo_x86 c;
246 printk(BIOS_INFO, "Initializing CPU #%ld\n", info->index);
250 die("CPU: missing cpu device structure");
253 /* Find what type of cpu we are dealing with */
255 printk(BIOS_DEBUG, "CPU: vendor %s device %x\n",
256 cpu_vendor_name(cpu->vendor), cpu->device);
258 get_fms(&c, cpu->device);
260 printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n",
261 c.x86, c.x86_model, c.x86_mask);
263 /* Lookup the cpu's operations */
267 /* mask out the stepping and try again */
268 cpu->device -= c.x86_mask;
270 cpu->device += c.x86_mask;
271 if(!cpu->ops) die("Unknown cpu");
272 printk(BIOS_DEBUG, "Using generic cpu ops (good)\n");
276 /* Initialize the cpu */
277 if (cpu->ops && cpu->ops->init) {
279 cpu->initialized = 1;
283 printk(BIOS_INFO, "CPU #%ld initialized\n", info->index);