1 #include <console/console.h>
5 #include <cpu/x86/mtrr.h>
6 #include <cpu/x86/msr.h>
7 #include <cpu/x86/lapic.h>
9 #include <device/path.h>
10 #include <device/device.h>
11 #include <smp/spinlock.h>
13 /* Standard macro to see if a specific flag is changeable */
14 static inline int flag_is_changeable_p(uint32_t flag)
29 : "=&r" (f1), "=&r" (f2)
31 return ((f1^f2) & flag) != 0;
35 /* Probe for the CPUID instruction */
36 static int have_cpuid_p(void)
38 return flag_is_changeable_p(X86_EFLAGS_ID);
42 * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected
43 * by the fact that they preserve the flags across the division of 5/2.
44 * PII and PPro exhibit this behavior too, but they have cpuid available.
48 * Perform the Cyrix 5/2 test. A Cyrix won't change
49 * the flags, while other 486 chips will.
51 static inline int test_cyrix_52div(void)
56 "sahf\n\t" /* clear flags (%eax = 0x0005) */
57 "div %b2\n\t" /* divide 5 by 2 */
58 "lahf" /* store flags into %ah */
63 /* AH is 0x02 on Cyrix after the divide.. */
64 return (unsigned char) (test >> 8) == 0x02;
68 * Detect a NexGen CPU running without BIOS hypercode new enough
69 * to have CPUID. (Thanks to Herbert Oppmann)
72 static int deep_magic_nexgen_probe(void)
76 __asm__ __volatile__ (
77 " movw $0x5555, %%ax\n"
85 : "=a" (ret) : : "cx", "dx" );
89 /* List of cpu vendor strings along with their normalized
96 { X86_VENDOR_INTEL, "GenuineIntel", },
97 { X86_VENDOR_CYRIX, "CyrixInstead", },
98 { X86_VENDOR_AMD, "AuthenticAMD", },
99 { X86_VENDOR_UMC, "UMC UMC UMC ", },
100 { X86_VENDOR_NEXGEN, "NexGenDriven", },
101 { X86_VENDOR_CENTAUR, "CentaurHauls", },
102 { X86_VENDOR_RISE, "RiseRiseRise", },
103 { X86_VENDOR_TRANSMETA, "GenuineTMx86", },
104 { X86_VENDOR_TRANSMETA, "TransmetaCPU", },
105 { X86_VENDOR_NSC, "Geode by NSC", },
106 { X86_VENDOR_SIS, "SiS SiS SiS ", },
109 static const char *x86_vendor_name[] = {
110 [X86_VENDOR_INTEL] = "Intel",
111 [X86_VENDOR_CYRIX] = "Cyrix",
112 [X86_VENDOR_AMD] = "AMD",
113 [X86_VENDOR_UMC] = "UMC",
114 [X86_VENDOR_NEXGEN] = "NexGen",
115 [X86_VENDOR_CENTAUR] = "Centaur",
116 [X86_VENDOR_RISE] = "Rise",
117 [X86_VENDOR_TRANSMETA] = "Transmeta",
118 [X86_VENDOR_NSC] = "NSC",
119 [X86_VENDOR_SIS] = "SiS",
122 static const char *cpu_vendor_name(int vendor)
125 name = "<invalid cpu vendor>";
126 if ((vendor < (ARRAY_SIZE(x86_vendor_name))) &&
127 (x86_vendor_name[vendor] != 0))
129 name = x86_vendor_name[vendor];
134 static int cpu_cpuid_extended_level(void)
136 return cpuid_eax(0x80000000);
139 #define CPUID_FEATURE_PAE (1 << 6)
140 #define CPUID_FEATURE_PSE36 (1 << 17)
142 int cpu_phys_address_size(void)
144 if (!(have_cpuid_p()))
147 if (cpu_cpuid_extended_level() >= 0x80000008)
148 return cpuid_eax(0x80000008) & 0xff;
150 if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36))
154 static void identify_cpu(struct device *cpu)
156 char vendor_name[16];
159 vendor_name[0] = '\0'; /* Unset */
161 /* Find the id and vendor_name */
162 if (!have_cpuid_p()) {
163 /* Its a 486 if we can modify the AC flag */
164 if (flag_is_changeable_p(X86_EFLAGS_AC)) {
165 cpu->device = 0x00000400; /* 486 */
167 cpu->device = 0x00000300; /* 386 */
169 if ((cpu->device == 0x00000400) && test_cyrix_52div()) {
170 memcpy(vendor_name, "CyrixInstead", 13);
171 /* If we ever care we can enable cpuid here */
173 /* Detect NexGen with old hypercode */
174 else if (deep_magic_nexgen_probe()) {
175 memcpy(vendor_name, "NexGenDriven", 13);
178 if (have_cpuid_p()) {
180 struct cpuid_result result;
181 result = cpuid(0x00000000);
182 cpuid_level = result.eax;
183 vendor_name[ 0] = (result.ebx >> 0) & 0xff;
184 vendor_name[ 1] = (result.ebx >> 8) & 0xff;
185 vendor_name[ 2] = (result.ebx >> 16) & 0xff;
186 vendor_name[ 3] = (result.ebx >> 24) & 0xff;
187 vendor_name[ 4] = (result.edx >> 0) & 0xff;
188 vendor_name[ 5] = (result.edx >> 8) & 0xff;
189 vendor_name[ 6] = (result.edx >> 16) & 0xff;
190 vendor_name[ 7] = (result.edx >> 24) & 0xff;
191 vendor_name[ 8] = (result.ecx >> 0) & 0xff;
192 vendor_name[ 9] = (result.ecx >> 8) & 0xff;
193 vendor_name[10] = (result.ecx >> 16) & 0xff;
194 vendor_name[11] = (result.ecx >> 24) & 0xff;
195 vendor_name[12] = '\0';
197 /* Intel-defined flags: level 0x00000001 */
198 if (cpuid_level >= 0x00000001) {
199 cpu->device = cpuid_eax(0x00000001);
202 /* Have CPUID level 0 only unheard of */
203 cpu->device = 0x00000400;
206 cpu->vendor = X86_VENDOR_UNKNOWN;
207 for(i = 0; i < ARRAY_SIZE(x86_vendors); i++) {
208 if (memcmp(vendor_name, x86_vendors[i].name, 12) == 0) {
209 cpu->vendor = x86_vendors[i].vendor;
215 static void set_cpu_ops(struct device *cpu)
217 struct cpu_driver *driver;
219 for (driver = cpu_drivers; driver < ecpu_drivers; driver++) {
220 struct cpu_device_id *id;
221 for(id = driver->id_table; id->vendor != X86_VENDOR_INVALID; id++) {
222 if ((cpu->vendor == id->vendor) &&
223 (cpu->device == id->device))
231 cpu->ops = driver->ops;
234 void cpu_initialize(void)
236 /* Because we busy wait at the printk spinlock.
237 * It is important to keep the number of printed messages
238 * from secondary cpus to a minimum, when debugging is
242 struct cpu_info *info;
243 struct cpuinfo_x86 c;
247 printk(BIOS_INFO, "Initializing CPU #%ld\n", info->index);
251 die("CPU: missing cpu device structure");
254 /* Find what type of cpu we are dealing with */
256 printk(BIOS_DEBUG, "CPU: vendor %s device %x\n",
257 cpu_vendor_name(cpu->vendor), cpu->device);
259 get_fms(&c, cpu->device);
261 printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n",
262 c.x86, c.x86_model, c.x86_mask);
264 /* Lookup the cpu's operations */
268 /* mask out the stepping and try again */
269 cpu->device -= c.x86_mask;
271 cpu->device += c.x86_mask;
272 if(!cpu->ops) die("Unknown cpu");
273 printk(BIOS_DEBUG, "Using generic cpu ops (good)\n");
277 /* Initialize the cpu */
278 if (cpu->ops && cpu->ops->init) {
280 cpu->initialized = 1;
284 printk(BIOS_INFO, "CPU #%ld initialized\n", info->index);