2 * This file is part of the coreboot project.
4 * Copyright (C) 2003 Eric Biederman
5 * Copyright (C) 2005 Steve Magnani
6 * Copyright (C) 2008-2009 coresystems GmbH
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <console/console.h>
24 #include <boot/tables.h>
25 #include <boot/coreboot_tables.h>
26 #include <arch/coreboot_tables.h>
27 #include <arch/pirq_routing.h>
28 #include <arch/smp/mpspec.h>
29 #include <arch/acpi.h>
31 #include <cpu/x86/multiboot.h>
35 uint64_t high_tables_base = 0;
36 uint64_t high_tables_size;
38 void cbmem_arch_init(void)
40 /* defined in gdt.c */
44 struct lb_memory *write_tables(void)
46 unsigned long low_table_start, low_table_end;
47 unsigned long rom_table_start, rom_table_end;
49 /* Even if high tables are configured, some tables are copied both to
50 * the low and the high area, so payloads and OSes don't need to know
51 * about the high tables.
53 unsigned long high_table_pointer;
55 if (!high_tables_base) {
56 printk(BIOS_ERR, "ERROR: High Tables Base is not set.\n");
57 // Are there any boards without?
58 // Stepan thinks we should die() here!
61 printk(BIOS_DEBUG, "High Tables Base is %llx.\n", high_tables_base);
63 rom_table_start = 0xf0000;
64 rom_table_end = 0xf0000;
66 /* Start low addr at 0x500, so we don't run into conflicts with the BDA
67 * in case our data structures grow beyound 0x400. Only multiboot, GDT
68 * and the coreboot table use low_tables.
71 low_table_end = 0x500;
73 #if CONFIG_GENERATE_PIRQ_TABLE == 1
74 #define MAX_PIRQ_TABLE_SIZE (4 * 1024)
77 /* This table must be between 0x0f0000 and 0x100000 */
78 rom_table_end = write_pirq_routing_table(rom_table_end);
79 rom_table_end = ALIGN(rom_table_end, 1024);
81 /* And add a high table version for those payloads that
82 * want to live in the F segment
84 high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_PIRQ, MAX_PIRQ_TABLE_SIZE);
85 if (high_table_pointer) {
86 unsigned long new_high_table_pointer;
87 new_high_table_pointer = write_pirq_routing_table(high_table_pointer);
88 // FIXME make pirq table code intelligent enough to know how
89 // much space it's going to need.
90 if (new_high_table_pointer > (high_table_pointer + MAX_PIRQ_TABLE_SIZE)) {
91 printk(BIOS_ERR, "ERROR: Increase PIRQ size.\n");
93 printk(BIOS_DEBUG, "PIRQ table: %ld bytes.\n",
94 new_high_table_pointer - high_table_pointer);
99 #if CONFIG_GENERATE_MP_TABLE == 1
100 #define MAX_MP_TABLE_SIZE (4 * 1024)
103 /* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
104 rom_table_end = write_smp_table(rom_table_end);
105 rom_table_end = ALIGN(rom_table_end, 1024);
107 high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_MPTABLE, MAX_MP_TABLE_SIZE);
108 if (high_table_pointer) {
109 unsigned long new_high_table_pointer;
110 new_high_table_pointer = write_smp_table(high_table_pointer);
111 // FIXME make mp table code intelligent enough to know how
112 // much space it's going to need.
113 if (new_high_table_pointer > (high_table_pointer + MAX_MP_TABLE_SIZE)) {
114 printk(BIOS_ERR, "ERROR: Increase MP table size.\n");
117 printk(BIOS_DEBUG, "MP table: %ld bytes.\n",
118 new_high_table_pointer - high_table_pointer);
120 #endif /* CONFIG_GENERATE_MP_TABLE */
122 #if CONFIG_GENERATE_ACPI_TABLES == 1
123 #define MAX_ACPI_SIZE (47 * 1024)
126 /* Write ACPI tables to F segment and high tables area */
128 /* Ok, this is a bit hacky still, because some day we want to have this
129 * completely dynamic. But right now we are setting fixed sizes.
130 * It's probably still better than the old high_table_base code because
131 * now at least we know when we have an overflow in the area.
133 * We want to use 1MB - 64K for Resume backup. We use 512B for TOC and
134 * 512 byte for GDT, 4K for PIRQ and 4K for MP table and 8KB for the
135 * coreboot table. This leaves us with 47KB for all of ACPI. Let's see
138 high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_ACPI, MAX_ACPI_SIZE);
139 if (high_table_pointer) {
140 unsigned long acpi_start = high_table_pointer;
141 unsigned long new_high_table_pointer;
143 rom_table_end = ALIGN(rom_table_end, 16);
144 new_high_table_pointer = write_acpi_tables(high_table_pointer);
145 if (new_high_table_pointer > ( high_table_pointer + MAX_ACPI_SIZE)) {
146 printk(BIOS_ERR, "ERROR: Increase ACPI size\n");
148 printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n",
149 new_high_table_pointer - high_table_pointer);
151 /* Now we need to create a low table copy of the RSDP. */
153 /* First we look for the high table RSDP */
154 while (acpi_start < new_high_table_pointer) {
155 if (memcmp(((acpi_rsdp_t *)acpi_start)->signature, RSDP_SIG, 8) == 0) {
161 /* Now, if we found the RSDP, we take the RSDT and XSDT pointer
162 * from it in order to write the low RSDP
164 if (acpi_start < new_high_table_pointer) {
165 acpi_rsdp_t *low_rsdp = (acpi_rsdp_t *)rom_table_end,
166 *high_rsdp = (acpi_rsdp_t *)acpi_start;
168 acpi_write_rsdp(low_rsdp,
169 (acpi_rsdt_t *)(high_rsdp->rsdt_address),
170 (acpi_xsdt_t *)((unsigned long)high_rsdp->xsdt_address));
172 printk(BIOS_ERR, "ERROR: Didn't find RSDP in high table.\n");
174 rom_table_end = ALIGN(rom_table_end + sizeof(acpi_rsdp_t), 16);
176 rom_table_end = write_acpi_tables(rom_table_end);
177 rom_table_end = ALIGN(rom_table_end, 1024);
183 #define MAX_COREBOOT_TABLE_SIZE (8 * 1024)
186 high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_CBTABLE, MAX_COREBOOT_TABLE_SIZE);
188 if (high_table_pointer) {
189 unsigned long new_high_table_pointer;
191 /* Also put a forwarder entry into 0-4K */
192 new_high_table_pointer = write_coreboot_table(low_table_start, low_table_end,
193 high_tables_base, high_table_pointer);
195 if (new_high_table_pointer > (high_table_pointer +
196 MAX_COREBOOT_TABLE_SIZE))
197 printk(BIOS_ERR, "%s: coreboot table didn't fit (%lx)\n",
198 __func__, new_high_table_pointer -
201 printk(BIOS_DEBUG, "coreboot table: %ld bytes.\n",
202 new_high_table_pointer - high_table_pointer);
204 /* The coreboot table must be in 0-4K or 960K-1M */
205 rom_table_end = write_coreboot_table(
206 low_table_start, low_table_end,
207 rom_table_start, rom_table_end);
212 #if CONFIG_HAVE_ACPI_RESUME
213 /* Let's prepare the ACPI S3 Resume area now already, so we can rely on
214 * it begin there during reboot time. We don't need the pointer, nor
215 * the result right now. If it fails, ACPI resume will be disabled.
217 cbmem_add(CBMEM_ID_RESUME, HIGH_MEMORY_SAVE);
223 /* The Multiboot information structure */
224 write_multiboot_info(rom_table_end);
227 // Remove before sending upstream