src/arch/x86/boot/mpspec.c

   1 #include <console/console.h>
   2 #include <device/path.h>
   3 #include <device/pci_ids.h>
   4 #include <cpu/cpu.h>
   5 #include <arch/smp/mpspec.h>
   6 #include <string.h>
   7 #include <arch/cpu.h>
   8 #include <cpu/x86/lapic.h>
   9
  10 /* Initialize the specified "mc" struct with initial values. */
  11 void mptable_init(struct mp_config_table *mc, u32 lapic_addr)
  12 {
  13         int i;
  14
  15         memset(mc, 0, sizeof(*mc));
  16
  17         memcpy(mc->mpc_signature, MPC_SIGNATURE, 4);
  18
  19         mc->mpc_length = sizeof(*mc);   /* Initially just the header size. */
  20         mc->mpc_spec = 0x04;            /* MultiProcessor specification 1.4 */
  21         mc->mpc_checksum = 0;           /* Not yet computed. */
  22         mc->mpc_oemptr = 0;
  23         mc->mpc_oemsize = 0;
  24         mc->mpc_entry_count = 0;        /* No entries yet... */
  25         mc->mpc_lapic = lapic_addr;
  26         mc->mpe_length = 0;
  27         mc->mpe_checksum = 0;
  28         mc->reserved = 0;
  29
  30         strncpy(mc->mpc_oem, CONFIG_MAINBOARD_VENDOR, 8);
  31         strncpy(mc->mpc_productid, CONFIG_MAINBOARD_PART_NUMBER, 12);
  32
  33         /*
  34          * The oem/productid fields are exactly 8/12 bytes long. If the resp.
  35          * entry is shorter, the remaining bytes are filled with spaces.
  36          */
  37         for (i = MIN(strlen(CONFIG_MAINBOARD_VENDOR), 8); i < 8; i++)
  38                 mc->mpc_oem[i] = ' ';
  39         for (i = MIN(strlen(CONFIG_MAINBOARD_PART_NUMBER), 12); i < 12; i++)
  40                 mc->mpc_productid[i] = ' ';
  41 }
  42
  43 static unsigned char smp_compute_checksum(void *v, int len)
  44 {
  45         unsigned char *bytes;
  46         unsigned char checksum;
  47         int i;
  48         bytes = v;
  49         checksum = 0;
  50         for(i = 0; i < len; i++) {
  51                 checksum -= bytes[i];
  52         }
  53         return checksum;
  54 }
  55
  56 static void *smp_write_floating_table_physaddr(unsigned long addr, unsigned long mpf_physptr, unsigned int virtualwire)
  57 {
  58         struct intel_mp_floating *mf;
  59         void *v;
  60
  61         v = (void *)addr;
  62         mf = v;
  63         mf->mpf_signature[0] = '_';
  64         mf->mpf_signature[1] = 'M';
  65         mf->mpf_signature[2] = 'P';
  66         mf->mpf_signature[3] = '_';
  67         mf->mpf_physptr = mpf_physptr;
  68         mf->mpf_length = 1;
  69         mf->mpf_specification = 4;
  70         mf->mpf_checksum = 0;
  71         mf->mpf_feature1 = 0;
  72         mf->mpf_feature2 = virtualwire?MP_FEATURE_VIRTUALWIRE:0;
  73         mf->mpf_feature3 = 0;
  74         mf->mpf_feature4 = 0;
  75         mf->mpf_feature5 = 0;
  76         mf->mpf_checksum = smp_compute_checksum(mf, mf->mpf_length*16);
  77         return v;
  78 }
  79
  80 void *smp_write_floating_table(unsigned long addr, unsigned int virtualwire)
  81 {
  82         /* 16 byte align the table address */
  83         addr = (addr + 0xf) & (~0xf);
  84         return smp_write_floating_table_physaddr(addr, addr + SMP_FLOATING_TABLE_LEN, virtualwire);
  85 }
  86
  87 void *smp_next_mpc_entry(struct mp_config_table *mc)
  88 {
  89         void *v;
  90         v = (void *)(((char *)mc) + mc->mpc_length);
  91         return v;
  92 }
  93 static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
  94 {
  95         mc->mpc_length += length;
  96         mc->mpc_entry_count++;
  97 }
  98
  99 void *smp_next_mpe_entry(struct mp_config_table *mc)
 100 {
 101         void *v;
 102         v = (void *)(((char *)mc) + mc->mpc_length + mc->mpe_length);
 103         return v;
 104 }
 105 static void smp_add_mpe_entry(struct mp_config_table *mc, mpe_t mpe)
 106 {
 107         mc->mpe_length += mpe->mpe_length;
 108 }
 109
 110 void smp_write_processor(struct mp_config_table *mc,
 111         unsigned char apicid, unsigned char apicver,
 112         unsigned char cpuflag, unsigned int cpufeature,
 113         unsigned int featureflag)
 114 {
 115         struct mpc_config_processor *mpc;
 116         mpc = smp_next_mpc_entry(mc);
 117         memset(mpc, '\0', sizeof(*mpc));
 118         mpc->mpc_type = MP_PROCESSOR;
 119         mpc->mpc_apicid = apicid;
 120         mpc->mpc_apicver = apicver;
 121         mpc->mpc_cpuflag = cpuflag;
 122         mpc->mpc_cpufeature = cpufeature;
 123         mpc->mpc_featureflag = featureflag;
 124         smp_add_mpc_entry(mc, sizeof(*mpc));
 125 }
 126
 127 /* If we assume a symmetric processor configuration we can
 128  * get all of the information we need to write the processor
 129  * entry from the bootstrap processor.
 130  * Plus I don't think linux really even cares.
 131  * Having the proper apicid's in the table so the non-bootstrap
 132  *  processors can be woken up should be enough.
 133  */
 134 void smp_write_processors(struct mp_config_table *mc)
 135 {
 136         int boot_apic_id;
 137         int order_id;
 138         unsigned apic_version;
 139         unsigned cpu_features;
 140         unsigned cpu_feature_flags;
 141         struct cpuid_result result;
 142         device_t cpu;
 143
 144         boot_apic_id = lapicid();
 145         apic_version = lapic_read(LAPIC_LVR) & 0xff;
 146         result = cpuid(1);
 147         cpu_features = result.eax;
 148         cpu_feature_flags = result.edx;
 149         /* order the output of the cpus to fix a bug in kernel 2.6.11 */
 150         for(order_id = 0;order_id <256; order_id++) {
 151         for(cpu = all_devices; cpu; cpu = cpu->next) {
 152                 unsigned long cpu_flag;
 153                 if ((cpu->path.type != DEVICE_PATH_APIC) ||
 154                         (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
 155                 {
 156                         continue;
 157                 }
 158                 if (!cpu->enabled) {
 159                         continue;
 160                 }
 161                 cpu_flag = MPC_CPU_ENABLED;
 162                 if (boot_apic_id == cpu->path.apic.apic_id) {
 163                         cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
 164                 }
 165                 if(cpu->path.apic.apic_id == order_id) {
 166                         smp_write_processor(mc,
 167                                 cpu->path.apic.apic_id, apic_version,
 168                                 cpu_flag, cpu_features, cpu_feature_flags
 169                         );
 170                         break;
 171                 }
 172             }
 173         }
 174 }
 175
 176 static void smp_write_bus(struct mp_config_table *mc,
 177         unsigned char id, const char *bustype)
 178 {
 179         struct mpc_config_bus *mpc;
 180         mpc = smp_next_mpc_entry(mc);
 181         memset(mpc, '\0', sizeof(*mpc));
 182         mpc->mpc_type = MP_BUS;
 183         mpc->mpc_busid = id;
 184         memcpy(mpc->mpc_bustype, bustype, sizeof(mpc->mpc_bustype));
 185         smp_add_mpc_entry(mc, sizeof(*mpc));
 186 }
 187
 188 void smp_write_ioapic(struct mp_config_table *mc,
 189         unsigned char id, unsigned char ver,
 190         unsigned long apicaddr)
 191 {
 192         struct mpc_config_ioapic *mpc;
 193         mpc = smp_next_mpc_entry(mc);
 194         memset(mpc, '\0', sizeof(*mpc));
 195         mpc->mpc_type = MP_IOAPIC;
 196         mpc->mpc_apicid = id;
 197         mpc->mpc_apicver = ver;
 198         mpc->mpc_flags = MPC_APIC_USABLE;
 199         mpc->mpc_apicaddr = apicaddr;
 200         smp_add_mpc_entry(mc, sizeof(*mpc));
 201 }
 202
 203 void smp_write_intsrc(struct mp_config_table *mc,
 204         unsigned char irqtype, unsigned short irqflag,
 205         unsigned char srcbus, unsigned char srcbusirq,
 206         unsigned char dstapic, unsigned char dstirq)
 207 {
 208         struct mpc_config_intsrc *mpc;
 209         mpc = smp_next_mpc_entry(mc);
 210         memset(mpc, '\0', sizeof(*mpc));
 211         mpc->mpc_type = MP_INTSRC;
 212         mpc->mpc_irqtype = irqtype;
 213         mpc->mpc_irqflag = irqflag;
 214         mpc->mpc_srcbus = srcbus;
 215         mpc->mpc_srcbusirq = srcbusirq;
 216         mpc->mpc_dstapic = dstapic;
 217         mpc->mpc_dstirq = dstirq;
 218         smp_add_mpc_entry(mc, sizeof(*mpc));
 219 #ifdef DEBUG_MPTABLE
 220         printk(BIOS_DEBUG, "add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n",
 221                                 srcbus, srcbusirq, dstapic, dstirq);
 222         hexdump(__func__, mpc, sizeof(*mpc));
 223 #endif
 224 }
 225
 226 void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
 227         unsigned char irqtype, unsigned short irqflag,
 228         struct device *dev,
 229         unsigned char dstapic, unsigned char *dstirq)
 230 {
 231         struct device *child;
 232
 233         int i;
 234         int srcbus;
 235         int slot;
 236
 237         struct bus *link;
 238         unsigned char dstirq_x[4];
 239
 240         for (link = dev->link_list; link; link = link->next) {
 241
 242                 child = link->children;
 243                 srcbus = link->secondary;
 244
 245                 while (child) {
 246                         if (child->path.type != DEVICE_PATH_PCI)
 247                                 goto next;
 248
 249                         slot = (child->path.pci.devfn >> 3);
 250                         /* round pins */
 251                         for (i = 0; i < 4; i++)
 252                                 dstirq_x[i] = dstirq[(i + slot) % 4];
 253
 254                         if ((child->class >> 16) != PCI_BASE_CLASS_BRIDGE) {
 255                                 /* pci device */
 256                                 printk(BIOS_DEBUG, "route irq: %s\n", dev_path(child));
 257                                 for (i = 0; i < 4; i++)
 258                                         smp_write_intsrc(mc, irqtype, irqflag, srcbus, (slot<<2)|i, dstapic, dstirq_x[i]);
 259                                 goto next;
 260                         }
 261
 262                         switch (child->class>>8) {
 263                         case PCI_CLASS_BRIDGE_PCI:
 264                         case PCI_CLASS_BRIDGE_PCMCIA:
 265                         case PCI_CLASS_BRIDGE_CARDBUS:
 266                                 printk(BIOS_DEBUG, "route irq bridge: %s\n", dev_path(child));
 267                                 smp_write_intsrc_pci_bridge(mc, irqtype, irqflag, child, dstapic, dstirq_x);
 268                         }
 269
 270 next:
 271                         child = child->sibling;
 272                 }
 273
 274         }
 275 }
 276
 277 void smp_write_lintsrc(struct mp_config_table *mc,
 278         unsigned char irqtype, unsigned short irqflag,
 279         unsigned char srcbusid, unsigned char srcbusirq,
 280         unsigned char destapic, unsigned char destapiclint)
 281 {
 282         struct mpc_config_lintsrc *mpc;
 283         mpc = smp_next_mpc_entry(mc);
 284         memset(mpc, '\0', sizeof(*mpc));
 285         mpc->mpc_type = MP_LINTSRC;
 286         mpc->mpc_irqtype = irqtype;
 287         mpc->mpc_irqflag = irqflag;
 288         mpc->mpc_srcbusid = srcbusid;
 289         mpc->mpc_srcbusirq = srcbusirq;
 290         mpc->mpc_destapic = destapic;
 291         mpc->mpc_destapiclint = destapiclint;
 292         smp_add_mpc_entry(mc, sizeof(*mpc));
 293 }
 294
 295 void smp_write_address_space(struct mp_config_table *mc,
 296         unsigned char busid, unsigned char address_type,
 297         unsigned int address_base_low, unsigned int address_base_high,
 298         unsigned int address_length_low, unsigned int address_length_high)
 299 {
 300         struct mp_exten_system_address_space *mpe;
 301         mpe = smp_next_mpe_entry(mc);
 302         memset(mpe, '\0', sizeof(*mpe));
 303         mpe->mpe_type = MPE_SYSTEM_ADDRESS_SPACE;
 304         mpe->mpe_length = sizeof(*mpe);
 305         mpe->mpe_busid = busid;
 306         mpe->mpe_address_type = address_type;
 307         mpe->mpe_address_base_low  = address_base_low;
 308         mpe->mpe_address_base_high = address_base_high;
 309         mpe->mpe_address_length_low  = address_length_low;
 310         mpe->mpe_address_length_high = address_length_high;
 311         smp_add_mpe_entry(mc, (mpe_t)mpe);
 312 }
 313
 314
 315 void smp_write_bus_hierarchy(struct mp_config_table *mc,
 316         unsigned char busid, unsigned char bus_info,
 317         unsigned char parent_busid)
 318 {
 319         struct mp_exten_bus_hierarchy *mpe;
 320         mpe = smp_next_mpe_entry(mc);
 321         memset(mpe, '\0', sizeof(*mpe));
 322         mpe->mpe_type = MPE_BUS_HIERARCHY;
 323         mpe->mpe_length = sizeof(*mpe);
 324         mpe->mpe_busid = busid;
 325         mpe->mpe_bus_info = bus_info;
 326         mpe->mpe_parent_busid = parent_busid;
 327         smp_add_mpe_entry(mc, (mpe_t)mpe);
 328 }
 329
 330 void smp_write_compatibility_address_space(struct mp_config_table *mc,
 331         unsigned char busid, unsigned char address_modifier,
 332         unsigned int range_list)
 333 {
 334         struct mp_exten_compatibility_address_space *mpe;
 335         mpe = smp_next_mpe_entry(mc);
 336         memset(mpe, '\0', sizeof(*mpe));
 337         mpe->mpe_type = MPE_COMPATIBILITY_ADDRESS_SPACE;
 338         mpe->mpe_length = sizeof(*mpe);
 339         mpe->mpe_busid = busid;
 340         mpe->mpe_address_modifier = address_modifier;
 341         mpe->mpe_range_list = range_list;
 342         smp_add_mpe_entry(mc, (mpe_t)mpe);
 343 }
 344
 345 void mptable_lintsrc(struct mp_config_table *mc, unsigned long bus_isa)
 346 {
 347         smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
 348         smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
 349 }
 350
 351 void mptable_add_isa_interrupts(struct mp_config_table *mc, unsigned long bus_isa, unsigned long apicid, int external_int2)
 352 {
 353 /*I/O Ints:                   Type         Trigger            Polarity         Bus ID   IRQ  APIC ID   PIN# */
 354         smp_write_intsrc(mc, external_int2?mp_INT:mp_ExtINT,
 355                                      MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid, 0x0);
 356         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid, 0x1);
 357         smp_write_intsrc(mc, external_int2?mp_ExtINT:mp_INT,
 358                                      MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid, 0x2);
 359         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x3, apicid, 0x3);
 360         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x4, apicid, 0x4);
 361         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x6, apicid, 0x6);
 362         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x7, apicid, 0x7);
 363         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x8, apicid, 0x8);
 364         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x9, apicid, 0x9);
 365         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xa, apicid, 0xa);
 366         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xb, apicid, 0xb);
 367         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xc, apicid, 0xc);
 368         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xd, apicid, 0xd);
 369         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xe, apicid, 0xe);
 370         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xf, apicid, 0xf);
 371 }
 372
 373 void mptable_write_buses(struct mp_config_table *mc, int *max_pci_bus, int *isa_bus) {
 374         int dummy, i, highest;
 375         char buses[256];
 376         struct device *dev;
 377
 378         if (!max_pci_bus) max_pci_bus = &dummy;
 379         if (!isa_bus) isa_bus = &dummy;
 380
 381         *max_pci_bus = 0;
 382         highest = 0;
 383         memset(buses, 0, sizeof(buses));
 384
 385         for (dev = all_devices; dev; dev = dev->next) {
 386                 struct bus *bus;
 387                 for (bus = dev->link_list; bus; bus = bus->next) {
 388                         if (bus->secondary > 255) {
 389                                 printk(BIOS_ERR, "A bus claims to have a bus ID > 255?!? Aborting");
 390                                 return;
 391                         }
 392                         buses[bus->secondary] = 1;
 393                         if (highest < bus->secondary) highest = bus->secondary;
 394                 }
 395         }
 396         for (i=0; i <= highest; i++) {
 397                 if (buses[i]) {
 398                         smp_write_bus(mc, i, "PCI   ");
 399                         *max_pci_bus = i;
 400                 }
 401         }
 402         *isa_bus = *max_pci_bus + 1;
 403         smp_write_bus(mc, *isa_bus, "ISA   ");
 404 }
 405
 406 void *mptable_finalize(struct mp_config_table *mc)
 407 {
 408         mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
 409         mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
 410         printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", mc, smp_next_mpe_entry(mc));
 411         return smp_next_mpe_entry(mc);
 412 }