src/arch/x86/boot/mpspec.c

   1 #include <console/console.h>
   2 #include <device/path.h>
   3 #include <device/pci_ids.h>
   4 #include <cpu/cpu.h>
   5 #include <arch/smp/mpspec.h>
   6 #include <string.h>
   7 #include <arch/cpu.h>
   8 #include <cpu/x86/lapic.h>
   9
  10 /* Initialize the specified "mc" struct with initial values. */
  11 void mptable_init(struct mp_config_table *mc, u32 lapic_addr)
  12 {
  13         int i;
  14
  15         memset(mc, 0, sizeof(*mc));
  16
  17         memcpy(mc->mpc_signature, MPC_SIGNATURE, 4);
  18
  19         mc->mpc_length = sizeof(*mc);   /* Initially just the header size. */
  20         mc->mpc_spec = 0x04;            /* MultiProcessor specification 1.4 */
  21         mc->mpc_checksum = 0;           /* Not yet computed. */
  22         mc->mpc_oemptr = 0;
  23         mc->mpc_oemsize = 0;
  24         mc->mpc_entry_count = 0;        /* No entries yet... */
  25         mc->mpc_lapic = lapic_addr;
  26         mc->mpe_length = 0;
  27         mc->mpe_checksum = 0;
  28         mc->reserved = 0;
  29
  30         strncpy(mc->mpc_oem, CONFIG_MAINBOARD_VENDOR, 8);
  31         strncpy(mc->mpc_productid, CONFIG_MAINBOARD_PART_NUMBER, 12);
  32
  33         /*
  34          * The oem/productid fields are exactly 8/12 bytes long. If the resp.
  35          * entry is shorter, the remaining bytes are filled with spaces.
  36          */
  37         for (i = MIN(strlen(CONFIG_MAINBOARD_VENDOR), 8); i < 8; i++)
  38                 mc->mpc_oem[i] = ' ';
  39         for (i = MIN(strlen(CONFIG_MAINBOARD_PART_NUMBER), 12); i < 12; i++)
  40                 mc->mpc_productid[i] = ' ';
  41 }
  42
  43 unsigned char smp_compute_checksum(void *v, int len)
  44 {
  45         unsigned char *bytes;
  46         unsigned char checksum;
  47         int i;
  48         bytes = v;
  49         checksum = 0;
  50         for(i = 0; i < len; i++) {
  51                 checksum -= bytes[i];
  52         }
  53         return checksum;
  54 }
  55
  56 void *smp_write_floating_table(unsigned long addr)
  57 {
  58         /* 16 byte align the table address */
  59         addr = (addr + 0xf) & (~0xf);
  60         return smp_write_floating_table_physaddr(addr, addr + SMP_FLOATING_TABLE_LEN);
  61 }
  62
  63 void *smp_write_floating_table_physaddr(unsigned long addr, unsigned long mpf_physptr)
  64 {
  65         struct intel_mp_floating *mf;
  66         void *v;
  67
  68         v = (void *)addr;
  69         mf = v;
  70         mf->mpf_signature[0] = '_';
  71         mf->mpf_signature[1] = 'M';
  72         mf->mpf_signature[2] = 'P';
  73         mf->mpf_signature[3] = '_';
  74         mf->mpf_physptr = mpf_physptr;
  75         mf->mpf_length = 1;
  76         mf->mpf_specification = 4;
  77         mf->mpf_checksum = 0;
  78         mf->mpf_feature1 = 0;
  79         mf->mpf_feature2 = 0;
  80         mf->mpf_feature3 = 0;
  81         mf->mpf_feature4 = 0;
  82         mf->mpf_feature5 = 0;
  83         mf->mpf_checksum = smp_compute_checksum(mf, mf->mpf_length*16);
  84         return v;
  85 }
  86
  87 void *smp_next_mpc_entry(struct mp_config_table *mc)
  88 {
  89         void *v;
  90         v = (void *)(((char *)mc) + mc->mpc_length);
  91         return v;
  92 }
  93 static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
  94 {
  95         mc->mpc_length += length;
  96         mc->mpc_entry_count++;
  97 }
  98
  99 void *smp_next_mpe_entry(struct mp_config_table *mc)
 100 {
 101         void *v;
 102         v = (void *)(((char *)mc) + mc->mpc_length + mc->mpe_length);
 103         return v;
 104 }
 105 static void smp_add_mpe_entry(struct mp_config_table *mc, mpe_t mpe)
 106 {
 107         mc->mpe_length += mpe->mpe_length;
 108 }
 109
 110 void smp_write_processor(struct mp_config_table *mc,
 111         unsigned char apicid, unsigned char apicver,
 112         unsigned char cpuflag, unsigned int cpufeature,
 113         unsigned int featureflag)
 114 {
 115         struct mpc_config_processor *mpc;
 116         mpc = smp_next_mpc_entry(mc);
 117         memset(mpc, '\0', sizeof(*mpc));
 118         mpc->mpc_type = MP_PROCESSOR;
 119         mpc->mpc_apicid = apicid;
 120         mpc->mpc_apicver = apicver;
 121         mpc->mpc_cpuflag = cpuflag;
 122         mpc->mpc_cpufeature = cpufeature;
 123         mpc->mpc_featureflag = featureflag;
 124         smp_add_mpc_entry(mc, sizeof(*mpc));
 125 }
 126
 127 /* If we assume a symmetric processor configuration we can
 128  * get all of the information we need to write the processor
 129  * entry from the bootstrap processor.
 130  * Plus I don't think linux really even cares.
 131  * Having the proper apicid's in the table so the non-bootstrap
 132  *  processors can be woken up should be enough.
 133  */
 134 void smp_write_processors(struct mp_config_table *mc)
 135 {
 136         int boot_apic_id;
 137         unsigned apic_version;
 138         unsigned cpu_features;
 139         unsigned cpu_feature_flags;
 140         struct cpuid_result result;
 141         device_t cpu;
 142
 143         boot_apic_id = lapicid();
 144         apic_version = lapic_read(LAPIC_LVR) & 0xff;
 145         result = cpuid(1);
 146         cpu_features = result.eax;
 147         cpu_feature_flags = result.edx;
 148         for(cpu = all_devices; cpu; cpu = cpu->next) {
 149                 unsigned long cpu_flag;
 150                 if ((cpu->path.type != DEVICE_PATH_APIC) ||
 151                         (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
 152                 {
 153                         continue;
 154                 }
 155                 if (!cpu->enabled) {
 156                         continue;
 157                 }
 158                 cpu_flag = MPC_CPU_ENABLED;
 159                 if (boot_apic_id == cpu->path.apic.apic_id) {
 160                         cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
 161                 }
 162                 smp_write_processor(mc,
 163                         cpu->path.apic.apic_id, apic_version,
 164                         cpu_flag, cpu_features, cpu_feature_flags
 165                 );
 166         }
 167 }
 168
 169 static void smp_write_bus(struct mp_config_table *mc,
 170         unsigned char id, const char *bustype)
 171 {
 172         struct mpc_config_bus *mpc;
 173         mpc = smp_next_mpc_entry(mc);
 174         memset(mpc, '\0', sizeof(*mpc));
 175         mpc->mpc_type = MP_BUS;
 176         mpc->mpc_busid = id;
 177         memcpy(mpc->mpc_bustype, bustype, sizeof(mpc->mpc_bustype));
 178         smp_add_mpc_entry(mc, sizeof(*mpc));
 179 }
 180
 181 void smp_write_ioapic(struct mp_config_table *mc,
 182         unsigned char id, unsigned char ver,
 183         unsigned long apicaddr)
 184 {
 185         struct mpc_config_ioapic *mpc;
 186         mpc = smp_next_mpc_entry(mc);
 187         memset(mpc, '\0', sizeof(*mpc));
 188         mpc->mpc_type = MP_IOAPIC;
 189         mpc->mpc_apicid = id;
 190         mpc->mpc_apicver = ver;
 191         mpc->mpc_flags = MPC_APIC_USABLE;
 192         mpc->mpc_apicaddr = apicaddr;
 193         smp_add_mpc_entry(mc, sizeof(*mpc));
 194 }
 195
 196 void smp_write_intsrc(struct mp_config_table *mc,
 197         unsigned char irqtype, unsigned short irqflag,
 198         unsigned char srcbus, unsigned char srcbusirq,
 199         unsigned char dstapic, unsigned char dstirq)
 200 {
 201         struct mpc_config_intsrc *mpc;
 202         mpc = smp_next_mpc_entry(mc);
 203         memset(mpc, '\0', sizeof(*mpc));
 204         mpc->mpc_type = MP_INTSRC;
 205         mpc->mpc_irqtype = irqtype;
 206         mpc->mpc_irqflag = irqflag;
 207         mpc->mpc_srcbus = srcbus;
 208         mpc->mpc_srcbusirq = srcbusirq;
 209         mpc->mpc_dstapic = dstapic;
 210         mpc->mpc_dstirq = dstirq;
 211         smp_add_mpc_entry(mc, sizeof(*mpc));
 212 #ifdef DEBUG_MPTABLE
 213         printk(BIOS_DEBUG, "add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n",
 214                                 srcbus, srcbusirq, dstapic, dstirq);
 215         hexdump(__func__, mpc, sizeof(*mpc));
 216 #endif
 217 }
 218
 219 void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
 220         unsigned char irqtype, unsigned short irqflag,
 221         struct device *dev,
 222         unsigned char dstapic, unsigned char *dstirq)
 223 {
 224         struct device *child;
 225
 226         int i;
 227         int srcbus;
 228         int slot;
 229
 230         struct bus *link;
 231         unsigned char dstirq_x[4];
 232
 233         for (link = dev->link_list; link; link = link->next) {
 234
 235                 child = link->children;
 236                 srcbus = link->secondary;
 237
 238                 while (child) {
 239                         if (child->path.type != DEVICE_PATH_PCI)
 240                                 goto next;
 241
 242                         slot = (child->path.pci.devfn >> 3);
 243                         /* round pins */
 244                         for (i = 0; i < 4; i++)
 245                                 dstirq_x[i] = dstirq[(i + slot) % 4];
 246
 247                         if ((child->class >> 16) != PCI_BASE_CLASS_BRIDGE) {
 248                                 /* pci device */
 249                                 printk(BIOS_DEBUG, "route irq: %s\n", dev_path(child));
 250                                 for (i = 0; i < 4; i++)
 251                                         smp_write_intsrc(mc, irqtype, irqflag, srcbus, (slot<<2)|i, dstapic, dstirq_x[i]);
 252                                 goto next;
 253                         }
 254
 255                         switch (child->class>>8) {
 256                         case PCI_CLASS_BRIDGE_PCI:
 257                         case PCI_CLASS_BRIDGE_PCMCIA:
 258                         case PCI_CLASS_BRIDGE_CARDBUS:
 259                                 printk(BIOS_DEBUG, "route irq bridge: %s\n", dev_path(child));
 260                                 smp_write_intsrc_pci_bridge(mc, irqtype, irqflag, child, dstapic, dstirq_x);
 261                         }
 262
 263                 next:
 264                         child = child->sibling;
 265                 }
 266
 267         }
 268 }
 269
 270 void smp_write_lintsrc(struct mp_config_table *mc,
 271         unsigned char irqtype, unsigned short irqflag,
 272         unsigned char srcbusid, unsigned char srcbusirq,
 273         unsigned char destapic, unsigned char destapiclint)
 274 {
 275         struct mpc_config_lintsrc *mpc;
 276         mpc = smp_next_mpc_entry(mc);
 277         memset(mpc, '\0', sizeof(*mpc));
 278         mpc->mpc_type = MP_LINTSRC;
 279         mpc->mpc_irqtype = irqtype;
 280         mpc->mpc_irqflag = irqflag;
 281         mpc->mpc_srcbusid = srcbusid;
 282         mpc->mpc_srcbusirq = srcbusirq;
 283         mpc->mpc_destapic = destapic;
 284         mpc->mpc_destapiclint = destapiclint;
 285         smp_add_mpc_entry(mc, sizeof(*mpc));
 286 }
 287
 288 void smp_write_address_space(struct mp_config_table *mc,
 289         unsigned char busid, unsigned char address_type,
 290         unsigned int address_base_low, unsigned int address_base_high,
 291         unsigned int address_length_low, unsigned int address_length_high)
 292 {
 293         struct mp_exten_system_address_space *mpe;
 294         mpe = smp_next_mpe_entry(mc);
 295         memset(mpe, '\0', sizeof(*mpe));
 296         mpe->mpe_type = MPE_SYSTEM_ADDRESS_SPACE;
 297         mpe->mpe_length = sizeof(*mpe);
 298         mpe->mpe_busid = busid;
 299         mpe->mpe_address_type = address_type;
 300         mpe->mpe_address_base_low  = address_base_low;
 301         mpe->mpe_address_base_high = address_base_high;
 302         mpe->mpe_address_length_low  = address_length_low;
 303         mpe->mpe_address_length_high = address_length_high;
 304         smp_add_mpe_entry(mc, (mpe_t)mpe);
 305 }
 306
 307
 308 void smp_write_bus_hierarchy(struct mp_config_table *mc,
 309         unsigned char busid, unsigned char bus_info,
 310         unsigned char parent_busid)
 311 {
 312         struct mp_exten_bus_hierarchy *mpe;
 313         mpe = smp_next_mpe_entry(mc);
 314         memset(mpe, '\0', sizeof(*mpe));
 315         mpe->mpe_type = MPE_BUS_HIERARCHY;
 316         mpe->mpe_length = sizeof(*mpe);
 317         mpe->mpe_busid = busid;
 318         mpe->mpe_bus_info = bus_info;
 319         mpe->mpe_parent_busid = parent_busid;
 320         smp_add_mpe_entry(mc, (mpe_t)mpe);
 321 }
 322
 323 void smp_write_compatibility_address_space(struct mp_config_table *mc,
 324         unsigned char busid, unsigned char address_modifier,
 325         unsigned int range_list)
 326 {
 327         struct mp_exten_compatibility_address_space *mpe;
 328         mpe = smp_next_mpe_entry(mc);
 329         memset(mpe, '\0', sizeof(*mpe));
 330         mpe->mpe_type = MPE_COMPATIBILITY_ADDRESS_SPACE;
 331         mpe->mpe_length = sizeof(*mpe);
 332         mpe->mpe_busid = busid;
 333         mpe->mpe_address_modifier = address_modifier;
 334         mpe->mpe_range_list = range_list;
 335         smp_add_mpe_entry(mc, (mpe_t)mpe);
 336 }
 337
 338 void mptable_add_isa_interrupts(struct mp_config_table *mc, unsigned long bus_isa, unsigned long apicid, int external_int2)
 339 {
 340 /*I/O Ints:                   Type         Trigger            Polarity         Bus ID   IRQ  APIC ID   PIN# */
 341         smp_write_intsrc(mc, external_int2?mp_INT:mp_ExtINT,
 342                                      MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid, 0x0);
 343         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid, 0x1);
 344         smp_write_intsrc(mc, external_int2?mp_ExtINT:mp_INT,
 345                                      MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid, 0x2);
 346         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x3, apicid, 0x3);
 347         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x4, apicid, 0x4);
 348         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x6, apicid, 0x6);
 349         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x7, apicid, 0x7);
 350         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x8, apicid, 0x8);
 351         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x9, apicid, 0x9);
 352         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xa, apicid, 0xa);
 353         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xb, apicid, 0xb);
 354         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xc, apicid, 0xc);
 355         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xd, apicid, 0xd);
 356         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xe, apicid, 0xe);
 357         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xf, apicid, 0xf);
 358 }
 359
 360 void mptable_write_buses(struct mp_config_table *mc, int *max_pci_bus, int *isa_bus) {
 361         int dummy, i, highest;
 362         char buses[256];
 363         struct device *dev;
 364
 365         if (!max_pci_bus) max_pci_bus = &dummy;
 366         if (!isa_bus) isa_bus = &dummy;
 367
 368         *max_pci_bus = 0;
 369         highest = 0;
 370         memset(buses, 0, sizeof(buses));
 371
 372         for (dev = all_devices; dev; dev = dev->next) {
 373                 struct bus *bus;
 374                 for (bus = dev->link_list; bus; bus = bus->next) {
 375                         if (bus->secondary > 255) {
 376                                 printk(BIOS_ERR, "A bus claims to have a bus ID > 255?!? Aborting");
 377                                 return;
 378                         }
 379                         buses[bus->secondary] = 1;
 380                         if (highest < bus->secondary) highest = bus->secondary;
 381                 }
 382         }
 383         for (i=0; i <= highest; i++) {
 384                 if (buses[i]) {
 385                         smp_write_bus(mc, i, "PCI   ");
 386                         *max_pci_bus = i;
 387                 }
 388         }
 389         *isa_bus = *max_pci_bus + 1;
 390         smp_write_bus(mc, *isa_bus, "ISA   ");
 391 }
 392