src/arch/x86/Makefile.inc

   1 ##
   2 ## This file is part of the coreboot project.
   3 ##
   4 ## Copyright (C) 2009-2010 coresystems GmbH
   5 ## Copyright (C) 2009 Ronald G. Minnich
   6 ##
   7 ## This program is free software; you can redistribute it and/or modify
   8 ## it under the terms of the GNU General Public License as published by
   9 ## the Free Software Foundation; version 2 of the License.
  10 ##
  11 ## This program is distributed in the hope that it will be useful,
  12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ## GNU General Public License for more details.
  15 ##
  16 ## You should have received a copy of the GNU General Public License
  17 ## along with this program; if not, write to the Free Software
  18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19 ##
  20
  21 #######################################################################
  22 # Take care of subdirectories
  23 subdirs-y += boot
  24 # subdirs-y += init
  25 subdirs-y += lib
  26 subdirs-y += smp
  27
  28 OPTION_TABLE_H:=
  29 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
  30 cbfs-files-y += cmos_layout.bin
  31 cmos_layout.bin-file = $(obj)/cmos_layout.bin
  32 cmos_layout.bin-type = 0x01aa
  33
  34 OPTION_TABLE_H:=$(obj)/option_table.h
  35 endif
  36
  37 #######################################################################
  38 # Build the final rom image
  39 COREBOOT_ROM_DEPENDENCIES:=
  40 ifeq ($(CONFIG_PAYLOAD_ELF),y)
  41 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
  42 endif
  43 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
  44 COREBOOT_ROM_DEPENDENCIES+=seabios
  45 endif
  46 ifeq ($(CONFIG_PAYLOAD_FILO),y)
  47 COREBOOT_ROM_DEPENDENCIES+=filo
  48 endif
  49 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
  50 COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
  51 endif
  52 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
  53 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME)
  54 endif
  55
  56 extract_nth=$(word $(1), $(subst |, ,$(2)))
  57
  58 ifneq ($(CONFIG_UPDATE_IMAGE),y)
  59 prebuild-files = \
  60         $(foreach file,$(cbfs-files), \
  61                 $(CBFSTOOL) $@ add $(call extract_nth,1,$(file)) $(call extract_nth,2,$(file)) $(call extract_nth,3,$(file)) $(call extract_nth,4,$(file)); )
  62 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
  63
  64 $(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $$(prebuilt-files) $(CBFSTOOL)
  65         rm -f $@
  66         $(CBFSTOOL) $@ create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
  67         $(prebuild-files)
  68 else
  69 .PHONY: $(obj)/coreboot.pre1
  70 $(obj)/coreboot.pre1: $(CBFSTOOL)
  71         mv $(obj)/coreboot.rom $@
  72 endif
  73
  74 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
  75         @printf "    CBFS       $(subst $(obj)/,,$(@))\n"
  76         cp $(obj)/coreboot.pre $@.tmp
  77         if [ -f $(obj)/coreboot_ap ]; \
  78         then \
  79                 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \
  80         fi
  81         $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
  82 ifeq ($(CONFIG_PAYLOAD_NONE),y)
  83         @printf "    PAYLOAD    \e[1;31mnone (as specified by user)\e[0m\n"
  84 endif
  85 ifeq ($(CONFIG_PAYLOAD_ELF),y)
  86         @printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
  87         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  88 endif
  89 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
  90         @printf "    PAYLOAD    SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
  91         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  92 endif
  93 ifeq ($(CONFIG_PAYLOAD_FILO),y)
  94         @printf "    PAYLOAD    FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
  95         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  96 endif
  97 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
  98         @printf "    VSA        $(CONFIG_VSA_FILENAME)\n"
  99         $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
 100         $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
 101         $(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
 102 endif
 103 ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
 104         @printf "    CONFIG     $(DOTCONFIG)\n"
 105         if [ -f $(DOTCONFIG) ]; then \
 106         echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
 107         sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
 108         $(CBFSTOOL) $@.tmp add $(obj)/config.tmp config raw; rm -f $(obj)/config.tmp ; fi
 109 endif
 110         mv $@.tmp $@
 111         @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
 112         $(CBFSTOOL) $@ print
 113
 114 stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID))
 115 cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom
 116 pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))
 117 pci$(stripped_vgabios_id).rom-type := optionrom
 118
 119 cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
 120 mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
 121 mbi.bin-type := mbi
 122
 123 cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
 124 bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
 125 bootsplash.jpg-type := bootsplash
 126
 127 #######################################################################
 128 # i386 specific tools
 129
 130 $(OPTION_TABLE_H): $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
 131         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
 132         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $@
 133
 134 $(obj)/cmos_layout.bin: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
 135         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
 136         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --binary $@
 137
 138 $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
 139         @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
 140         $(HOSTCC) $(HOSTCFLAGS) $< -o $@
 141
 142 #######################################################################
 143 # Build the coreboot_ram (stage 2)
 144
 145 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions
 146         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 147         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
 148         $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
 149         $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
 150         $(OBJCOPY) --strip-debug $@
 151         $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
 152
 153 $(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
 154         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 155         $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
 156
 157 $(obj)/coreboot.a: $$(ramstage-objs)
 158         @printf "    AR         $(subst $(obj)/,,$(@))\n"
 159         rm -f $(obj)/coreboot.a
 160         $(AR) cr $(obj)/coreboot.a $^
 161
 162 #######################################################################
 163 # coreboot_ap.rom
 164
 165 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
 166
 167 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
 168         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 169         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
 170         $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
 171         $(OBJCOPY) --strip-debug $@
 172         $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
 173         $(NM) -n $(obj)/coreboot_ap | sort > $(obj)/coreboot_ap.map
 174
 175
 176 endif
 177
 178 #######################################################################
 179 # done
 180
 181 crt0s = $(src)/arch/x86/init/prologue.inc
 182 ldscripts =
 183 ldscripts += $(src)/arch/x86/init/bootblock.ld
 184 crt0s += $(src)/cpu/x86/32bit/entry32.inc
 185 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
 186
 187 crt0s += $(src)/cpu/x86/fpu_enable.inc
 188 ifeq ($(CONFIG_SSE),y)
 189 crt0s += $(src)/cpu/x86/sse_enable.inc
 190 endif
 191
 192 crt0s += $(cpu_incs)
 193
 194 #
 195 # FIXME move to CPU_INTEL_SOCKET_MPGA604
 196 #
 197 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
 198 crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
 199 endif
 200
 201 ifeq ($(CONFIG_LLSHELL),y)
 202 crt0s += $(src)/arch/x86/llshell/llshell.inc
 203 endif
 204
 205 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 206
 207 ifeq ($(CONFIG_ROMCC),y)
 208 crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
 209 endif
 210
 211 ifeq ($(CONFIG_ROMCC),y)
 212 ROMCCFLAGS ?= -mcpu=p2 -O2
 213
 214 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
 215         printf "    ROMCC      romstage.inc\n"
 216         $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
 217 else
 218
 219 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
 220         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 221         $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
 222
 223 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
 224         @printf "    CC         romstage.inc\n"
 225         $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
 226
 227 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
 228         @printf "    POST       romstage.inc\n"
 229         sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \
 230                 -e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp
 231         mv $@.tmp $@
 232 endif
 233
 234 # Things that appear in every board
 235 romstage-srcs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
 236 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
 237 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
 238 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
 239 endif
 240 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
 241 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
 242 endif
 243 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
 244 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
 245 endif
 246 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
 247 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
 248 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
 249 # make doesn't have arithmetic operators or greater-than comparisons
 250 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
 251 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
 252 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
 253 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
 254 endif
 255 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
 256 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
 257 endif
 258 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
 259 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
 260 endif
 261 endif
 262
 263 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
 264 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
 265 endif
 266
 267 #######################################################################
 268 # Build the final rom image
 269
 270 $(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL)
 271         @printf "    CBFS       $(subst $(obj)/,,$(@))\n"
 272         rm -f $@
 273         cp $(obj)/coreboot.pre1 $@
 274         $(CBFSTOOL) $@ add-stage $(obj)/romstage.elf \
 275             $(CONFIG_CBFS_PREFIX)/romstage x 0x$(shell cat $(obj)/location.txt)
 276 #FIXME: location.txt might require an offset of header size
 277
 278 #######################################################################
 279 # Build the bootblock
 280
 281 $(obj)/coreboot.bootblock: $(obj)/bootblock.elf
 282         @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
 283         $(OBJCOPY) -O binary $< $@
 284
 285 bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
 286 bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
 287 bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
 288 bootblock_lds += $(src)/arch/x86/lib/id.lds
 289 bootblock_lds += $(chipset_bootblock_lds)
 290
 291 bootblock_inc = $(src)/arch/x86/init/prologue.inc
 292 bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
 293 bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
 294 bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
 295 bootblock_inc += $(src)/arch/x86/lib/id.inc
 296 bootblock_inc += $(chipset_bootblock_inc)
 297
 298 ifeq ($(CONFIG_SSE),y)
 299 bootblock_inc += $(src)/cpu/x86/sse_enable.inc
 300 endif
 301 bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
 302 bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
 303
 304 bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
 305 ifeq ($(CONFIG_SSE),y)
 306 bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__
 307 endif
 308
 309 $(obj)/bootblock/ldscript.ld: $$(bootblock_lds) $(obj)/ldoptions
 310         @printf "    GEN        $(subst $(obj)/,,$(@))\n"
 311         mkdir -p $(obj)/bootblock
 312         printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE "$(ldscript)"\n)' > $@
 313
 314 $(obj)/bootblock/bootblock.S: $$(bootblock_inc)
 315         @printf "    GEN        $(subst $(obj)/,,$(@))\n"
 316         mkdir -p $(obj)/bootblock
 317         printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@
 318
 319 $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s
 320         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 321         $(CC) -I$(obj) -Wa,-acdlns -c -o $@ $<  > $(dir $@)/crt0.disasm
 322
 323 $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S $(obj)/config.h $(obj)/build.h
 324         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 325         $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/bootblock -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
 326
 327 $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
 328         @printf "    ROMCC      $(subst $(obj)/,,$(@))\n"
 329         $(CC) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \
 330                 $< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d
 331         $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@
 332
 333 $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld
 334         @printf "    LINK       $(subst $(obj)/,,$(@))\n"
 335         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/bootblock/ldscript.ld $<
 336         $(NM) -n $(obj)/bootblock.elf | sort > $(obj)/bootblock.map
 337         $(OBJCOPY) --only-keep-debug $@ $(obj)/bootblock.debug
 338         $(OBJCOPY) --strip-debug $@
 339         $(OBJCOPY) --add-gnu-debuglink=$(obj)/bootblock.debug $@
 340
 341 #######################################################################
 342 # Build the romstage
 343 $(obj)/coreboot.romstage: $(obj)/coreboot.pre1 $$(romstage-objs) $(obj)/romstage/ldscript.ld
 344         @printf "    LINK       $(subst $(obj)/,,$(@))\n"
 345         printf "CONFIG_ROMBASE = 0x0;\n" > $(obj)/location.ld
 346         $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(romstage-objs)
 347         $(OBJCOPY) -O binary $(obj)/romstage.elf $(obj)/romstage.bin
 348         printf "CONFIG_ROMBASE = 0x" > $(obj)/location.ld
 349         $(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt
 350         cat $(obj)/location.txt >> $(obj)/location.ld
 351         printf ';\n' >> $(obj)/location.ld
 352         $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(romstage-objs)
 353         $(NM) -n $(obj)/romstage.elf | sort > $(obj)/romstage.map
 354         $(OBJCOPY) --only-keep-debug $(obj)/romstage.elf $(obj)/romstage.debug
 355         $(OBJCOPY) --strip-debug $(obj)/romstage.elf
 356         $(OBJCOPY) --add-gnu-debuglink=$(obj)/romstage.debug $(obj)/romstage.elf
 357         $(OBJCOPY) -O binary $(obj)/romstage.elf $@
 358
 359 $(obj)/romstage/ldscript.ld: $$(ldscripts) $(obj)/ldoptions
 360         @printf "    GEN        $(subst $(obj)/,,$(@))\n"
 361         mkdir -p $(obj)/romstage
 362         printf '$(foreach ldscript,ldoptions location.ld $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' > $@
 363
 364 $(obj)/romstage/crt0.S: $$(crt0s)
 365         @printf "    GEN        $(subst $(obj)/,,$(@))\n"
 366         mkdir -p $(obj)/romstage
 367         printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@
 368
 369 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.romstage.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
 370         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 371         $(CC) -I$(obj) -Wa,-acdlns -c -o $@ $<  > $(dir $@)/crt0.disasm
 372
 373 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/romstage/crt0.S $(obj)/config.h $(obj)/build.h
 374         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 375         $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
 376
 377 seabios:
 378         $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
 379                         HOSTCC="$(HOSTCC)" \
 380                         CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
 381                         OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
 382                         CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
 383                         CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE)
 384 filo:
 385         $(MAKE) -C payloads/external/FILO -f Makefile.inc \
 386                         HOSTCC="$(HOSTCC)" \
 387                         CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
 388                         OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
 389                         CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \
 390                         CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE)
 391