src/arch/x86/Makefile.inc

   1 ##
   2 ## This file is part of the coreboot project.
   3 ##
   4 ## Copyright (C) 2009-2010 coresystems GmbH
   5 ## Copyright (C) 2009 Ronald G. Minnich
   6 ##
   7 ## This program is free software; you can redistribute it and/or modify
   8 ## it under the terms of the GNU General Public License as published by
   9 ## the Free Software Foundation; version 2 of the License.
  10 ##
  11 ## This program is distributed in the hope that it will be useful,
  12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ## GNU General Public License for more details.
  15 ##
  16 ## You should have received a copy of the GNU General Public License
  17 ## along with this program; if not, write to the Free Software
  18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19 ##
  20
  21 #######################################################################
  22 # Take care of subdirectories
  23 subdirs-y += boot
  24 # subdirs-y += init
  25 subdirs-y += lib
  26 subdirs-y += smp
  27
  28 OPTION_TABLE_H:=
  29 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
  30 cbfs-files-y += cmos_layout.bin
  31 cmos_layout.bin-file = $(obj)/cmos_layout.bin
  32 cmos_layout.bin-type = 0x01aa
  33
  34 OPTION_TABLE_H:=$(obj)/option_table.h
  35 endif
  36
  37 #######################################################################
  38 # Build the final rom image
  39 COREBOOT_ROM_DEPENDENCIES:=
  40 ifeq ($(CONFIG_PAYLOAD_ELF),y)
  41 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
  42 endif
  43 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
  44 COREBOOT_ROM_DEPENDENCIES+=seabios
  45 endif
  46 ifeq ($(CONFIG_PAYLOAD_FILO),y)
  47 COREBOOT_ROM_DEPENDENCIES+=filo
  48 endif
  49 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
  50 COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
  51 endif
  52 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
  53 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME)
  54 endif
  55
  56 extract_nth=$(word $(1), $(subst |, ,$(2)))
  57
  58 ifneq ($(CONFIG_UPDATE_IMAGE),y)
  59 prebuild-files = \
  60         $(foreach file,$(cbfs-files), \
  61                 $(CBFSTOOL) $@ add $(call extract_nth,1,$(file)) $(call extract_nth,2,$(file)) $(call extract_nth,3,$(file)) $(call extract_nth,4,$(file)); )
  62 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
  63
  64 $(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $(prebuilt-files) $(CBFSTOOL)
  65         rm -f $@
  66         $(CBFSTOOL) $@ create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
  67         $(prebuild-files)
  68 else
  69 $(obj)/coreboot.pre1: $(CBFSTOOL)
  70         mv $(obj)/coreboot.rom $@
  71 endif
  72
  73 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
  74         @printf "    CBFS       $(subst $(obj)/,,$(@))\n"
  75         cp $(obj)/coreboot.pre $@.tmp
  76         if [ -f $(obj)/coreboot_ap ]; \
  77         then \
  78                 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \
  79         fi
  80         $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
  81 ifeq ($(CONFIG_PAYLOAD_NONE),y)
  82         @printf "    PAYLOAD    \e[1;31mnone (as specified by user)\e[0m\n"
  83 endif
  84 ifeq ($(CONFIG_PAYLOAD_ELF),y)
  85         @printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
  86         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  87 endif
  88 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
  89         @printf "    PAYLOAD    SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
  90         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  91 endif
  92 ifeq ($(CONFIG_PAYLOAD_FILO),y)
  93         @printf "    PAYLOAD    FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
  94         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  95 endif
  96 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
  97         @printf "    VSA        $(CONFIG_VSA_FILENAME)\n"
  98         $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
  99         $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
 100         $(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
 101 endif
 102         mv $@.tmp $@
 103         @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
 104         $(CBFSTOOL) $@ print
 105
 106 stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID))
 107 cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom
 108 pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))
 109 pci$(stripped_vgabios_id).rom-type := optionrom
 110
 111 cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
 112 mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
 113 mbi.bin-type := mbi
 114
 115 cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
 116 bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
 117 bootsplash.jpg-type := bootsplash
 118
 119 #######################################################################
 120 # i386 specific tools
 121
 122 $(OPTION_TABLE_H): $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
 123         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
 124         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $@
 125
 126 $(obj)/cmos_layout.bin: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
 127         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
 128         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --binary $@
 129
 130 $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
 131         @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
 132         $(HOSTCC) $(HOSTCFLAGS) $< -o $@
 133
 134 #######################################################################
 135 # Build the coreboot_ram (stage 2)
 136
 137 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions
 138         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 139         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
 140         $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
 141         $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
 142         $(OBJCOPY) --strip-debug $@
 143         $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
 144
 145 $(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
 146         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 147         $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
 148
 149 $(obj)/coreboot.a: $$(ramstage-objs)
 150         @printf "    AR         $(subst $(obj)/,,$(@))\n"
 151         rm -f $(obj)/coreboot.a
 152         $(AR) cr $(obj)/coreboot.a $^
 153
 154 #######################################################################
 155 # coreboot_ap.rom
 156
 157 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
 158
 159 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
 160         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 161         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
 162         $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
 163         $(OBJCOPY) --strip-debug $@
 164         $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
 165         $(NM) -n $(obj)/coreboot_ap | sort > $(obj)/coreboot_ap.map
 166
 167
 168 endif
 169
 170 #######################################################################
 171 # done
 172
 173 crt0s = $(src)/arch/x86/init/prologue.inc
 174 ldscripts =
 175 ldscripts += $(src)/arch/x86/init/bootblock.ld
 176 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 177 crt0s += $(src)/cpu/x86/16bit/entry16.inc
 178 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
 179 endif
 180 crt0s += $(src)/cpu/x86/32bit/entry32.inc
 181 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
 182 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 183 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 184 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
 185 crt0s += $(src)/arch/x86/lib/id.inc
 186 ldscripts += $(src)/arch/x86/lib/id.lds
 187 endif
 188
 189 crt0s += $(src)/cpu/x86/fpu_enable.inc
 190 ifeq ($(CONFIG_SSE),y)
 191 crt0s += $(src)/cpu/x86/sse_enable.inc
 192 endif
 193
 194 crt0s += $(cpu_incs)
 195
 196 #
 197 # FIXME move to CPU_INTEL_SOCKET_MPGA604
 198 #
 199 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
 200 crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
 201 endif
 202
 203 ifeq ($(CONFIG_LLSHELL),y)
 204 crt0s += $(src)/arch/x86/llshell/llshell.inc
 205 endif
 206
 207 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 208
 209 ifeq ($(CONFIG_SSE),y)
 210 crt0s += $(src)/cpu/x86/sse_disable.inc
 211 endif
 212 ifeq ($(CONFIG_MMX),y)
 213 crt0s += $(src)/cpu/x86/mmx_disable.inc
 214 endif
 215
 216 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 217 crt0s += $(chipset_bootblock_inc)
 218 ldscripts += $(chipset_bootblock_lds)
 219 endif
 220
 221 ifeq ($(CONFIG_ROMCC),y)
 222 crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
 223 endif
 224
 225 ifeq ($(CONFIG_ROMCC),y)
 226 ROMCCFLAGS ?= -mcpu=p2 -O2
 227
 228 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
 229         printf "    ROMCC      romstage.inc\n"
 230         $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
 231 else
 232
 233 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
 234         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 235         $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
 236
 237 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
 238         @printf "    CC         romstage.inc\n"
 239         $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
 240
 241 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
 242         @printf "    POST       romstage.inc\n"
 243         sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $^ > $@.tmp
 244         mv $@.tmp $@
 245 endif
 246
 247 # Things that appear in every board
 248 romstage-srcs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
 249 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
 250 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
 251 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
 252 endif
 253 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
 254 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
 255 endif
 256 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
 257 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
 258 endif
 259 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
 260 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
 261 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
 262 # make doesn't have arithmetic operators or greater-than comparisons
 263 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
 264 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
 265 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
 266 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
 267 endif
 268 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
 269 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
 270 endif
 271 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
 272 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
 273 endif
 274 endif
 275
 276 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
 277 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
 278 endif
 279
 280 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
 281 include $(src)/arch/x86/Makefile.bootblock.inc
 282 else
 283 include $(src)/arch/x86/Makefile.bigbootblock.inc
 284 endif
 285
 286 seabios:
 287         $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
 288                         HOSTCC="$(HOSTCC)" \
 289                         CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
 290                         OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
 291                         CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
 292                         CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE)
 293 filo:
 294         $(MAKE) -C payloads/external/FILO -f Makefile.inc \
 295                         HOSTCC="$(HOSTCC)" \
 296                         CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
 297                         OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
 298                         CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \
 299                         CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE)
 300