src/arch/x86/Makefile.inc

   1 ##
   2 ## This file is part of the coreboot project.
   3 ##
   4 ## Copyright (C) 2009-2010 coresystems GmbH
   5 ## Copyright (C) 2009 Ronald G. Minnich
   6 ##
   7 ## This program is free software; you can redistribute it and/or modify
   8 ## it under the terms of the GNU General Public License as published by
   9 ## the Free Software Foundation; version 2 of the License.
  10 ##
  11 ## This program is distributed in the hope that it will be useful,
  12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ## GNU General Public License for more details.
  15 ##
  16 ## You should have received a copy of the GNU General Public License
  17 ## along with this program; if not, write to the Free Software
  18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19 ##
  20
  21 #######################################################################
  22 # Take care of subdirectories
  23 subdirs-y += boot
  24 # subdirs-y += init
  25 subdirs-y += lib
  26 subdirs-y += smp
  27
  28 OPTION_TABLE_H:=
  29 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
  30 cbfs-files-y += $(obj)/cmos_layout.bin
  31 $(obj)/cmos_layout.bin-name = cmos_layout.bin
  32 $(obj)/cmos_layout.bin-type = 0x01aa
  33
  34 OPTION_TABLE_H:=$(obj)/option_table.h
  35 endif
  36
  37 #######################################################################
  38 # Build the final rom image
  39 COREBOOT_ROM_DEPENDENCIES:=
  40 ifeq ($(CONFIG_PAYLOAD_ELF),y)
  41 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
  42 endif
  43 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
  44 COREBOOT_ROM_DEPENDENCIES+=seabios
  45 endif
  46 ifeq ($(CONFIG_VGA_BIOS),y)
  47 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VGA_BIOS_FILE)
  48 endif
  49 ifeq ($(CONFIG_INTEL_MBI),y)
  50 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_MBI_FILE)
  51 endif
  52 ifeq ($(CONFIG_BOOTSPLASH),y)
  53 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_BOOTSPLASH_FILE)
  54 endif
  55 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
  56 COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
  57 endif
  58 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
  59 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME)
  60 endif
  61
  62 extract_nth=$(word $(1), $(subst |, ,$(2)))
  63
  64 ifneq ($(CONFIG_UPDATE_IMAGE),y)
  65 prebuild-files = \
  66         $(foreach file,$(cbfs-files), \
  67                 $(CBFSTOOL) $@ add $(call extract_nth,1,$(file)) $(call extract_nth,2,$(file)) $(call extract_nth,3,$(file)) $(call extract_nth,4,$(file)); )
  68 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
  69
  70 $(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $$(prebuilt-files) $(CBFSTOOL)
  71         rm -f $@
  72         $(CBFSTOOL) $@ create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
  73         $(prebuild-files)
  74 else
  75 $(obj)/coreboot.pre1: $(CBFSTOOL)
  76         mv $(obj)/coreboot.rom $@
  77 endif
  78
  79 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
  80         @printf "    CBFS       $(subst $(obj)/,,$(@))\n"
  81         cp $(obj)/coreboot.pre $@.tmp
  82         if [ -f $(obj)/coreboot_ap ]; \
  83         then \
  84                 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \
  85         fi
  86         $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
  87 ifeq ($(CONFIG_PAYLOAD_NONE),y)
  88         @printf "    PAYLOAD    \e[1;31mnone (as specified by user)\e[0m\n"
  89 endif
  90 ifeq ($(CONFIG_PAYLOAD_ELF),y)
  91         @printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
  92         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  93 endif
  94 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
  95         @printf "    PAYLOAD    SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
  96         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  97 endif
  98 ifeq ($(CONFIG_VGA_BIOS),y)
  99         @printf "    VGABIOS    $(CONFIG_VGA_BIOS_FILE) $(CONFIG_VGA_BIOS_ID)\n"
 100         $(CBFSTOOL) $@.tmp add $(CONFIG_VGA_BIOS_FILE) "pci$(CONFIG_VGA_BIOS_ID).rom" optionrom
 101 endif
 102 ifeq ($(CONFIG_INTEL_MBI),y)
 103         @printf "    MBI        $(CONFIG_MBI_FILE)\n"
 104         $(CBFSTOOL) $@.tmp add $(CONFIG_MBI_FILE) mbi.bin mbi
 105 endif
 106 ifeq ($(CONFIG_BOOTSPLASH),y)
 107         @printf "    BOOTSPLASH $(CONFIG_BOOTSPLASH_FILE)\n"
 108         $(CBFSTOOL) $@.tmp add $(CONFIG_BOOTSPLASH_FILE) bootsplash.jpg bootsplash
 109 endif
 110 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
 111         @printf "    VSA        $(CONFIG_VSA_FILENAME)\n"
 112         $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
 113         $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
 114         $(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
 115 endif
 116         mv $@.tmp $@
 117         @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
 118         $(CBFSTOOL) $@ print
 119
 120 #######################################################################
 121 # i386 specific tools
 122
 123 $(OPTION_TABLE_H): $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
 124         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
 125         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $@
 126
 127 $(obj)/cmos_layout.bin: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
 128         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
 129         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --binary $@
 130
 131 $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
 132         @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
 133         $(HOSTCC) $(HOSTCFLAGS) $< -o $@
 134
 135 #######################################################################
 136 # Build the coreboot_ram (stage 2)
 137
 138 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions
 139         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 140         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
 141         $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
 142         $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
 143         $(OBJCOPY) --strip-debug $@
 144         $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
 145
 146 $(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
 147         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 148         $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
 149
 150 $(obj)/coreboot.a: $$(ramstage-objs)
 151         @printf "    AR         $(subst $(obj)/,,$(@))\n"
 152         rm -f $(obj)/coreboot.a
 153         $(AR) cr $(obj)/coreboot.a $^
 154
 155 #######################################################################
 156 # coreboot_ap.rom
 157
 158 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
 159
 160 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
 161         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 162         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
 163         $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
 164         $(OBJCOPY) --strip-debug $@
 165         $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
 166         $(NM) -n $(obj)/coreboot_ap | sort > $(obj)/coreboot_ap.map
 167
 168
 169 endif
 170
 171 #######################################################################
 172 # done
 173
 174 crt0s = $(src)/arch/x86/init/prologue.inc
 175 ldscripts =
 176 ldscripts += $(src)/arch/x86/init/ldscript_fallback_cbfs.lb
 177 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 178 crt0s += $(src)/cpu/x86/16bit/entry16.inc
 179 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
 180 endif
 181 crt0s += $(src)/cpu/x86/32bit/entry32.inc
 182 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
 183 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 184 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 185 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
 186 crt0s += $(src)/arch/x86/lib/id.inc
 187 ldscripts += $(src)/arch/x86/lib/id.lds
 188 endif
 189
 190 crt0s += $(src)/cpu/x86/fpu_enable.inc
 191 ifeq ($(CONFIG_SSE),y)
 192 crt0s += $(src)/cpu/x86/sse_enable.inc
 193 endif
 194
 195 crt0s += $(cpu_incs)
 196
 197 #
 198 # FIXME move to CPU_INTEL_SOCKET_MPGA604
 199 #
 200 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
 201 crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
 202 endif
 203
 204 ifeq ($(CONFIG_LLSHELL),y)
 205 crt0s += $(src)/arch/x86/llshell/llshell.inc
 206 endif
 207
 208 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 209
 210 ifeq ($(CONFIG_SSE),y)
 211 crt0s += $(src)/cpu/x86/sse_disable.inc
 212 endif
 213 ifeq ($(CONFIG_MMX),y)
 214 crt0s += $(src)/cpu/x86/mmx_disable.inc
 215 endif
 216
 217 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 218 crt0s += $(chipset_bootblock_inc)
 219 ldscripts += $(chipset_bootblock_lds)
 220 endif
 221
 222 ifeq ($(CONFIG_ROMCC),y)
 223 crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
 224 endif
 225
 226 ifeq ($(CONFIG_ROMCC),y)
 227 ROMCCFLAGS ?= -mcpu=p2 -O2
 228
 229 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
 230         printf "    ROMCC      romstage.inc\n"
 231         $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
 232 else
 233
 234 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
 235         @printf "    CC         $(subst $(obj)/,,$(@))\n"
 236         $(CC) -MMD $(CFLAGS) -I$(src) -I. -I$(obj) -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
 237
 238 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
 239         @printf "    CC         romstage.inc\n"
 240         $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
 241
 242 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
 243         @printf "    POST       romstage.inc\n"
 244         sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $^ > $@.tmp
 245         mv $@.tmp $@
 246 endif
 247
 248 # Things that appear in every board
 249 romstage-srcs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
 250 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
 251 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
 252 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
 253 endif
 254 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
 255 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
 256 endif
 257 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
 258 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
 259 endif
 260 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
 261 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
 262 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
 263 # make doesn't have arithmetic operators or greater-than comparisons
 264 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
 265 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
 266 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
 267 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
 268 endif
 269 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
 270 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
 271 endif
 272 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
 273 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
 274 endif
 275 endif
 276
 277 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
 278 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
 279 endif
 280
 281 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
 282 include $(src)/arch/x86/Makefile.bootblock.inc
 283 else
 284 include $(src)/arch/x86/Makefile.bigbootblock.inc
 285 endif
 286
 287 seabios:
 288         $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
 289                         CC="$(CC)" LD="$(LD)" \
 290                         CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
 291                         CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE)
 292