2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2009-2010 coresystems GmbH
5 ## Copyright (C) 2009 Ronald G. Minnich
7 ## This program is free software; you can redistribute it and/or modify
8 ## it under the terms of the GNU General Public License as published by
9 ## the Free Software Foundation; version 2 of the License.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #######################################################################
22 # Take care of subdirectories
29 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
30 cbfs-files-y += cmos_layout.bin
31 cmos_layout.bin-file = $(obj)/cmos_layout.bin
32 cmos_layout.bin-type = 0x01aa
34 OPTION_TABLE_H:=$(obj)/option_table.h
37 #######################################################################
38 # Build the final rom image
39 COREBOOT_ROM_DEPENDENCIES:=
40 ifeq ($(CONFIG_PAYLOAD_ELF),y)
41 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
43 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
44 COREBOOT_ROM_DEPENDENCIES+=seabios
46 ifeq ($(CONFIG_PAYLOAD_FILO),y)
47 COREBOOT_ROM_DEPENDENCIES+=filo
49 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
50 COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
52 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
53 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME)
56 extract_nth=$(word $(1), $(subst |, ,$(2)))
58 ifneq ($(CONFIG_UPDATE_IMAGE),y)
60 $(foreach file,$(cbfs-files), \
61 $(CBFSTOOL) $@ add $(call extract_nth,1,$(file)) $(call extract_nth,2,$(file)) $(call extract_nth,3,$(file)) $(call extract_nth,4,$(file)); )
62 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
64 $(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $$(prebuilt-files) $(CBFSTOOL)
66 $(CBFSTOOL) $@ create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
69 $(obj)/coreboot.pre1: $(CBFSTOOL)
70 mv $(obj)/coreboot.rom $@
73 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
74 @printf " CBFS $(subst $(obj)/,,$(@))\n"
75 cp $(obj)/coreboot.pre $@.tmp
76 if [ -f $(obj)/coreboot_ap ]; \
78 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \
80 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
81 ifeq ($(CONFIG_PAYLOAD_NONE),y)
82 @printf " PAYLOAD \e[1;31mnone (as specified by user)\e[0m\n"
84 ifeq ($(CONFIG_PAYLOAD_ELF),y)
85 @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
86 $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
88 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
89 @printf " PAYLOAD SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
90 $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
92 ifeq ($(CONFIG_PAYLOAD_FILO),y)
93 @printf " PAYLOAD FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
94 $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
96 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
97 @printf " VSA $(CONFIG_VSA_FILENAME)\n"
98 $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
99 $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
100 $(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
102 ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
103 @printf " CONFIG $(DOTCONFIG)\n"
104 if [ -f $(DOTCONFIG) ]; then \
105 echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
106 sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
107 $(CBFSTOOL) $@.tmp add $(obj)/config.tmp config raw; rm -f $(obj)/config.tmp ; fi
110 @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n"
113 stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID))
114 cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom
115 pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))
116 pci$(stripped_vgabios_id).rom-type := optionrom
118 cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
119 mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
122 cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
123 bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
124 bootsplash.jpg-type := bootsplash
126 #######################################################################
127 # i386 specific tools
129 $(OPTION_TABLE_H): $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
130 @printf " OPTION $(subst $(obj)/,,$(@))\n"
131 $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $@
133 $(obj)/cmos_layout.bin: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
134 @printf " OPTION $(subst $(obj)/,,$(@))\n"
135 $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --binary $@
137 $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
138 @printf " HOSTCC $(subst $(obj)/,,$(@))\n"
139 $(HOSTCC) $(HOSTCFLAGS) $< -o $@
141 #######################################################################
142 # Build the coreboot_ram (stage 2)
144 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions
145 @printf " CC $(subst $(obj)/,,$(@))\n"
146 $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
147 $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
148 $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
149 $(OBJCOPY) --strip-debug $@
150 $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
152 $(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
153 @printf " CC $(subst $(obj)/,,$(@))\n"
154 $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
156 $(obj)/coreboot.a: $$(ramstage-objs)
157 @printf " AR $(subst $(obj)/,,$(@))\n"
158 rm -f $(obj)/coreboot.a
159 $(AR) cr $(obj)/coreboot.a $^
161 #######################################################################
164 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
166 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
167 @printf " CC $(subst $(obj)/,,$(@))\n"
168 $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
169 $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
170 $(OBJCOPY) --strip-debug $@
171 $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
172 $(NM) -n $(obj)/coreboot_ap | sort > $(obj)/coreboot_ap.map
177 #######################################################################
180 crt0s = $(src)/arch/x86/init/prologue.inc
182 ldscripts += $(src)/arch/x86/init/bootblock.ld
183 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
184 crt0s += $(src)/cpu/x86/16bit/entry16.inc
185 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
187 crt0s += $(src)/cpu/x86/32bit/entry32.inc
188 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
189 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
190 crt0s += $(src)/cpu/x86/16bit/reset16.inc
191 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
192 crt0s += $(src)/arch/x86/lib/id.inc
193 ldscripts += $(src)/arch/x86/lib/id.lds
196 crt0s += $(src)/cpu/x86/fpu_enable.inc
197 ifeq ($(CONFIG_SSE),y)
198 crt0s += $(src)/cpu/x86/sse_enable.inc
204 # FIXME move to CPU_INTEL_SOCKET_MPGA604
206 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
207 crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
210 ifeq ($(CONFIG_LLSHELL),y)
211 crt0s += $(src)/arch/x86/llshell/llshell.inc
214 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
216 ifeq ($(CONFIG_SSE),y)
217 crt0s += $(src)/cpu/x86/sse_disable.inc
219 ifeq ($(CONFIG_MMX),y)
220 crt0s += $(src)/cpu/x86/mmx_disable.inc
223 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
224 crt0s += $(chipset_bootblock_inc)
225 ldscripts += $(chipset_bootblock_lds)
228 ifeq ($(CONFIG_ROMCC),y)
229 crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
232 ifeq ($(CONFIG_ROMCC),y)
233 ROMCCFLAGS ?= -mcpu=p2 -O2
235 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
236 printf " ROMCC romstage.inc\n"
237 $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
240 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
241 @printf " CC $(subst $(obj)/,,$(@))\n"
242 $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
244 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
245 @printf " CC romstage.inc\n"
246 $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
248 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
249 @printf " POST romstage.inc\n"
250 sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \
251 -e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp
255 # Things that appear in every board
256 romstage-srcs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
257 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
258 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
259 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
261 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
262 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
264 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
265 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
267 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
268 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
269 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
270 # make doesn't have arithmetic operators or greater-than comparisons
271 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
272 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
273 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
274 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
276 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
277 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
279 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
280 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
284 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
285 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
288 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
289 include $(src)/arch/x86/Makefile.bootblock.inc
291 include $(src)/arch/x86/Makefile.bigbootblock.inc
295 $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
297 CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
298 OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
299 CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
300 CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE)
302 $(MAKE) -C payloads/external/FILO -f Makefile.inc \
304 CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
305 OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
306 CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \
307 CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE)