Fix coreboot makefiles not to produce half baked output.
[coreboot.git] / src / arch / x86 / Makefile.inc
1 ##
2 ## This file is part of the coreboot project.
3 ##
4 ## Copyright (C) 2009-2010 coresystems GmbH
5 ## Copyright (C) 2009 Ronald G. Minnich
6 ##
7 ## This program is free software; you can redistribute it and/or modify
8 ## it under the terms of the GNU General Public License as published by
9 ## the Free Software Foundation; version 2 of the License.
10 ##
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 ## GNU General Public License for more details.
15 ##
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
19 ##
20
21 #######################################################################
22 # Take care of subdirectories
23 subdirs-y += boot
24 # subdirs-y += init
25 subdirs-y += lib
26 subdirs-y += smp
27
28 OPTION_TABLE_H:=
29 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
30 cbfs-files-y += cmos_layout.bin
31 cmos_layout.bin-file = $(obj)/cmos_layout.bin
32 cmos_layout.bin-type = 0x01aa
33
34 OPTION_TABLE_H:=$(obj)/option_table.h
35 endif
36
37 #######################################################################
38 # Build the final rom image
39 COREBOOT_ROM_DEPENDENCIES:=
40 ifeq ($(CONFIG_PAYLOAD_ELF),y)
41 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
42 endif
43 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
44 COREBOOT_ROM_DEPENDENCIES+=seabios
45 endif
46 ifeq ($(CONFIG_PAYLOAD_FILO),y)
47 COREBOOT_ROM_DEPENDENCIES+=filo
48 endif
49 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
50 COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
51 endif
52 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
53 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME)
54 endif
55
56 extract_nth=$(word $(1), $(subst |, ,$(2)))
57
58 ifneq ($(CONFIG_UPDATE_IMAGE),y)
59 prebuild-files = \
60         $(foreach file,$(cbfs-files), \
61         $(CBFSTOOL) $@.tmp add $(call extract_nth,1,$(file)) \
62         $(call extract_nth,2,$(file)) $(call extract_nth,3,$(file)) \
63         $(call extract_nth,4,$(file)) &&)
64 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
65
66 $(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $$(prebuilt-files) $(CBFSTOOL)
67         $(CBFSTOOL) $@.tmp create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
68         $(prebuild-files) true
69         mv $@.tmp $@
70 else
71 .PHONY: $(obj)/coreboot.pre1
72 $(obj)/coreboot.pre1: $(CBFSTOOL)
73         mv $(obj)/coreboot.rom $@
74 endif
75
76 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
77         @printf "    CBFS       $(subst $(obj)/,,$(@))\n"
78         cp $(obj)/coreboot.pre $@.tmp
79         if [ -f $(obj)/coreboot_ap ]; \
80         then \
81                 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \
82         fi
83         $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
84 ifeq ($(CONFIG_PAYLOAD_NONE),y)
85         @printf "    PAYLOAD    \e[1;31mnone (as specified by user)\e[0m\n"
86 endif
87 ifeq ($(CONFIG_PAYLOAD_ELF),y)
88         @printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
89         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
90 endif
91 ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
92         @printf "    PAYLOAD    SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
93         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
94 endif
95 ifeq ($(CONFIG_PAYLOAD_FILO),y)
96         @printf "    PAYLOAD    FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
97         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
98 endif
99 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
100         @printf "    VSA        $(CONFIG_VSA_FILENAME)\n"
101         $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
102         $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
103         $(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
104 endif
105 ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
106         @printf "    CONFIG     $(DOTCONFIG)\n"
107         if [ -f $(DOTCONFIG) ]; then \
108         echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
109         sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
110         $(CBFSTOOL) $@.tmp add $(obj)/config.tmp config raw; rm -f $(obj)/config.tmp ; fi
111 endif
112         mv $@.tmp $@
113         @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
114         $(CBFSTOOL) $@ print
115
116 stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID))
117 cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom
118 pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))
119 pci$(stripped_vgabios_id).rom-type := optionrom
120
121 cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
122 mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
123 mbi.bin-type := mbi
124
125 cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
126 bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
127 bootsplash.jpg-type := bootsplash
128
129 #######################################################################
130 # i386 specific tools
131
132 $(OPTION_TABLE_H): $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
133         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
134         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $@
135
136 $(obj)/cmos_layout.bin: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
137         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
138         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --binary $@
139
140 $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
141         @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
142         $(HOSTCC) $(HOSTCFLAGS) $< -o $@
143
144 #######################################################################
145 # Build the coreboot_ram (stage 2)
146
147 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions
148         @printf "    CC         $(subst $(obj)/,,$(@))\n"
149         $(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
150         $(NM) -n $@.tmp | sort > $@.map
151         $(OBJCOPY) --only-keep-debug $@.tmp $@.debug
152         $(OBJCOPY) --strip-debug $@.tmp
153         $(OBJCOPY) --add-gnu-debuglink=$@.debug $@.tmp
154         mv $@.tmp $@
155
156 $(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
157         @printf "    CC         $(subst $(obj)/,,$(@))\n"
158         $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
159
160 $(obj)/coreboot.a: $$(ramstage-objs)
161         @printf "    AR         $(subst $(obj)/,,$(@))\n"
162         rm -f $(obj)/coreboot.a
163         $(AR) cr $(obj)/coreboot.a $^
164
165 #######################################################################
166 # coreboot_ap.rom
167
168 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
169
170 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
171         @printf "    CC         $(subst $(obj)/,,$(@))\n"
172         $(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
173         $(OBJCOPY) --only-keep-debug $@.tmp $@.debug
174         $(OBJCOPY) --strip-debug $@.tmp
175         $(OBJCOPY) --add-gnu-debuglink=$@.debug $@.tmp
176         $(NM) -n $@.tmp | sort > $@.map
177         mv $@.tmp $@
178
179 endif
180
181 #######################################################################
182 # done
183
184 crt0s = $(src)/arch/x86/init/prologue.inc
185 ldscripts =
186 ldscripts += $(src)/arch/x86/init/bootblock.ld
187 crt0s += $(src)/cpu/x86/32bit/entry32.inc
188 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
189
190 crt0s += $(src)/cpu/x86/fpu_enable.inc
191 ifeq ($(CONFIG_SSE),y)
192 crt0s += $(src)/cpu/x86/sse_enable.inc
193 endif
194
195 crt0s += $(cpu_incs)
196
197 #
198 # FIXME move to CPU_INTEL_SOCKET_MPGA604
199 #
200 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
201 crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
202 endif
203
204 ifeq ($(CONFIG_LLSHELL),y)
205 crt0s += $(src)/arch/x86/llshell/llshell.inc
206 endif
207
208 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
209
210 ifeq ($(CONFIG_ROMCC),y)
211 crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
212 endif
213
214 ifeq ($(CONFIG_ROMCC),y)
215 ROMCCFLAGS ?= -mcpu=p2 -O2
216
217 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
218         printf "    ROMCC      romstage.inc\n"
219         $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
220 else
221
222 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
223         @printf "    CC         $(subst $(obj)/,,$(@))\n"
224         $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
225
226 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
227         @printf "    CC         romstage.inc\n"
228         $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
229
230 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
231         @printf "    POST       romstage.inc\n"
232         sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \
233                 -e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp
234         mv $@.tmp $@
235 endif
236
237 # Things that appear in every board
238 romstage-srcs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
239 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
240 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
241 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
242 endif
243 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
244 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
245 endif
246 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
247 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
248 endif
249 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
250 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
251 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
252 # make doesn't have arithmetic operators or greater-than comparisons
253 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
254 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
255 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
256 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
257 endif
258 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
259 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
260 endif
261 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
262 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
263 endif
264 endif
265
266 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
267 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
268 endif
269
270 #######################################################################
271 # Build the final rom image
272
273 $(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL)
274         @printf "    CBFS       $(subst $(obj)/,,$(@))\n"
275         cp $(obj)/coreboot.pre1 $@.tmp
276         $(CBFSTOOL) $@.tmp add-stage $(obj)/romstage.elf \
277             $(CONFIG_CBFS_PREFIX)/romstage x 0x$(shell cat $(obj)/location.txt)
278         mv $@.tmp $@
279 #FIXME: location.txt might require an offset of header size
280
281 #######################################################################
282 # Build the bootblock
283
284 $(obj)/coreboot.bootblock: $(obj)/bootblock.elf
285         @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
286         $(OBJCOPY) -O binary $< $@
287
288 bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
289 bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
290 bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
291 bootblock_lds += $(src)/arch/x86/lib/id.lds
292 bootblock_lds += $(chipset_bootblock_lds)
293
294 bootblock_inc = $(src)/arch/x86/init/prologue.inc
295 bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
296 bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
297 bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
298 bootblock_inc += $(src)/arch/x86/lib/id.inc
299 bootblock_inc += $(chipset_bootblock_inc)
300
301 ifeq ($(CONFIG_SSE),y)
302 bootblock_inc += $(src)/cpu/x86/sse_enable.inc
303 endif
304 bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
305 bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
306
307 bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
308 ifeq ($(CONFIG_SSE),y)
309 bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__
310 endif
311
312 $(obj)/bootblock/ldscript.ld: $$(bootblock_lds) $(obj)/ldoptions
313         @printf "    GEN        $(subst $(obj)/,,$(@))\n"
314         mkdir -p $(obj)/bootblock
315         printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE "$(ldscript)"\n)' > $@
316
317 $(obj)/bootblock/bootblock.S: $$(bootblock_inc)
318         @printf "    GEN        $(subst $(obj)/,,$(@))\n"
319         mkdir -p $(obj)/bootblock
320         printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@
321
322 $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s
323         @printf "    CC         $(subst $(obj)/,,$(@))\n"
324         $(CC) -Wa,-acdlns -c -o $@ $<  > $(dir $@)/crt0.disasm
325
326 $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S $(obj)/config.h $(obj)/build.h
327         @printf "    CC         $(subst $(obj)/,,$(@))\n"
328         $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/bootblock -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
329
330 $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
331         @printf "    ROMCC      $(subst $(obj)/,,$(@))\n"
332         $(CC) $(INCLUDES) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \
333                 $< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d
334         $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@
335
336 $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld
337         @printf "    LINK       $(subst $(obj)/,,$(@))\n"
338         $(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(obj)/bootblock/ldscript.ld $<
339         $(NM) -n $@.tmp | sort > $(obj)/bootblock.map
340         $(OBJCOPY) --only-keep-debug $@.tmp $(obj)/bootblock.debug
341         $(OBJCOPY) --strip-debug $@.tmp
342         $(OBJCOPY) --add-gnu-debuglink=$(obj)/bootblock.debug $@.tmp
343         mv $@.tmp $@
344
345 #######################################################################
346 # Build the romstage
347 $(obj)/coreboot.romstage: $(obj)/coreboot.pre1 $$(romstage-objs) $(obj)/romstage/ldscript.ld
348         @printf "    LINK       $(subst $(obj)/,,$(@))\n"
349         printf "ROMSTAGE_BASE = 0x0;\n" > $(obj)/location.ld
350         $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(romstage-objs)
351         $(OBJCOPY) -O binary $(obj)/romstage.elf $(obj)/romstage.bin
352         printf "ROMSTAGE_BASE = 0x" > $(obj)/location.ld
353         $(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt || { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; }
354         cat $(obj)/location.txt >> $(obj)/location.ld
355         printf ';\n' >> $(obj)/location.ld
356         $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(romstage-objs)
357         $(NM) -n $(obj)/romstage.elf | sort > $(obj)/romstage.map
358         $(OBJCOPY) --only-keep-debug $(obj)/romstage.elf $(obj)/romstage.debug
359         $(OBJCOPY) --strip-debug $(obj)/romstage.elf
360         $(OBJCOPY) --add-gnu-debuglink=$(obj)/romstage.debug $(obj)/romstage.elf
361         $(OBJCOPY) -O binary $(obj)/romstage.elf $@
362
363 $(obj)/romstage/ldscript.ld: $$(ldscripts) $(obj)/ldoptions
364         @printf "    GEN        $(subst $(obj)/,,$(@))\n"
365         mkdir -p $(obj)/romstage
366         printf '$(foreach ldscript,ldoptions location.ld $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' > $@
367
368 $(obj)/romstage/crt0.S: $$(crt0s)
369         @printf "    GEN        $(subst $(obj)/,,$(@))\n"
370         mkdir -p $(obj)/romstage
371         printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@
372
373 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.romstage.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
374         @printf "    CC         $(subst $(obj)/,,$(@))\n"
375         $(CC) -Wa,-acdlns -c -o $@ $<  > $(dir $@)/crt0.disasm
376
377 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/romstage/crt0.S $(obj)/config.h $(obj)/build.h
378         @printf "    CC         $(subst $(obj)/,,$(@))\n"
379         $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
380
381 seabios:
382         $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
383                         HOSTCC="$(HOSTCC)" \
384                         CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
385                         OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
386                         CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
387                         CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \
388                         OUT=$(abspath $(obj))
389
390 filo:
391         $(MAKE) -C payloads/external/FILO -f Makefile.inc \
392                         HOSTCC="$(HOSTCC)" \
393                         CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
394                         OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
395                         CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \
396                         CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE)
397