2 * BK Id: SCCS/s.io.h 1.14 10/16/01 15:58:42 trini
9 #define SIO_CONFIG_RA 0x398
10 #define SIO_CONFIG_RD 0x399
14 #ifndef CONFIG_IO_BASE
15 #define CONFIG_IO_BASE 0
18 #define readb(addr) in_8((volatile uint8_t *)(addr))
19 #define writeb(b,addr) out_8((volatile uint8_t *)(addr), (b))
20 #define readw(addr) in_le16((volatile uint16_t *)(addr))
21 #define readl(addr) in_le32((volatile uint32_t *)(addr))
22 #define writew(b,addr) out_le16((volatile uint16_t *)(addr),(b))
23 #define writel(b,addr) out_le32((volatile uint32_t *)(addr),(b))
26 #define __raw_readb(addr) (*(volatile unsigned char *)(addr))
27 #define __raw_readw(addr) (*(volatile unsigned short *)(addr))
28 #define __raw_readl(addr) (*(volatile unsigned int *)(addr))
29 #define __raw_writeb(v, addr) (*(volatile unsigned char *)(addr) = (v))
30 #define __raw_writew(v, addr) (*(volatile unsigned short *)(addr) = (v))
31 #define __raw_writel(v, addr) (*(volatile unsigned int *)(addr) = (v))
34 * The insw/outsw/insl/outsl macros don't do byte-swapping.
35 * They are only used in practice for transferring buffers which
36 * are arrays of bytes, and byte-swapping is not appropriate in
39 #define insw(port, buf, ns) _insw_ns((uint16_t *)((port)+CONFIG_IO_BASE), (buf), (ns))
40 #define outsw(port, buf, ns) _outsw_ns((uint16_t *)((port)+CONFIG_IO_BASE), (buf), (ns))
42 #define inb(port) in_8((uint8_t *)((port)+CONFIG_IO_BASE))
43 #define outb(val, port) out_8((uint8_t *)((port)+CONFIG_IO_BASE), (val))
44 #define inw(port) in_le16((uint16_t *)((port)+CONFIG_IO_BASE))
45 #define outw(val, port) out_le16((uint16_t *)((port)+CONFIG_IO_BASE), (val))
46 #define inl(port) in_le32((uint32_t *)((port)+CONFIG_IO_BASE))
47 #define outl(val, port) out_le32((uint32_t *)((port)+CONFIG_IO_BASE), (val))
49 #define inb_p(port) inb((port))
50 #define outb_p(val, port) outb((val), (port))
51 #define inw_p(port) inw((port))
52 #define outw_p(val, port) outw((val), (port))
53 #define inl_p(port) inl((port))
54 #define outl_p(val, port) outl((val), (port))
57 * The *_ns versions below do byte-swapping.
59 #define insw_ns(port, buf, ns) _insw((uint16_t *)((port)+CONFIG_IO_BASE), (buf), (ns))
60 #define outsw_ns(port, buf, ns) _outsw((uint16_t *)((port)+CONFIG_IO_BASE), (buf), (ns))
63 #define IO_SPACE_LIMIT ~0
65 #define memset_io(a,b,c) memset((void *)(a),(b),(c))
66 #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
67 #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
70 * Enforce In-order Execution of I/O:
71 * Acts as a barrier to ensure all previous I/O accesses have
72 * completed before any further ones are issued.
74 static inline void eieio(void)
76 __asm__ __volatile__ ("eieio" : : : "memory");
79 /* Enforce in-order execution of data I/O.
80 * No distinction between read/write on PPC; use eieio for all three.
82 #define iobarrier_rw() eieio()
83 #define iobarrier_r() eieio()
84 #define iobarrier_w() eieio()
87 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
89 static inline int in_8(volatile unsigned char *addr)
93 __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
97 static inline void out_8(volatile unsigned char *addr, int val)
99 __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
102 static inline int in_le16(volatile unsigned short *addr)
106 __asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) :
107 "r" (addr), "m" (*addr));
111 static inline int in_be16(volatile unsigned short *addr)
115 __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
119 static inline void out_le16(volatile unsigned short *addr, int val)
121 __asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) :
122 "r" (val), "r" (addr));
125 static inline void out_be16(volatile unsigned short *addr, int val)
127 __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
130 static inline unsigned in_le32(volatile unsigned *addr)
134 __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
135 "r" (addr), "m" (*addr));
139 static inline unsigned in_be32(volatile unsigned *addr)
143 __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
147 static inline void out_le32(volatile unsigned *addr, int val)
149 __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
150 "r" (val), "r" (addr));
153 static inline void out_be32(volatile unsigned *addr, int val)
155 __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
158 static inline void _insw_ns(volatile uint16_t *port, void *buf, int ns)
160 uint16_t * b = (uint16_t *)buf;
163 *b++ = in_le16(port);
168 static inline void _outsw_ns(volatile uint16_t *port, const void *buf, int ns)
170 uint16_t * b = (uint16_t *)buf;
173 out_le16(port, *b++);
178 static inline void _insw(volatile uint16_t *port, void *buf, int ns)
180 uint16_t * b = (uint16_t *)buf;
183 *b++ = in_be16(port);
188 static inline void _outsw(volatile uint16_t *port, const void *buf, int ns)
190 uint16_t * b = (uint16_t *)buf;
193 out_be16(port, *b++);