2 #include <arch/intel.h>
4 #include <cpu/p6/apic.h>
20 intel_chip_post_macro(0x13) /* post 12 */
44 movl $APIC_DEFAULT_BASE, %edi
45 movl APIC_ID(%edi), %eax
48 /* Get the cpu index (MAX_CPUS on error) */
51 cmpl $(MAX_CPUS << 2), %ebx
53 cmpl %eax, initial_apicid(%ebx)
57 /* Now compute the appropriate stack */
59 movl $STACK_SIZE, %ebx
64 /* push the boot_complete flag */
67 /* Save the stack location */
71 * Now we are finished. Memory is up, data is copied and
72 * bss is cleared. Now we call the main routine and
75 intel_chip_post_macro(0xfe) /* post fe */
77 /* Resort the stack location */
80 /* The boot_complete flag has already been pushed */
84 intel_chip_post_macro(0xee) /* post fe */
89 .globl gdt, gdt_end, gdt_limit
91 gdt_limit = gdt_end - gdt - 1 /* compute the table limit */
94 .long gdt /* we know the offset */
98 .word 0x0000, 0x0000 /* dummy */
99 .byte 0x00, 0x00, 0x00, 0x00
102 .word 0x0000, 0x0000 /* dummy */
103 .byte 0x00, 0x00, 0x00, 0x00
106 /* flat code segment */
108 .byte 0x00, 0x9b, 0xcf, 0x00
111 /* flat data segment */
113 .byte 0x00, 0x93, 0xcf, 0x00
116 .word 0x0000, 0x0000 /* dummy */
117 .byte 0x00, 0x00, 0x00, 0x00
119 #if defined(CONFIG_VGABIOS) && (CONFIG_VGABIOS == 1)
121 /* 0x00009a00,0000ffffULL, 20h: 16-bit 64k code at 0x00000000 */
122 /* 0x00009200,0000ffffULL 28h: 16-bit 64k data at 0x00000000 */
124 /*16-bit 64k code at 0x00000000 */
129 /*16-bit 64k data at 0x00000000 */
132 #endif // defined(CONFIG_VGABIOS) && (CONFIG_VGABIOS == 1)