1 #include <console/console.h>
2 #include <device/path.h>
3 #include <device/pci_ids.h>
5 #include <arch/smp/mpspec.h>
8 #include <cpu/x86/lapic.h>
10 unsigned char smp_compute_checksum(void *v, int len)
13 unsigned char checksum;
17 for(i = 0; i < len; i++) {
23 void *smp_write_floating_table(unsigned long addr)
25 /* 16 byte align the table address */
26 addr = (addr + 0xf) & (~0xf);
27 return smp_write_floating_table_physaddr(addr, addr + SMP_FLOATING_TABLE_LEN);
30 void *smp_write_floating_table_physaddr(unsigned long addr, unsigned long mpf_physptr)
32 struct intel_mp_floating *mf;
37 mf->mpf_signature[0] = '_';
38 mf->mpf_signature[1] = 'M';
39 mf->mpf_signature[2] = 'P';
40 mf->mpf_signature[3] = '_';
41 mf->mpf_physptr = mpf_physptr;
43 mf->mpf_specification = 4;
50 mf->mpf_checksum = smp_compute_checksum(mf, mf->mpf_length*16);
54 void *smp_next_mpc_entry(struct mp_config_table *mc)
57 v = (void *)(((char *)mc) + mc->mpc_length);
60 static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
62 mc->mpc_length += length;
63 mc->mpc_entry_count++;
66 void *smp_next_mpe_entry(struct mp_config_table *mc)
69 v = (void *)(((char *)mc) + mc->mpc_length + mc->mpe_length);
72 static void smp_add_mpe_entry(struct mp_config_table *mc, mpe_t mpe)
74 mc->mpe_length += mpe->mpe_length;
77 void smp_write_processor(struct mp_config_table *mc,
78 unsigned char apicid, unsigned char apicver,
79 unsigned char cpuflag, unsigned int cpufeature,
80 unsigned int featureflag)
82 struct mpc_config_processor *mpc;
83 mpc = smp_next_mpc_entry(mc);
84 memset(mpc, '\0', sizeof(*mpc));
85 mpc->mpc_type = MP_PROCESSOR;
86 mpc->mpc_apicid = apicid;
87 mpc->mpc_apicver = apicver;
88 mpc->mpc_cpuflag = cpuflag;
89 mpc->mpc_cpufeature = cpufeature;
90 mpc->mpc_featureflag = featureflag;
91 smp_add_mpc_entry(mc, sizeof(*mpc));
94 /* If we assume a symmetric processor configuration we can
95 * get all of the information we need to write the processor
96 * entry from the bootstrap processor.
97 * Plus I don't think linux really even cares.
98 * Having the proper apicid's in the table so the non-bootstrap
99 * processors can be woken up should be enough.
101 void smp_write_processors(struct mp_config_table *mc)
104 unsigned apic_version;
105 unsigned cpu_features;
106 unsigned cpu_feature_flags;
107 struct cpuid_result result;
110 boot_apic_id = lapicid();
111 apic_version = lapic_read(LAPIC_LVR) & 0xff;
113 cpu_features = result.eax;
114 cpu_feature_flags = result.edx;
115 for(cpu = all_devices; cpu; cpu = cpu->next) {
116 unsigned long cpu_flag;
117 if ((cpu->path.type != DEVICE_PATH_APIC) ||
118 (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
125 cpu_flag = MPC_CPU_ENABLED;
126 if (boot_apic_id == cpu->path.apic.apic_id) {
127 cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
129 smp_write_processor(mc,
130 cpu->path.apic.apic_id, apic_version,
131 cpu_flag, cpu_features, cpu_feature_flags
136 void smp_write_bus(struct mp_config_table *mc,
137 unsigned char id, const char *bustype)
139 struct mpc_config_bus *mpc;
140 mpc = smp_next_mpc_entry(mc);
141 memset(mpc, '\0', sizeof(*mpc));
142 mpc->mpc_type = MP_BUS;
144 memcpy(mpc->mpc_bustype, bustype, sizeof(mpc->mpc_bustype));
145 smp_add_mpc_entry(mc, sizeof(*mpc));
148 void smp_write_ioapic(struct mp_config_table *mc,
149 unsigned char id, unsigned char ver,
150 unsigned long apicaddr)
152 struct mpc_config_ioapic *mpc;
153 mpc = smp_next_mpc_entry(mc);
154 memset(mpc, '\0', sizeof(*mpc));
155 mpc->mpc_type = MP_IOAPIC;
156 mpc->mpc_apicid = id;
157 mpc->mpc_apicver = ver;
158 mpc->mpc_flags = MPC_APIC_USABLE;
159 mpc->mpc_apicaddr = apicaddr;
160 smp_add_mpc_entry(mc, sizeof(*mpc));
163 void smp_write_intsrc(struct mp_config_table *mc,
164 unsigned char irqtype, unsigned short irqflag,
165 unsigned char srcbus, unsigned char srcbusirq,
166 unsigned char dstapic, unsigned char dstirq)
168 struct mpc_config_intsrc *mpc;
169 mpc = smp_next_mpc_entry(mc);
170 memset(mpc, '\0', sizeof(*mpc));
171 mpc->mpc_type = MP_INTSRC;
172 mpc->mpc_irqtype = irqtype;
173 mpc->mpc_irqflag = irqflag;
174 mpc->mpc_srcbus = srcbus;
175 mpc->mpc_srcbusirq = srcbusirq;
176 mpc->mpc_dstapic = dstapic;
177 mpc->mpc_dstirq = dstirq;
178 smp_add_mpc_entry(mc, sizeof(*mpc));
180 printk(BIOS_DEBUG, "add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n",
181 srcbus, srcbusirq, dstapic, dstirq);
182 hexdump(__func__, mpc, sizeof(*mpc));
186 void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
187 unsigned char irqtype, unsigned short irqflag,
189 unsigned char dstapic, unsigned char *dstirq)
191 struct device *child;
198 unsigned char dstirq_x[4];
200 for (link = dev->link_list; link; link = link->next) {
202 child = link->children;
203 srcbus = link->secondary;
206 if (child->path.type != DEVICE_PATH_PCI)
209 slot = (child->path.pci.devfn >> 3);
211 for (i = 0; i < 4; i++)
212 dstirq_x[i] = dstirq[(i + slot) % 4];
214 if ((child->class >> 16) != PCI_BASE_CLASS_BRIDGE) {
216 printk(BIOS_DEBUG, "route irq: %s\n", dev_path(child));
217 for (i = 0; i < 4; i++)
218 smp_write_intsrc(mc, irqtype, irqflag, srcbus, (slot<<2)|i, dstapic, dstirq_x[i]);
222 switch (child->class>>8) {
223 case PCI_CLASS_BRIDGE_PCI:
224 case PCI_CLASS_BRIDGE_PCMCIA:
225 case PCI_CLASS_BRIDGE_CARDBUS:
226 printk(BIOS_DEBUG, "route irq bridge: %s\n", dev_path(child));
227 smp_write_intsrc_pci_bridge(mc, irqtype, irqflag, child, dstapic, dstirq_x);
231 child = child->sibling;
237 void smp_write_lintsrc(struct mp_config_table *mc,
238 unsigned char irqtype, unsigned short irqflag,
239 unsigned char srcbusid, unsigned char srcbusirq,
240 unsigned char destapic, unsigned char destapiclint)
242 struct mpc_config_lintsrc *mpc;
243 mpc = smp_next_mpc_entry(mc);
244 memset(mpc, '\0', sizeof(*mpc));
245 mpc->mpc_type = MP_LINTSRC;
246 mpc->mpc_irqtype = irqtype;
247 mpc->mpc_irqflag = irqflag;
248 mpc->mpc_srcbusid = srcbusid;
249 mpc->mpc_srcbusirq = srcbusirq;
250 mpc->mpc_destapic = destapic;
251 mpc->mpc_destapiclint = destapiclint;
252 smp_add_mpc_entry(mc, sizeof(*mpc));
255 void smp_write_address_space(struct mp_config_table *mc,
256 unsigned char busid, unsigned char address_type,
257 unsigned int address_base_low, unsigned int address_base_high,
258 unsigned int address_length_low, unsigned int address_length_high)
260 struct mp_exten_system_address_space *mpe;
261 mpe = smp_next_mpe_entry(mc);
262 memset(mpe, '\0', sizeof(*mpe));
263 mpe->mpe_type = MPE_SYSTEM_ADDRESS_SPACE;
264 mpe->mpe_length = sizeof(*mpe);
265 mpe->mpe_busid = busid;
266 mpe->mpe_address_type = address_type;
267 mpe->mpe_address_base_low = address_base_low;
268 mpe->mpe_address_base_high = address_base_high;
269 mpe->mpe_address_length_low = address_length_low;
270 mpe->mpe_address_length_high = address_length_high;
271 smp_add_mpe_entry(mc, (mpe_t)mpe);
275 void smp_write_bus_hierarchy(struct mp_config_table *mc,
276 unsigned char busid, unsigned char bus_info,
277 unsigned char parent_busid)
279 struct mp_exten_bus_hierarchy *mpe;
280 mpe = smp_next_mpe_entry(mc);
281 memset(mpe, '\0', sizeof(*mpe));
282 mpe->mpe_type = MPE_BUS_HIERARCHY;
283 mpe->mpe_length = sizeof(*mpe);
284 mpe->mpe_busid = busid;
285 mpe->mpe_bus_info = bus_info;
286 mpe->mpe_parent_busid = parent_busid;
287 smp_add_mpe_entry(mc, (mpe_t)mpe);
290 void smp_write_compatibility_address_space(struct mp_config_table *mc,
291 unsigned char busid, unsigned char address_modifier,
292 unsigned int range_list)
294 struct mp_exten_compatibility_address_space *mpe;
295 mpe = smp_next_mpe_entry(mc);
296 memset(mpe, '\0', sizeof(*mpe));
297 mpe->mpe_type = MPE_COMPATIBILITY_ADDRESS_SPACE;
298 mpe->mpe_length = sizeof(*mpe);
299 mpe->mpe_busid = busid;
300 mpe->mpe_address_modifier = address_modifier;
301 mpe->mpe_range_list = range_list;
302 smp_add_mpe_entry(mc, (mpe_t)mpe);
305 void mptable_add_isa_interrupts(struct mp_config_table *mc, unsigned long bus_isa, unsigned long apicid, int external_int2)
307 /*I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
308 smp_write_intsrc(mc, external_int2?mp_INT:mp_ExtINT,
309 MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid, 0x0);
310 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid, 0x1);
311 smp_write_intsrc(mc, external_int2?mp_ExtINT:mp_INT,
312 MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid, 0x2);
313 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x3, apicid, 0x3);
314 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x4, apicid, 0x4);
315 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x6, apicid, 0x6);
316 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x7, apicid, 0x7);
317 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x8, apicid, 0x8);
318 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x9, apicid, 0x9);
319 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xa, apicid, 0xa);
320 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xb, apicid, 0xb);
321 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xc, apicid, 0xc);
322 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid, 0xd);
323 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid, 0xe);
324 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid, 0xf);
327 void mptable_write_buses(struct mp_config_table *mc, int *max_pci_bus, int *isa_bus) {
328 int dummy, i, highest;
332 if (!max_pci_bus) max_pci_bus = &dummy;
333 if (!isa_bus) isa_bus = &dummy;
337 memset(buses, 0, sizeof(buses));
339 for (dev = all_devices; dev; dev = dev->next) {
341 for (bus = dev->link_list; bus; bus = bus->next) {
342 if (bus->secondary > 255) {
343 printk(BIOS_ERR, "A bus claims to have a bus ID > 255?!? Aborting");
346 buses[bus->secondary] = 1;
347 if (highest < bus->secondary) highest = bus->secondary;
350 for (i=0; i <= highest; i++) {
352 smp_write_bus(mc, i, "PCI ");
356 *isa_bus = *max_pci_bus + 1;
357 smp_write_bus(mc, *isa_bus, "ISA ");